1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4 *
5 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 */
7
8#include <dt-bindings/pinctrl/at91.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/mfd/at91-usart.h>
13
14/ {
15	#address-cells = <1>;
16	#size-cells = <1>;
17	model = "Atmel AT91SAM9263 family SoC";
18	compatible = "atmel,at91sam9263";
19	interrupt-parent = <&aic>;
20
21	aliases {
22		serial0 = &dbgu;
23		serial1 = &usart0;
24		serial2 = &usart1;
25		serial3 = &usart2;
26		gpio0 = &pioA;
27		gpio1 = &pioB;
28		gpio2 = &pioC;
29		gpio3 = &pioD;
30		gpio4 = &pioE;
31		tcb0 = &tcb0;
32		i2c0 = &i2c0;
33		ssc0 = &ssc0;
34		ssc1 = &ssc1;
35		pwm0 = &pwm0;
36	};
37
38	cpus {
39		#address-cells = <1>;
40		#size-cells = <0>;
41
42		cpu@0 {
43			compatible = "arm,arm926ej-s";
44			device_type = "cpu";
45			reg = <0>;
46		};
47	};
48
49	memory@20000000 {
50		device_type = "memory";
51		reg = <0x20000000 0x08000000>;
52	};
53
54	clocks {
55		main_xtal: main_xtal {
56			compatible = "fixed-clock";
57			#clock-cells = <0>;
58			clock-frequency = <0>;
59		};
60
61		slow_xtal: slow_xtal {
62			compatible = "fixed-clock";
63			#clock-cells = <0>;
64			clock-frequency = <0>;
65		};
66	};
67
68	sram0: sram@300000 {
69		compatible = "mmio-sram";
70		reg = <0x00300000 0x14000>;
71		#address-cells = <1>;
72		#size-cells = <1>;
73		ranges = <0 0x00300000 0x14000>;
74	};
75
76	sram1: sram@500000 {
77		compatible = "mmio-sram";
78		reg = <0x00500000 0x4000>;
79		#address-cells = <1>;
80		#size-cells = <1>;
81		ranges = <0 0x00500000 0x4000>;
82	};
83
84	ahb {
85		compatible = "simple-bus";
86		#address-cells = <1>;
87		#size-cells = <1>;
88		ranges;
89
90		apb {
91			compatible = "simple-bus";
92			#address-cells = <1>;
93			#size-cells = <1>;
94			ranges;
95
96			aic: interrupt-controller@fffff000 {
97				#interrupt-cells = <3>;
98				compatible = "atmel,at91rm9200-aic";
99				interrupt-controller;
100				reg = <0xfffff000 0x200>;
101				atmel,external-irqs = <30 31>;
102			};
103
104			pmc: pmc@fffffc00 {
105				compatible = "atmel,at91sam9263-pmc", "syscon";
106				reg = <0xfffffc00 0x100>;
107				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
108				#clock-cells = <2>;
109				clocks = <&slow_xtal>, <&main_xtal>;
110				clock-names = "slow_xtal", "main_xtal";
111			};
112
113			ramc0: ramc@ffffe200 {
114				compatible = "atmel,at91sam9260-sdramc";
115				reg = <0xffffe200 0x200>;
116			};
117
118			smc0: smc@ffffe400 {
119				compatible = "atmel,at91sam9260-smc", "syscon";
120				reg = <0xffffe400 0x200>;
121			};
122
123			ramc1: ramc@ffffe800 {
124				compatible = "atmel,at91sam9260-sdramc";
125				reg = <0xffffe800 0x200>;
126			};
127
128			smc1: smc@ffffea00 {
129				compatible = "atmel,at91sam9260-smc", "syscon";
130				reg = <0xffffea00 0x200>;
131			};
132
133			matrix: matrix@ffffec00 {
134				compatible = "atmel,at91sam9263-matrix", "syscon";
135				reg = <0xffffec00 0x200>;
136			};
137
138			pit: timer@fffffd30 {
139				compatible = "atmel,at91sam9260-pit";
140				reg = <0xfffffd30 0xf>;
141				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
142				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
143			};
144
145			tcb0: timer@fff7c000 {
146				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
147				#address-cells = <1>;
148				#size-cells = <0>;
149				reg = <0xfff7c000 0x100>;
150				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
151				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
152				clock-names = "t0_clk", "slow_clk";
153			};
154
155			reset-controller@fffffd00 {
156				compatible = "atmel,at91sam9260-rstc";
157				reg = <0xfffffd00 0x10>;
158				clocks = <&slow_xtal>;
159			};
160
161			shdwc@fffffd10 {
162				compatible = "atmel,at91sam9260-shdwc";
163				reg = <0xfffffd10 0x10>;
164				clocks = <&slow_xtal>;
165			};
166
167			pinctrl@fffff200 {
168				#address-cells = <1>;
169				#size-cells = <1>;
170				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
171				ranges = <0xfffff200 0xfffff200 0xa00>;
172
173				atmel,mux-mask = <
174				      /*    A         B     */
175				       0xfffffffb 0xffffe07f  /* pioA */
176				       0x0007ffff 0x39072fff  /* pioB */
177				       0xffffffff 0x3ffffff8  /* pioC */
178				       0xfffffbff 0xffffffff  /* pioD */
179				       0xffe00fff 0xfbfcff00  /* pioE */
180				      >;
181
182				/* shared pinctrl settings */
183				dbgu {
184					pinctrl_dbgu: dbgu-0 {
185						atmel,pins =
186							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
187							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
188					};
189				};
190
191				usart0 {
192					pinctrl_usart0: usart0-0 {
193						atmel,pins =
194							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
195							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
196					};
197
198					pinctrl_usart0_rts: usart0_rts-0 {
199						atmel,pins =
200							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
201					};
202
203					pinctrl_usart0_cts: usart0_cts-0 {
204						atmel,pins =
205							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
206					};
207				};
208
209				usart1 {
210					pinctrl_usart1: usart1-0 {
211						atmel,pins =
212							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
213							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
214					};
215
216					pinctrl_usart1_rts: usart1_rts-0 {
217						atmel,pins =
218							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
219					};
220
221					pinctrl_usart1_cts: usart1_cts-0 {
222						atmel,pins =
223							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
224					};
225				};
226
227				usart2 {
228					pinctrl_usart2: usart2-0 {
229						atmel,pins =
230							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
231							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
232					};
233
234					pinctrl_usart2_rts: usart2_rts-0 {
235						atmel,pins =
236							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
237					};
238
239					pinctrl_usart2_cts: usart2_cts-0 {
240						atmel,pins =
241							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
242					};
243				};
244
245				nand {
246					pinctrl_nand_rb: nand-rb-0 {
247						atmel,pins =
248							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
249					};
250
251					pinctrl_nand_cs: nand-cs-0 {
252						atmel,pins =
253							 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
254					};
255				};
256
257				macb {
258					pinctrl_macb_rmii: macb_rmii-0 {
259						atmel,pins =
260							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
261							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
262							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
263							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
264							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
265							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
266							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
267							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
268							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
269							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
270					};
271
272					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
273						atmel,pins =
274							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
275							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
276							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
277							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
278							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
279							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
280							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
281							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
282					};
283				};
284
285				mmc0 {
286					pinctrl_mmc0_clk: mmc0_clk-0 {
287						atmel,pins =
288							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
289					};
290
291					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
292						atmel,pins =
293							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
294							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
295					};
296
297					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
298						atmel,pins =
299							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
300							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
301							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
302					};
303
304					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
305						atmel,pins =
306							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
307							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
308					};
309
310					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
311						atmel,pins =
312							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
313							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
314							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
315					};
316				};
317
318				mmc1 {
319					pinctrl_mmc1_clk: mmc1_clk-0 {
320						atmel,pins =
321							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
322					};
323
324					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
325						atmel,pins =
326							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
327							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
328					};
329
330					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
331						atmel,pins =
332							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
333							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
334							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
335					};
336
337					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
338						atmel,pins =
339							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
340							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
341					};
342
343					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
344						atmel,pins =
345							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
346							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
347							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
348					};
349				};
350
351				ssc0 {
352					pinctrl_ssc0_tx: ssc0_tx-0 {
353						atmel,pins =
354							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
355							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
356							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
357					};
358
359					pinctrl_ssc0_rx: ssc0_rx-0 {
360						atmel,pins =
361							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
362							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
363							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
364					};
365				};
366
367				ssc1 {
368					pinctrl_ssc1_tx: ssc1_tx-0 {
369						atmel,pins =
370							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
371							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
372							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
373					};
374
375					pinctrl_ssc1_rx: ssc1_rx-0 {
376						atmel,pins =
377							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
378							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
379							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
380					};
381				};
382
383				spi0 {
384					pinctrl_spi0: spi0-0 {
385						atmel,pins =
386							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
387							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
388							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
389					};
390				};
391
392				spi1 {
393					pinctrl_spi1: spi1-0 {
394						atmel,pins =
395							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
396							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
397							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
398					};
399				};
400
401				tcb0 {
402					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
403						atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
404					};
405
406					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
407						atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408					};
409
410					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
411						atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412					};
413
414					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
415						atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
416					};
417
418					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
419						atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420					};
421
422					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
423						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
424					};
425
426					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
427						atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
428					};
429
430					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
431						atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
432					};
433
434					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
435						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436					};
437				};
438
439				fb {
440					pinctrl_fb: fb-0 {
441						atmel,pins =
442							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC1 periph A */
443							 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC2 periph A */
444							 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC3 periph A */
445							 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB9 periph B */
446							 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC6 periph A */
447							 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC7 periph A */
448							 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC8 periph A */
449							 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC9 periph A */
450							 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC10 periph A */
451							 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC11 periph A */
452							 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC14 periph A */
453							 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC15 periph A */
454							 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC16 periph A */
455							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC12 periph B */
456							 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC18 periph A */
457							 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC19 periph A */
458							 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC22 periph A */
459							 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC23 periph A */
460							 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC24 periph A */
461							 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC17 periph B */
462							 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC26 periph A */
463							 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PC27 periph A */
464					};
465				};
466
467				can {
468					pinctrl_can_rx_tx: can_rx_tx {
469						atmel,pins =
470							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* CANRX, conflicts with IRQ0 */
471							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* CANTX, conflicts with PCK0 */
472					};
473				};
474
475				ac97 {
476					pinctrl_ac97: ac97-0 {
477						atmel,pins =
478							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A AC97FS pin */
479							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A AC97CK pin */
480							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A AC97TX pin */
481							 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A AC97RX pin */
482					};
483				};
484
485				pioA: gpio@fffff200 {
486					compatible = "atmel,at91rm9200-gpio";
487					reg = <0xfffff200 0x200>;
488					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
489					#gpio-cells = <2>;
490					gpio-controller;
491					interrupt-controller;
492					#interrupt-cells = <2>;
493					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
494				};
495
496				pioB: gpio@fffff400 {
497					compatible = "atmel,at91rm9200-gpio";
498					reg = <0xfffff400 0x200>;
499					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
500					#gpio-cells = <2>;
501					gpio-controller;
502					interrupt-controller;
503					#interrupt-cells = <2>;
504					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
505				};
506
507				pioC: gpio@fffff600 {
508					compatible = "atmel,at91rm9200-gpio";
509					reg = <0xfffff600 0x200>;
510					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
511					#gpio-cells = <2>;
512					gpio-controller;
513					interrupt-controller;
514					#interrupt-cells = <2>;
515					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
516				};
517
518				pioD: gpio@fffff800 {
519					compatible = "atmel,at91rm9200-gpio";
520					reg = <0xfffff800 0x200>;
521					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
522					#gpio-cells = <2>;
523					gpio-controller;
524					interrupt-controller;
525					#interrupt-cells = <2>;
526					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
527				};
528
529				pioE: gpio@fffffa00 {
530					compatible = "atmel,at91rm9200-gpio";
531					reg = <0xfffffa00 0x200>;
532					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
533					#gpio-cells = <2>;
534					gpio-controller;
535					interrupt-controller;
536					#interrupt-cells = <2>;
537					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
538				};
539			};
540
541			dbgu: serial@ffffee00 {
542				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
543				reg = <0xffffee00 0x200>;
544				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
545				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
546				pinctrl-names = "default";
547				pinctrl-0 = <&pinctrl_dbgu>;
548				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
549				clock-names = "usart";
550				status = "disabled";
551			};
552
553			usart0: serial@fff8c000 {
554				compatible = "atmel,at91sam9260-usart";
555				reg = <0xfff8c000 0x200>;
556				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
557				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558				atmel,use-dma-rx;
559				atmel,use-dma-tx;
560				pinctrl-names = "default";
561				pinctrl-0 = <&pinctrl_usart0>;
562				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
563				clock-names = "usart";
564				status = "disabled";
565			};
566
567			usart1: serial@fff90000 {
568				compatible = "atmel,at91sam9260-usart";
569				reg = <0xfff90000 0x200>;
570				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
571				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
572				atmel,use-dma-rx;
573				atmel,use-dma-tx;
574				pinctrl-names = "default";
575				pinctrl-0 = <&pinctrl_usart1>;
576				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
577				clock-names = "usart";
578				status = "disabled";
579			};
580
581			usart2: serial@fff94000 {
582				compatible = "atmel,at91sam9260-usart";
583				reg = <0xfff94000 0x200>;
584				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
585				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
586				atmel,use-dma-rx;
587				atmel,use-dma-tx;
588				pinctrl-names = "default";
589				pinctrl-0 = <&pinctrl_usart2>;
590				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
591				clock-names = "usart";
592				status = "disabled";
593			};
594
595			ssc0: ssc@fff98000 {
596				compatible = "atmel,at91rm9200-ssc";
597				reg = <0xfff98000 0x4000>;
598				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
599				pinctrl-names = "default";
600				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
601				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
602				clock-names = "pclk";
603				status = "disabled";
604			};
605
606			ssc1: ssc@fff9c000 {
607				compatible = "atmel,at91rm9200-ssc";
608				reg = <0xfff9c000 0x4000>;
609				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
610				pinctrl-names = "default";
611				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
612				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
613				clock-names = "pclk";
614				status = "disabled";
615			};
616
617			ac97: sound@fffa0000 {
618				compatible = "atmel,at91sam9263-ac97c";
619				reg = <0xfffa0000 0x4000>;
620				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
621				pinctrl-names = "default";
622				pinctrl-0 = <&pinctrl_ac97>;
623				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
624				clock-names = "ac97_clk";
625				status = "disabled";
626			};
627
628			macb0: ethernet@fffbc000 {
629				compatible = "cdns,at91sam9260-macb", "cdns,macb";
630				reg = <0xfffbc000 0x100>;
631				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
632				pinctrl-names = "default";
633				pinctrl-0 = <&pinctrl_macb_rmii>;
634				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
635				clock-names = "hclk", "pclk";
636				status = "disabled";
637			};
638
639			usb1: gadget@fff78000 {
640				compatible = "atmel,at91sam9263-udc";
641				reg = <0xfff78000 0x4000>;
642				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
643				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
644				clock-names = "pclk", "hclk";
645				status = "disabled";
646			};
647
648			i2c0: i2c@fff88000 {
649				compatible = "atmel,at91sam9260-i2c";
650				reg = <0xfff88000 0x100>;
651				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
652				#address-cells = <1>;
653				#size-cells = <0>;
654				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
655				status = "disabled";
656			};
657
658			mmc0: mmc@fff80000 {
659				compatible = "atmel,hsmci";
660				reg = <0xfff80000 0x600>;
661				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
662				#address-cells = <1>;
663				#size-cells = <0>;
664				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
665				clock-names = "mci_clk";
666				status = "disabled";
667			};
668
669			mmc1: mmc@fff84000 {
670				compatible = "atmel,hsmci";
671				reg = <0xfff84000 0x600>;
672				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
673				#address-cells = <1>;
674				#size-cells = <0>;
675				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
676				clock-names = "mci_clk";
677				status = "disabled";
678			};
679
680			watchdog@fffffd40 {
681				compatible = "atmel,at91sam9260-wdt";
682				reg = <0xfffffd40 0x10>;
683				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
684				clocks = <&slow_xtal>;
685				atmel,watchdog-type = "hardware";
686				atmel,reset-type = "all";
687				atmel,dbg-halt;
688				status = "disabled";
689			};
690
691			spi0: spi@fffa4000 {
692				#address-cells = <1>;
693				#size-cells = <0>;
694				compatible = "atmel,at91rm9200-spi";
695				reg = <0xfffa4000 0x200>;
696				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
697				pinctrl-names = "default";
698				pinctrl-0 = <&pinctrl_spi0>;
699				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
700				clock-names = "spi_clk";
701				status = "disabled";
702			};
703
704			spi1: spi@fffa8000 {
705				#address-cells = <1>;
706				#size-cells = <0>;
707				compatible = "atmel,at91rm9200-spi";
708				reg = <0xfffa8000 0x200>;
709				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
710				pinctrl-names = "default";
711				pinctrl-0 = <&pinctrl_spi1>;
712				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
713				clock-names = "spi_clk";
714				status = "disabled";
715			};
716
717			pwm0: pwm@fffb8000 {
718				compatible = "atmel,at91sam9rl-pwm";
719				reg = <0xfffb8000 0x300>;
720				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
721				#pwm-cells = <3>;
722				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
723				clock-names = "pwm_clk";
724				status = "disabled";
725			};
726
727			can: can@fffac000 {
728				compatible = "atmel,at91sam9263-can";
729				reg = <0xfffac000 0x300>;
730				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
731				pinctrl-names = "default";
732				pinctrl-0 = <&pinctrl_can_rx_tx>;
733				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
734				clock-names = "can_clk";
735			};
736
737			rtc@fffffd20 {
738				compatible = "atmel,at91sam9260-rtt";
739				reg = <0xfffffd20 0x10>;
740				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
741				clocks = <&slow_xtal>;
742				status = "disabled";
743			};
744
745			rtc@fffffd50 {
746				compatible = "atmel,at91sam9260-rtt";
747				reg = <0xfffffd50 0x10>;
748				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
749				clocks = <&slow_xtal>;
750				status = "disabled";
751			};
752
753			gpbr: syscon@fffffd60 {
754				compatible = "atmel,at91sam9260-gpbr", "syscon";
755				reg = <0xfffffd60 0x50>;
756				status = "disabled";
757			};
758		};
759
760		fb0: fb@700000 {
761			compatible = "atmel,at91sam9263-lcdc";
762			reg = <0x00700000 0x1000>;
763			interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
764			pinctrl-names = "default";
765			pinctrl-0 = <&pinctrl_fb>;
766			clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
767			clock-names = "lcdc_clk", "hclk";
768			status = "disabled";
769		};
770
771		usb0: ohci@a00000 {
772			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
773			reg = <0x00a00000 0x100000>;
774			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
775			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
776			clock-names = "ohci_clk", "hclk", "uhpck";
777			status = "disabled";
778		};
779
780		ebi0: ebi@10000000 {
781			compatible = "atmel,at91sam9263-ebi0";
782			#address-cells = <2>;
783			#size-cells = <1>;
784			atmel,smc = <&smc0>;
785			atmel,matrix = <&matrix>;
786			reg = <0x10000000 0x80000000>;
787			ranges = <0x0 0x0 0x10000000 0x10000000
788				  0x1 0x0 0x20000000 0x10000000
789				  0x2 0x0 0x30000000 0x10000000
790				  0x3 0x0 0x40000000 0x10000000
791				  0x4 0x0 0x50000000 0x10000000
792				  0x5 0x0 0x60000000 0x10000000>;
793			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
794			status = "disabled";
795
796			nand_controller0: nand-controller {
797				compatible = "atmel,at91sam9260-nand-controller";
798				#address-cells = <2>;
799				#size-cells = <1>;
800				ranges;
801				status = "disabled";
802			};
803		};
804
805		ebi1: ebi@70000000 {
806			compatible = "atmel,at91sam9263-ebi1";
807			#address-cells = <2>;
808			#size-cells = <1>;
809			atmel,smc = <&smc1>;
810			atmel,matrix = <&matrix>;
811			reg = <0x80000000 0x20000000>;
812			ranges = <0x0 0x0 0x80000000 0x10000000
813				  0x1 0x0 0x90000000 0x10000000>;
814			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
815			status = "disabled";
816
817			nand_controller1: nand-controller {
818				compatible = "atmel,at91sam9260-nand-controller";
819				#address-cells = <2>;
820				#size-cells = <1>;
821				ranges;
822				status = "disabled";
823			};
824		};
825	};
826
827	i2c-gpio-0 {
828		compatible = "i2c-gpio";
829		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
830			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
831			>;
832		i2c-gpio,sda-open-drain;
833		i2c-gpio,scl-open-drain;
834		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
835		#address-cells = <1>;
836		#size-cells = <0>;
837		status = "disabled";
838	};
839};
840