1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. IPQ6018 TLMM block
8
9maintainers:
10  - Sricharan R <sricharan@codeaurora.org>
11
12description: |
13  This binding describes the Top Level Mode Multiplexer block found in the
14  IPQ6018 platform.
15
16properties:
17  compatible:
18    const: qcom,ipq6018-pinctrl
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    description: Specifies the TLMM summary IRQ
25    maxItems: 1
26
27  interrupt-controller: true
28
29  '#interrupt-cells':
30    description:
31      Specifies the PIN numbers and Flags, as defined in defined in
32      include/dt-bindings/interrupt-controller/irq.h
33    const: 2
34
35  gpio-controller: true
36
37  '#gpio-cells':
38    description: Specifying the pin number and flags, as defined in
39      include/dt-bindings/gpio/gpio.h
40    const: 2
41
42  gpio-ranges:
43    maxItems: 1
44
45#PIN CONFIGURATION NODES
46patternProperties:
47  '-pinmux$':
48    type: object
49    description:
50      Pinctrl node's client devices use subnodes for desired pin configuration.
51      Client device subnodes use below standard properties.
52    $ref: "/schemas/pinctrl/pincfg-node.yaml"
53
54    properties:
55      pins:
56        description:
57          List of gpio pins affected by the properties specified in this
58          subnode.
59        items:
60          oneOf:
61            - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
62            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
63                      sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
64                      qdsd_data3 ]
65        minItems: 1
66        maxItems: 4
67
68      function:
69        description:
70          Specify the alternative function to be configured for the specified
71          pins.
72        enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
73                atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
74                atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
75                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c,
76                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi,
77                blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
78                blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
79                blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
80                blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
81                cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
82                cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
83                dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
84                flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
85                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0,
86                gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2,
87                ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc,
88                nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s,
89                pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
90                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
91                pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,
92                qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
93                qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
94                qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
95                qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write,
96                sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3,
97                uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
98
99      drive-strength:
100        enum: [2, 4, 6, 8, 10, 12, 14, 16]
101        default: 2
102        description:
103          Selects the drive strength for the specified pins, in mA.
104
105      bias-pull-down: true
106
107      bias-pull-up: true
108
109      bias-disable: true
110
111      output-high: true
112
113      output-low: true
114
115    required:
116      - pins
117      - function
118
119    additionalProperties: false
120
121allOf:
122  - $ref: "pinctrl.yaml#"
123
124required:
125  - compatible
126  - reg
127  - interrupts
128  - interrupt-controller
129  - '#interrupt-cells'
130  - gpio-controller
131  - '#gpio-cells'
132  - gpio-ranges
133
134additionalProperties: false
135
136examples:
137  - |
138        #include <dt-bindings/interrupt-controller/arm-gic.h>
139        tlmm: pinctrl@1000000 {
140              compatible = "qcom,ipq6018-pinctrl";
141              reg = <0x01000000 0x300000>;
142              interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
143              interrupt-controller;
144              #interrupt-cells = <2>;
145              gpio-controller;
146              #gpio-cells = <2>;
147              gpio-ranges = <&tlmm 0 0 80>;
148
149              serial3-pinmux {
150                      pins = "gpio44", "gpio45";
151                      function = "blsp2_uart";
152                      drive-strength = <8>;
153                      bias-pull-down;
154              };
155        };
156