1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ADC that forms part of an ASPEED server management processor. 8 9maintainers: 10 - Billy Tsai <billy_tsai@aspeedtech.com> 11 12description: | 13 • 10-bits resolution for 16 voltage channels. 14 • The device split into two individual engine and each contains 8 voltage 15 channels. 16 • Channel scanning can be non-continuous. 17 • Programmable ADC clock frequency. 18 • Programmable upper and lower threshold for each channels. 19 • Interrupt when larger or less than threshold for each channels. 20 • Support hysteresis for each channels. 21 • Built-in a compensating method. 22 • Built-in a register to trim internal reference voltage. 23 • Internal or External reference voltage. 24 • Support 2 Internal reference voltage 1.2v or 2.5v. 25 • Integrate dividing circuit for battery sensing. 26 27properties: 28 compatible: 29 enum: 30 - aspeed,ast2600-adc0 31 - aspeed,ast2600-adc1 32 description: 33 Their trimming data, which is used to calibrate internal reference volage, 34 locates in different address of OTP. 35 36 reg: 37 maxItems: 1 38 39 clocks: 40 maxItems: 1 41 description: 42 Input clock used to derive the sample clock. Expected to be the 43 SoC's APB clock. 44 45 resets: 46 maxItems: 1 47 48 "#io-channel-cells": 49 const: 1 50 51 vref-supply: 52 description: 53 The external regulator supply ADC reference voltage. 54 55 aspeed,int-vref-microvolt: 56 enum: [1200000, 2500000] 57 description: 58 ADC internal reference voltage in microvolts. 59 60 aspeed,battery-sensing: 61 type: boolean 62 description: 63 Inform the driver that last channel will be used to sensor battery. 64 65required: 66 - compatible 67 - reg 68 - clocks 69 - resets 70 - "#io-channel-cells" 71 72additionalProperties: false 73 74examples: 75 - | 76 #include <dt-bindings/clock/ast2600-clock.h> 77 adc0: adc@1e6e9000 { 78 compatible = "aspeed,ast2600-adc0"; 79 reg = <0x1e6e9000 0x100>; 80 clocks = <&syscon ASPEED_CLK_APB2>; 81 resets = <&syscon ASPEED_RESET_ADC>; 82 #io-channel-cells = <1>; 83 aspeed,int-vref-microvolt = <2500000>; 84 }; 85 adc1: adc@1e6e9100 { 86 compatible = "aspeed,ast2600-adc1"; 87 reg = <0x1e6e9100 0x100>; 88 clocks = <&syscon ASPEED_CLK_APB2>; 89 resets = <&syscon ASPEED_RESET_ADC>; 90 #io-channel-cells = <1>; 91 aspeed,int-vref-microvolt = <2500000>; 92 }; 93... 94