1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller Binding for SM8450
8
9maintainers:
10  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11
12description: |
13  Qualcomm camera clock control module which supports the clocks, resets and
14  power domains on SM8450.
15
16  See also include/dt-bindings/clock/qcom,sm8450-camcc.h
17
18properties:
19  compatible:
20    const: qcom,sm8450-camcc
21
22  clocks:
23    items:
24      - description: Camera AHB clock from GCC
25      - description: Board XO source
26      - description: Board active XO source
27      - description: Sleep clock source
28
29  power-domains:
30    maxItems: 1
31    description:
32      A phandle and PM domain specifier for the MMCX power domain.
33
34  required-opps:
35    description:
36      A phandle to an OPP node describing required MMCX performance point.
37
38  '#clock-cells':
39    const: 1
40
41  '#reset-cells':
42    const: 1
43
44  '#power-domain-cells':
45    const: 1
46
47  reg:
48    maxItems: 1
49
50required:
51  - compatible
52  - reg
53  - clocks
54  - power-domains
55  - required-opps
56  - '#clock-cells'
57  - '#reset-cells'
58  - '#power-domain-cells'
59
60additionalProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
65    #include <dt-bindings/clock/qcom,rpmh.h>
66    #include <dt-bindings/power/qcom-rpmpd.h>
67    clock-controller@ade0000 {
68      compatible = "qcom,sm8450-camcc";
69      reg = <0xade0000 0x20000>;
70      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
71               <&rpmhcc RPMH_CXO_CLK>,
72               <&rpmhcc RPMH_CXO_CLK_A>,
73               <&sleep_clk>;
74      power-domains = <&rpmhpd SM8450_MMCX>;
75      required-opps = <&rpmhpd_opp_low_svs>;
76      #clock-cells = <1>;
77      #reset-cells = <1>;
78      #power-domain-cells = <1>;
79    };
80...
81