1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: AHCI SATA Controller
8
9description: |
10  SATA nodes are defined to describe on-chip Serial ATA controllers.
11  Each SATA controller should have its own node.
12
13  It is possible, but not required, to represent each port as a sub-node.
14  It allows to enable each port independently when dealing with multiple
15  PHYs.
16
17maintainers:
18  - Hans de Goede <hdegoede@redhat.com>
19  - Jens Axboe <axboe@kernel.dk>
20
21select:
22  properties:
23    compatible:
24      contains:
25        enum:
26          - brcm,iproc-ahci
27          - cavium,octeon-7130-ahci
28          - hisilicon,hisi-ahci
29          - ibm,476gtr-ahci
30          - marvell,armada-3700-ahci
31          - marvell,armada-8k-ahci
32          - marvell,berlin2q-ahci
33  required:
34    - compatible
35
36allOf:
37  - $ref: "ahci-common.yaml#"
38
39properties:
40  compatible:
41    oneOf:
42      - items:
43          - enum:
44              - brcm,iproc-ahci
45              - marvell,armada-8k-ahci
46              - marvell,berlin2-ahci
47              - marvell,berlin2q-ahci
48          - const: generic-ahci
49      - enum:
50          - cavium,octeon-7130-ahci
51          - hisilicon,hisi-ahci
52          - ibm,476gtr-ahci
53          - marvell,armada-3700-ahci
54
55  reg:
56    minItems: 1
57    maxItems: 2
58
59  reg-names:
60    maxItems: 1
61
62  clocks:
63    minItems: 1
64    maxItems: 3
65
66  clock-names:
67    minItems: 1
68    maxItems: 3
69
70  interrupts:
71    maxItems: 1
72
73  power-domains:
74    maxItems: 1
75
76  resets:
77    maxItems: 1
78
79patternProperties:
80  "^sata-port@[0-9a-f]+$":
81    $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
82
83    anyOf:
84      - required: [ phys ]
85      - required: [ target-supply ]
86
87    unevaluatedProperties: false
88
89required:
90  - compatible
91  - reg
92  - interrupts
93
94unevaluatedProperties: false
95
96examples:
97  - |
98    sata@ffe08000 {
99        compatible = "snps,spear-ahci";
100        reg = <0xffe08000 0x1000>;
101        interrupts = <115>;
102    };
103  - |
104    #include <dt-bindings/interrupt-controller/arm-gic.h>
105    #include <dt-bindings/clock/berlin2q.h>
106    #include <dt-bindings/ata/ahci.h>
107
108    sata@f7e90000 {
109        compatible = "marvell,berlin2q-ahci", "generic-ahci";
110        reg = <0xf7e90000 0x1000>;
111        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
112        clocks = <&chip CLKID_SATA>;
113        #address-cells = <1>;
114        #size-cells = <0>;
115
116        hba-cap = <HBA_SMPS>;
117
118        sata0: sata-port@0 {
119            reg = <0>;
120
121            phys = <&sata_phy 0>;
122            target-supply = <&reg_sata0>;
123
124            hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
125        };
126
127        sata1: sata-port@1 {
128            reg = <1>;
129
130            phys = <&sata_phy 1>;
131            target-supply = <&reg_sata1>;
132
133            hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;
134        };
135    };
136