1.. SPDX-License-Identifier: GPL-2.0
2
3The VPBE V4L2 driver design
4===========================
5
6Functional partitioning
7-----------------------
8
9Consists of the following:
10
11 1. V4L2 display driver
12
13    Implements creation of video2 and video3 device nodes and
14    provides v4l2 device interface to manage VID0 and VID1 layers.
15
16 2. Display controller
17
18    Loads up VENC, OSD and external encoders such as ths8200. It provides
19    a set of API calls to V4L2 drivers to set the output/standards
20    in the VENC or external sub devices. It also provides
21    a device object to access the services from OSD subdevice
22    using sub device ops. The connection of external encoders to VENC LCD
23    controller port is done at init time based on default output and standard
24    selection or at run time when application change the output through
25    V4L2 IOCTLs.
26
27    When connected to an external encoder, vpbe controller is also responsible
28    for setting up the interface between VENC and external encoders based on
29    board specific settings (specified in board-xxx-evm.c). This allows
30    interfacing external encoders such as ths8200. The setup_if_config()
31    is implemented for this as well as configure_venc() (part of the next patch)
32    API to set timings in VENC for a specific display resolution. As of this
33    patch series, the interconnection and enabling and setting of the external
34    encoders is not present, and would be a part of the next patch series.
35
36 3. VENC subdevice module
37
38    Responsible for setting outputs provided through internal DACs and also
39    setting timings at LCD controller port when external encoders are connected
40    at the port or LCD panel timings required. When external encoder/LCD panel
41    is connected, the timings for a specific standard/preset is retrieved from
42    the board specific table and the values are used to set the timings in
43    venc using non-standard timing mode.
44
45    Support LCD Panel displays using the VENC. For example to support a Logic
46    PD display, it requires setting up the LCD controller port with a set of
47    timings for the resolution supported and setting the dot clock. So we could
48    add the available outputs as a board specific entry (i.e add the "LogicPD"
49    output name to board-xxx-evm.c). A table of timings for various LCDs
50    supported can be maintained in the board specific setup file to support
51    various LCD displays.As of this patch a basic driver is present, and this
52    support for external encoders and displays forms a part of the next
53    patch series.
54
55 4. OSD module
56
57    OSD module implements all OSD layer management and hardware specific
58    features. The VPBE module interacts with the OSD for enabling and
59    disabling appropriate features of the OSD.
60
61Current status
62--------------
63
64A fully functional working version of the V4L2 driver is available. This
65driver has been tested with NTSC and PAL standards and buffer streaming.
66