1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3
4 #define _RTL8188E_XMIT_C_
5 #include "../include/osdep_service.h"
6 #include "../include/drv_types.h"
7 #include "../include/wifi.h"
8 #include "../include/osdep_intf.h"
9 #include "../include/usb_ops.h"
10 #include "../include/rtl8188e_hal.h"
11
rtl8188eu_init_xmit_priv(struct adapter * adapt)12 s32 rtl8188eu_init_xmit_priv(struct adapter *adapt)
13 {
14 struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
15
16 tasklet_init(&pxmitpriv->xmit_tasklet,
17 rtl8188eu_xmit_tasklet,
18 (unsigned long)adapt);
19 return _SUCCESS;
20 }
21
rtl8188eu_cal_txdesc_chksum(struct tx_desc * ptxdesc)22 static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
23 {
24 u16 *usptr = (u16 *)ptxdesc;
25 u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
26 u32 index;
27 u16 checksum = 0;
28
29 /* Clear first */
30 ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
31
32 for (index = 0; index < count; index++)
33 checksum = checksum ^ le16_to_cpu(*(__le16 *)(usptr + index));
34 ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum);
35 }
36
37 /* Description: In normal chip, we should send some packet to Hw which will be used by Fw */
38 /* in FW LPS mode. The function is to fill the Tx descriptor of this packets, then */
39 /* Fw can tell Hw to send these packet derectly. */
rtl8188e_fill_fake_txdesc(struct adapter * adapt,u8 * desc,u32 BufferLen,u8 ispspoll,u8 is_btqosnull)40 void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u8 ispspoll, u8 is_btqosnull)
41 {
42 struct tx_desc *ptxdesc;
43
44 /* Clear all status */
45 ptxdesc = (struct tx_desc *)desc;
46 memset(desc, 0, TXDESC_SIZE);
47
48 /* offset 0 */
49 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
50
51 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */
52
53 ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */
54
55 /* offset 4 */
56 ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue */
57
58 /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
59 if (ispspoll) {
60 ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
61 } else {
62 ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */
63 ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */
64 }
65
66 if (is_btqosnull)
67 ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */
68
69 /* offset 16 */
70 ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
71
72 /* USB interface drop packet if the checksum of descriptor isn't correct. */
73 /* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
74 rtl8188eu_cal_txdesc_chksum(ptxdesc);
75 }
76
fill_txdesc_sectype(struct pkt_attrib * pattrib,struct tx_desc * ptxdesc)77 static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
78 {
79 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
80 switch (pattrib->encrypt) {
81 /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
82 case _WEP40_:
83 case _WEP104_:
84 ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
85 ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
86 break;
87 case _TKIP_:
88 case _TKIP_WTMIC_:
89 ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
90 ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
91 break;
92 case _AES_:
93 ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000);
94 ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
95 break;
96 case _NO_PRIVACY_:
97 default:
98 break;
99 }
100 }
101 }
102
fill_txdesc_vcs(struct pkt_attrib * pattrib,__le32 * pdw)103 static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
104 {
105 switch (pattrib->vcs_mode) {
106 case RTS_CTS:
107 *pdw |= cpu_to_le32(RTS_EN);
108 break;
109 case CTS_TO_SELF:
110 *pdw |= cpu_to_le32(CTS_2_SELF);
111 break;
112 case NONE_VCS:
113 default:
114 break;
115 }
116 if (pattrib->vcs_mode) {
117 *pdw |= cpu_to_le32(HW_RTS_EN);
118 /* Set RTS BW */
119 if (pattrib->ht_en) {
120 *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0;
121
122 if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
123 *pdw |= cpu_to_le32((0x01 << 28) & 0x30000000);
124 else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
125 *pdw |= cpu_to_le32((0x02 << 28) & 0x30000000);
126 else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
127 *pdw |= 0;
128 else
129 *pdw |= cpu_to_le32((0x03 << 28) & 0x30000000);
130 }
131 }
132 }
133
fill_txdesc_phy(struct pkt_attrib * pattrib,__le32 * pdw)134 static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw)
135 {
136 if (pattrib->ht_en) {
137 *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0;
138
139 if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
140 *pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000);
141 else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
142 *pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000);
143 else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
144 *pdw |= 0;
145 else
146 *pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000);
147 }
148 }
149
update_txdesc(struct xmit_frame * pxmitframe,u8 * pmem,s32 sz,u8 bagg_pkt)150 static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
151 {
152 int pull = 0;
153 uint qsel;
154 u8 data_rate, pwr_status, offset;
155 struct adapter *adapt = pxmitframe->padapter;
156 struct pkt_attrib *pattrib = &pxmitframe->attrib;
157 struct hal_data_8188e *haldata = &adapt->haldata;
158 struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
159 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
160 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
161
162 memset(ptxdesc, 0, sizeof(struct tx_desc));
163
164 /* 4 offset 0 */
165 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
166 ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */
167
168 offset = TXDESC_SIZE + OFFSET_SZ;
169
170 ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
171
172 if (is_multicast_ether_addr(pattrib->ra))
173 ptxdesc->txdw0 |= cpu_to_le32(BMC);
174
175 /* pkt_offset, unit:8 bytes padding */
176 if (pxmitframe->pkt_offset > 0)
177 ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
178
179 /* driver uses rate */
180 ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */
181
182 if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) {
183 /* offset 4 */
184 ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F);
185
186 qsel = (uint)(pattrib->qsel & 0x0000001f);
187 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
188
189 ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000);
190
191 fill_txdesc_sectype(pattrib, ptxdesc);
192
193 if (pattrib->ampdu_en) {
194 ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */
195 ptxdesc->txdw6 = cpu_to_le32(0x6666f800);
196 } else {
197 ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
198 }
199
200 /* offset 8 */
201
202 /* offset 12 */
203 ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
204
205 /* offset 16 , offset 20 */
206 if (pattrib->qos_en)
207 ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */
208
209 /* offset 20 */
210 if (pxmitframe->agg_num > 1)
211 ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000);
212
213 if ((pattrib->ether_type != 0x888e) &&
214 (pattrib->ether_type != 0x0806) &&
215 (pattrib->ether_type != 0x88b4) &&
216 (pattrib->dhcp_pkt != 1)) {
217 /* Non EAP & ARP & DHCP type data packet */
218
219 fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
220 fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
221
222 ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */
223 ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */
224
225 if (pattrib->ht_en) {
226 if (ODM_RA_GetShortGI_8188E(&haldata->odmpriv, pattrib->mac_id))
227 ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */
228 }
229 data_rate = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, pattrib->mac_id);
230 ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
231 pwr_status = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, pattrib->mac_id);
232 ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT);
233 } else {
234 /* EAP data packet and ARP packet and DHCP. */
235 /* Use the 1M data rate to send the EAP/ARP packet. */
236 /* This will maybe make the handshake smooth. */
237 ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
238 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
239 ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */
240 ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
241 }
242 } else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) {
243 /* offset 4 */
244 ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f);
245
246 qsel = (uint)(pattrib->qsel & 0x0000001f);
247 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
248
249 ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000);
250
251 /* offset 8 */
252 /* CCX-TXRPT ack for xmit mgmt frames. */
253 if (pxmitframe->ack_report)
254 ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
255
256 /* offset 12 */
257 ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
258
259 /* offset 20 */
260 ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */
261 if (pattrib->retry_ctrl)
262 ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */
263 else
264 ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
265
266 ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
267 } else if ((pxmitframe->frame_tag & 0x0f) != TXAGG_FRAMETAG) {
268 /* offset 4 */
269 ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */
270
271 ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000);/* raid */
272
273 /* offset 8 */
274
275 /* offset 12 */
276 ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000);
277
278 /* offset 20 */
279 ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
280 }
281
282 /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */
283 /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */
284 /* mgnt frame should be controlled by Hw because Fw will also send null data */
285 /* which we cannot control when Fw LPS enable. */
286 /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */
287 /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */
288 /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */
289 /* 2010.06.23. Added by tynli. */
290 if (!pattrib->qos_en) {
291 ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */
292 ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */
293 }
294
295 ODM_SetTxAntByTxInfo_88E(&haldata->odmpriv, pmem, pattrib->mac_id);
296
297 rtl8188eu_cal_txdesc_chksum(ptxdesc);
298 return pull;
299 }
300
301 /* for non-agg data frame or management frame */
rtw_dump_xframe(struct adapter * adapt,struct xmit_frame * pxmitframe)302 static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
303 {
304 s32 ret = _SUCCESS;
305 s32 inner_ret = _SUCCESS;
306 int t, sz, w_sz, pull = 0;
307 u8 *mem_addr;
308 u32 ff_hwaddr;
309 struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
310 struct pkt_attrib *pattrib = &pxmitframe->attrib;
311 struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
312 struct security_priv *psecuritypriv = &adapt->securitypriv;
313 if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
314 (pxmitframe->attrib.ether_type != 0x0806) &&
315 (pxmitframe->attrib.ether_type != 0x888e) &&
316 (pxmitframe->attrib.ether_type != 0x88b4) &&
317 (pxmitframe->attrib.dhcp_pkt != 1))
318 rtw_issue_addbareq_cmd(adapt, pxmitframe);
319 mem_addr = pxmitframe->buf_addr;
320
321 for (t = 0; t < pattrib->nr_frags; t++) {
322 if (inner_ret != _SUCCESS && ret == _SUCCESS)
323 ret = _FAIL;
324
325 if (t != (pattrib->nr_frags - 1)) {
326 sz = pxmitpriv->frag_len;
327 sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);
328 } else {
329 /* no frag */
330 sz = pattrib->last_txcmdsz;
331 }
332
333 pull = update_txdesc(pxmitframe, mem_addr, sz, false);
334
335 if (pull) {
336 mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */
337 pxmitframe->buf_addr = mem_addr;
338 w_sz = sz + TXDESC_SIZE;
339 } else {
340 w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
341 }
342 ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
343
344 inner_ret = rtw_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf);
345
346 rtw_count_tx_stats(adapt, pxmitframe, sz);
347
348 mem_addr += w_sz;
349
350 mem_addr = PTR_ALIGN(mem_addr, 4);
351 }
352
353 rtw_free_xmitframe(pxmitpriv, pxmitframe);
354
355 if (ret != _SUCCESS)
356 rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
357
358 return ret;
359 }
360
xmitframe_need_length(struct xmit_frame * pxmitframe)361 static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
362 {
363 struct pkt_attrib *pattrib = &pxmitframe->attrib;
364
365 u32 len = 0;
366
367 /* no consider fragement */
368 len = pattrib->hdrlen + pattrib->iv_len +
369 SNAP_SIZE + sizeof(u16) +
370 pattrib->pktlen +
371 ((pattrib->bswenc) ? pattrib->icv_len : 0);
372
373 if (pattrib->encrypt == _TKIP_)
374 len += 8;
375
376 return len;
377 }
378
rtl8188eu_xmitframe_complete(struct adapter * adapt,struct xmit_priv * pxmitpriv,struct xmit_buf * pxmitbuf)379 bool rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
380 {
381 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
382 struct xmit_frame *pxmitframe = NULL;
383 struct xmit_frame *pfirstframe = NULL;
384
385 /* aggregate variable */
386 struct hw_xmit *phwxmit;
387 struct sta_info *psta = NULL;
388 struct tx_servq *ptxservq = NULL;
389 struct list_head *xmitframe_plist = NULL, *xmitframe_phead = NULL;
390
391 u32 pbuf; /* next pkt address */
392 u32 pbuf_tail; /* last pkt tail */
393 u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */
394
395 u32 bulksize;
396 u8 desc_cnt;
397 u32 bulkptr;
398
399 /* dump frame variable */
400 u32 ff_hwaddr;
401
402 if (pdvobjpriv->pusbdev->speed == USB_SPEED_HIGH)
403 bulksize = USB_HIGH_SPEED_BULK_SIZE;
404 else
405 bulksize = USB_FULL_SPEED_BULK_SIZE;
406
407 /* check xmitbuffer is ok */
408 if (!pxmitbuf) {
409 pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
410 if (!pxmitbuf)
411 return false;
412 }
413
414 /* 3 1. pick up first frame */
415 rtw_free_xmitframe(pxmitpriv, pxmitframe);
416
417 pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
418 if (!pxmitframe) {
419 /* no more xmit frame, release xmit buffer */
420 rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
421 return false;
422 }
423
424 pxmitframe->pxmitbuf = pxmitbuf;
425 pxmitframe->buf_addr = pxmitbuf->pbuf;
426 pxmitbuf->priv_data = pxmitframe;
427
428 pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
429 pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
430
431 rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
432
433 /* always return ndis_packet after rtw_xmitframe_coalesce */
434 rtw_os_xmit_complete(adapt, pxmitframe);
435
436 /* 3 2. aggregate same priority and same DA(AP or STA) frames */
437 pfirstframe = pxmitframe;
438 len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
439 pbuf_tail = len;
440 pbuf = round_up(pbuf_tail, 8);
441
442 /* check pkt amount in one bulk */
443 desc_cnt = 0;
444 bulkptr = bulksize;
445 if (pbuf < bulkptr) {
446 desc_cnt++;
447 } else {
448 desc_cnt = 0;
449 bulkptr = ((pbuf / bulksize) + 1) * bulksize; /* round to next bulksize */
450 }
451
452 /* dequeue same priority packet from station tx queue */
453 psta = pfirstframe->attrib.psta;
454 switch (pfirstframe->attrib.priority) {
455 case 1:
456 case 2:
457 ptxservq = &psta->sta_xmitpriv.bk_q;
458 phwxmit = pxmitpriv->hwxmits + 3;
459 break;
460 case 4:
461 case 5:
462 ptxservq = &psta->sta_xmitpriv.vi_q;
463 phwxmit = pxmitpriv->hwxmits + 1;
464 break;
465 case 6:
466 case 7:
467 ptxservq = &psta->sta_xmitpriv.vo_q;
468 phwxmit = pxmitpriv->hwxmits;
469 break;
470 case 0:
471 case 3:
472 default:
473 ptxservq = &psta->sta_xmitpriv.be_q;
474 phwxmit = pxmitpriv->hwxmits + 2;
475 break;
476 }
477 spin_lock_bh(&pxmitpriv->lock);
478
479 xmitframe_phead = get_list_head(&ptxservq->sta_pending);
480 xmitframe_plist = xmitframe_phead->next;
481
482 while (xmitframe_phead != xmitframe_plist) {
483 pxmitframe = container_of(xmitframe_plist, struct xmit_frame, list);
484 xmitframe_plist = xmitframe_plist->next;
485
486 pxmitframe->agg_num = 0; /* not first frame of aggregation */
487 pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
488
489 len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
490
491 if (pbuf + len > MAX_XMITBUF_SZ) {
492 pxmitframe->agg_num = 1;
493 pxmitframe->pkt_offset = 1;
494 break;
495 }
496 list_del_init(&pxmitframe->list);
497 ptxservq->qcnt--;
498 phwxmit->accnt--;
499
500 pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
501
502 rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
503 /* always return ndis_packet after rtw_xmitframe_coalesce */
504 rtw_os_xmit_complete(adapt, pxmitframe);
505
506 /* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */
507 update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true);
508
509 /* don't need xmitframe any more */
510 rtw_free_xmitframe(pxmitpriv, pxmitframe);
511
512 /* handle pointer and stop condition */
513 pbuf_tail = pbuf + len;
514 pbuf = round_up(pbuf_tail, 8);
515
516 pfirstframe->agg_num++;
517 if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
518 break;
519
520 if (pbuf < bulkptr) {
521 desc_cnt++;
522 if (desc_cnt == USB_TXAGG_DESC_NUM)
523 break;
524 } else {
525 desc_cnt = 0;
526 bulkptr = ((pbuf / bulksize) + 1) * bulksize;
527 }
528 } /* end while (aggregate same priority and same DA(AP or STA) frames) */
529
530 if (list_empty(&ptxservq->sta_pending.queue))
531 list_del_init(&ptxservq->tx_pending);
532
533 spin_unlock_bh(&pxmitpriv->lock);
534 if ((pfirstframe->attrib.ether_type != 0x0806) &&
535 (pfirstframe->attrib.ether_type != 0x888e) &&
536 (pfirstframe->attrib.ether_type != 0x88b4) &&
537 (pfirstframe->attrib.dhcp_pkt != 1))
538 rtw_issue_addbareq_cmd(adapt, pfirstframe);
539 /* 3 3. update first frame txdesc */
540 if ((pbuf_tail % bulksize) == 0) {
541 /* remove pkt_offset */
542 pbuf_tail -= PACKET_OFFSET_SZ;
543 pfirstframe->buf_addr += PACKET_OFFSET_SZ;
544 pfirstframe->pkt_offset--;
545 }
546
547 update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true);
548
549 /* 3 4. write xmit buffer to USB FIFO */
550 ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
551 rtw_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf);
552
553 /* 3 5. update statisitc */
554 pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
555 pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
556
557 rtw_count_tx_stats(adapt, pfirstframe, pbuf_tail);
558
559 rtw_free_xmitframe(pxmitpriv, pfirstframe);
560
561 return true;
562 }
563
xmitframe_direct(struct adapter * adapt,struct xmit_frame * pxmitframe)564 static s32 xmitframe_direct(struct adapter *adapt, struct xmit_frame *pxmitframe)
565 {
566 s32 res = _SUCCESS;
567
568 res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
569 if (res == _SUCCESS)
570 rtw_dump_xframe(adapt, pxmitframe);
571
572 return res;
573 }
574
575 /*
576 * Return
577 * true dump packet directly
578 * false enqueue packet
579 */
pre_xmitframe(struct adapter * adapt,struct xmit_frame * pxmitframe)580 static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
581 {
582 s32 res;
583 struct xmit_buf *pxmitbuf = NULL;
584 struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
585 struct pkt_attrib *pattrib = &pxmitframe->attrib;
586 struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
587
588 spin_lock_bh(&pxmitpriv->lock);
589
590 if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0)
591 goto enqueue;
592
593 if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING))
594 goto enqueue;
595
596 pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
597 if (!pxmitbuf)
598 goto enqueue;
599
600 spin_unlock_bh(&pxmitpriv->lock);
601
602 pxmitframe->pxmitbuf = pxmitbuf;
603 pxmitframe->buf_addr = pxmitbuf->pbuf;
604 pxmitbuf->priv_data = pxmitframe;
605
606 if (xmitframe_direct(adapt, pxmitframe) != _SUCCESS) {
607 rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
608 rtw_free_xmitframe(pxmitpriv, pxmitframe);
609 }
610
611 return true;
612
613 enqueue:
614 res = rtw_xmitframe_enqueue(adapt, pxmitframe);
615 spin_unlock_bh(&pxmitpriv->lock);
616
617 if (res != _SUCCESS) {
618 rtw_free_xmitframe(pxmitpriv, pxmitframe);
619
620 /* Trick, make the statistics correct */
621 pxmitpriv->tx_pkts--;
622 pxmitpriv->tx_drop++;
623 return true;
624 }
625
626 return false;
627 }
628
rtl8188eu_mgnt_xmit(struct adapter * adapt,struct xmit_frame * pmgntframe)629 s32 rtl8188eu_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe)
630 {
631 return rtw_dump_xframe(adapt, pmgntframe);
632 }
633
634 /*
635 * Return
636 * true dump packet directly ok
637 * false temporary can't transmit packets to hardware
638 */
rtl8188eu_hal_xmit(struct adapter * adapt,struct xmit_frame * pxmitframe)639 s32 rtl8188eu_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
640 {
641 return pre_xmitframe(adapt, pxmitframe);
642 }
643