1 /*
2  * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  *
5  * This program is free software; you may redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; version 2 of the License.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16  * SOFTWARE.
17  */
18 #ifndef _FNIC_IO_H_
19 #define _FNIC_IO_H_
20 
21 #include <scsi/fc/fc_fcp.h>
22 
23 #define FNIC_DFLT_SG_DESC_CNT  32
24 #define FNIC_MAX_SG_DESC_CNT        256     /* Maximum descriptors per sgl */
25 #define FNIC_SG_DESC_ALIGN          16      /* Descriptor address alignment */
26 
27 struct host_sg_desc {
28 	__le64 addr;
29 	__le32 len;
30 	u32 _resvd;
31 };
32 
33 struct fnic_dflt_sgl_list {
34 	struct host_sg_desc sg_desc[FNIC_DFLT_SG_DESC_CNT];
35 };
36 
37 struct fnic_sgl_list {
38 	struct host_sg_desc sg_desc[FNIC_MAX_SG_DESC_CNT];
39 };
40 
41 enum fnic_sgl_list_type {
42 	FNIC_SGL_CACHE_DFLT = 0,  /* cache with default size sgl */
43 	FNIC_SGL_CACHE_MAX,       /* cache with max size sgl */
44 	FNIC_SGL_NUM_CACHES       /* number of sgl caches */
45 };
46 
47 enum fnic_ioreq_state {
48 	FNIC_IOREQ_NOT_INITED = 0,
49 	FNIC_IOREQ_CMD_PENDING,
50 	FNIC_IOREQ_ABTS_PENDING,
51 	FNIC_IOREQ_ABTS_COMPLETE,
52 	FNIC_IOREQ_CMD_COMPLETE,
53 };
54 
55 struct fnic_io_req {
56 	struct host_sg_desc *sgl_list; /* sgl list */
57 	void *sgl_list_alloc; /* sgl list address used for free */
58 	dma_addr_t sense_buf_pa; /* dma address for sense buffer*/
59 	dma_addr_t sgl_list_pa;	/* dma address for sgl list */
60 	u16 sgl_cnt;
61 	u8 sgl_type; /* device DMA descriptor list type */
62 	u8 io_completed:1; /* set to 1 when fw completes IO */
63 	u32 port_id; /* remote port DID */
64 	unsigned long start_time; /* in jiffies */
65 	struct completion *abts_done; /* completion for abts */
66 	struct completion *dr_done; /* completion for device reset */
67 };
68 
69 enum fnic_port_speeds {
70 	DCEM_PORTSPEED_NONE = 0,
71 	DCEM_PORTSPEED_1G    = 1000,
72 	DCEM_PORTSPEED_10G   = 10000,
73 	DCEM_PORTSPEED_20G   = 20000,
74 	DCEM_PORTSPEED_25G   = 25000,
75 	DCEM_PORTSPEED_40G   = 40000,
76 	DCEM_PORTSPEED_4x10G = 41000,
77 	DCEM_PORTSPEED_100G  = 100000,
78 };
79 #endif /* _FNIC_IO_H_ */
80