1 /******************************************************************************
2  * This software may be used and distributed according to the terms of
3  * the GNU General Public License (GPL), incorporated herein by reference.
4  * Drivers based on or derived from this code fall under the GPL and must
5  * retain the authorship, copyright and license notice.  This file is not
6  * a complete program and may only be used when the entire operating
7  * system is licensed under the GPL.
8  * See the file COPYING in this distribution for more information.
9  *
10  * vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
11  *              Virtualized Server Adapter.
12  * Copyright(c) 2002-2010 Exar Corp.
13  ******************************************************************************/
14 #ifndef VXGE_MAIN_H
15 #define VXGE_MAIN_H
16 
17 #include "vxge-traffic.h"
18 #include "vxge-config.h"
19 #include "vxge-version.h"
20 #include <linux/list.h>
21 #include <linux/bitops.h>
22 #include <linux/if_vlan.h>
23 
24 #define VXGE_DRIVER_NAME		"vxge"
25 #define VXGE_DRIVER_VENDOR		"Neterion, Inc"
26 #define VXGE_DRIVER_FW_VERSION_MAJOR	1
27 
28 #define DRV_VERSION	VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
29 	VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
30 	VXGE_VERSION_FOR
31 
32 #define PCI_DEVICE_ID_TITAN_WIN		0x5733
33 #define PCI_DEVICE_ID_TITAN_UNI		0x5833
34 #define VXGE_HW_TITAN1_PCI_REVISION	1
35 #define VXGE_HW_TITAN1A_PCI_REVISION	2
36 
37 #define	VXGE_USE_DEFAULT		0xffffffff
38 #define VXGE_HW_VPATH_MSIX_ACTIVE	4
39 #define VXGE_ALARM_MSIX_ID		2
40 #define VXGE_HW_RXSYNC_FREQ_CNT		4
41 #define VXGE_LL_WATCH_DOG_TIMEOUT	(15 * HZ)
42 #define VXGE_LL_RX_COPY_THRESHOLD	256
43 #define VXGE_DEF_FIFO_LENGTH		84
44 
45 #define NO_STEERING		0
46 #define PORT_STEERING		0x1
47 #define RTH_STEERING		0x2
48 #define RX_TOS_STEERING		0x3
49 #define RX_VLAN_STEERING	0x4
50 #define RTH_BUCKET_SIZE		4
51 
52 #define	TX_PRIORITY_STEERING	1
53 #define	TX_VLAN_STEERING	2
54 #define	TX_PORT_STEERING	3
55 #define	TX_MULTIQ_STEERING	4
56 
57 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
58 
59 #define VXGE_TTI_BTIMER_VAL 250000
60 
61 #define VXGE_TTI_LTIMER_VAL	1000
62 #define VXGE_T1A_TTI_LTIMER_VAL	80
63 #define VXGE_TTI_RTIMER_VAL	0
64 #define VXGE_TTI_RTIMER_ADAPT_VAL	10
65 #define VXGE_T1A_TTI_RTIMER_VAL	400
66 #define VXGE_RTI_BTIMER_VAL	250
67 #define VXGE_RTI_LTIMER_VAL	100
68 #define VXGE_RTI_RTIMER_VAL	0
69 #define VXGE_RTI_RTIMER_ADAPT_VAL	15
70 #define VXGE_FIFO_INDICATE_MAX_PKTS	VXGE_DEF_FIFO_LENGTH
71 #define VXGE_ISR_POLLING_CNT 	8
72 #define VXGE_MAX_CONFIG_DEV	0xFF
73 #define VXGE_EXEC_MODE_DISABLE	0
74 #define VXGE_EXEC_MODE_ENABLE	1
75 #define VXGE_MAX_CONFIG_PORT	1
76 #define VXGE_ALL_VID_DISABLE	0
77 #define VXGE_ALL_VID_ENABLE	1
78 #define VXGE_PAUSE_CTRL_DISABLE	0
79 #define VXGE_PAUSE_CTRL_ENABLE	1
80 
81 #define TTI_TX_URANGE_A	5
82 #define TTI_TX_URANGE_B	15
83 #define TTI_TX_URANGE_C	40
84 #define TTI_TX_UFC_A	5
85 #define TTI_TX_UFC_B	40
86 #define TTI_TX_UFC_C	60
87 #define TTI_TX_UFC_D	100
88 #define TTI_T1A_TX_UFC_A	30
89 #define TTI_T1A_TX_UFC_B	80
90 /* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */
91 /* Slope - 93 */
92 /* 60 - 9k Mtu, 140 - 1.5k mtu */
93 #define TTI_T1A_TX_UFC_C(mtu)	(60 + ((VXGE_HW_MAX_MTU - mtu) / 93))
94 
95 /* Slope - 37 */
96 /* 100 - 9k Mtu, 300 - 1.5k mtu */
97 #define TTI_T1A_TX_UFC_D(mtu)	(100 + ((VXGE_HW_MAX_MTU - mtu) / 37))
98 
99 
100 #define RTI_RX_URANGE_A		5
101 #define RTI_RX_URANGE_B		15
102 #define RTI_RX_URANGE_C		40
103 #define RTI_T1A_RX_URANGE_A	1
104 #define RTI_T1A_RX_URANGE_B	20
105 #define RTI_T1A_RX_URANGE_C	50
106 #define RTI_RX_UFC_A		1
107 #define RTI_RX_UFC_B		5
108 #define RTI_RX_UFC_C		10
109 #define RTI_RX_UFC_D		15
110 #define RTI_T1A_RX_UFC_B	20
111 #define RTI_T1A_RX_UFC_C	50
112 #define RTI_T1A_RX_UFC_D	60
113 
114 /*
115  * The interrupt rate is maintained at 3k per second with the moderation
116  * parameters for most traffic but not all. This is the maximum interrupt
117  * count allowed per function with INTA or per vector in the case of
118  * MSI-X in a 10 millisecond time period. Enabled only for Titan 1A.
119  */
120 #define VXGE_T1A_MAX_INTERRUPT_COUNT	100
121 #define VXGE_T1A_MAX_TX_INTERRUPT_COUNT	200
122 
123 /* Milli secs timer period */
124 #define VXGE_TIMER_DELAY		10000
125 
126 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
127 
128 #define is_sriov(function_mode) \
129 	((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
130 	(function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
131 	(function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
132 
133 enum vxge_reset_event {
134 	/* reset events */
135 	VXGE_LL_VPATH_RESET	= 0,
136 	VXGE_LL_DEVICE_RESET	= 1,
137 	VXGE_LL_FULL_RESET	= 2,
138 	VXGE_LL_START_RESET	= 3,
139 	VXGE_LL_COMPL_RESET	= 4
140 };
141 /* These flags represent the devices temporary state */
142 enum vxge_device_state_t {
143 __VXGE_STATE_RESET_CARD = 0,
144 __VXGE_STATE_CARD_UP
145 };
146 
147 enum vxge_mac_addr_state {
148 	/* mac address states */
149 	VXGE_LL_MAC_ADDR_IN_LIST        = 0,
150 	VXGE_LL_MAC_ADDR_IN_DA_TABLE    = 1
151 };
152 
153 struct vxge_drv_config {
154 	int config_dev_cnt;
155 	int total_dev_cnt;
156 	int g_no_cpus;
157 	unsigned int vpath_per_dev;
158 };
159 
160 struct macInfo {
161 	unsigned char macaddr[ETH_ALEN];
162 	unsigned char macmask[ETH_ALEN];
163 	unsigned int vpath_no;
164 	enum vxge_mac_addr_state state;
165 };
166 
167 struct vxge_config {
168 	int		tx_pause_enable;
169 	int		rx_pause_enable;
170 	int		napi_weight;
171 	int		intr_type;
172 #define INTA	0
173 #define MSI	1
174 #define MSI_X	2
175 
176 	int		addr_learn_en;
177 
178 	u32		rth_steering:2,
179 			rth_algorithm:2,
180 			rth_hash_type_tcpipv4:1,
181 			rth_hash_type_ipv4:1,
182 			rth_hash_type_tcpipv6:1,
183 			rth_hash_type_ipv6:1,
184 			rth_hash_type_tcpipv6ex:1,
185 			rth_hash_type_ipv6ex:1,
186 			rth_bkt_sz:8;
187 	int		rth_jhash_golden_ratio;
188 	int		tx_steering_type;
189 	int 	fifo_indicate_max_pkts;
190 	struct vxge_hw_device_hw_info device_hw_info;
191 };
192 
193 struct vxge_msix_entry {
194 	/* Mimicing the msix_entry struct of Kernel. */
195 	u16 vector;
196 	u16 entry;
197 	u16 in_use;
198 	void *arg;
199 };
200 
201 /* Software Statistics */
202 
203 struct vxge_sw_stats {
204 
205 	/* Virtual Path */
206 	unsigned long vpaths_open;
207 	unsigned long vpath_open_fail;
208 
209 	/* Misc. */
210 	unsigned long link_up;
211 	unsigned long link_down;
212 };
213 
214 struct vxge_mac_addrs {
215 	struct list_head item;
216 	u64 macaddr;
217 	u64 macmask;
218 	enum vxge_mac_addr_state state;
219 };
220 
221 struct vxgedev;
222 
223 struct vxge_fifo_stats {
224 	struct u64_stats_sync	syncp;
225 	u64 tx_frms;
226 	u64 tx_bytes;
227 
228 	unsigned long tx_errors;
229 	unsigned long txd_not_free;
230 	unsigned long txd_out_of_desc;
231 	unsigned long pci_map_fail;
232 };
233 
234 struct vxge_fifo {
235 	struct net_device *ndev;
236 	struct pci_dev *pdev;
237 	struct __vxge_hw_fifo *handle;
238 	struct netdev_queue *txq;
239 
240 	int tx_steering_type;
241 	int indicate_max_pkts;
242 
243 	/* Adaptive interrupt moderation parameters used in T1A */
244 	unsigned long interrupt_count;
245 	unsigned long jiffies;
246 
247 	u32 tx_vector_no;
248 	/* Tx stats */
249 	struct vxge_fifo_stats stats;
250 } ____cacheline_aligned;
251 
252 struct vxge_ring_stats {
253 	struct u64_stats_sync syncp;
254 	u64 rx_frms;
255 	u64 rx_mcast;
256 	u64 rx_bytes;
257 
258 	unsigned long rx_errors;
259 	unsigned long rx_dropped;
260 	unsigned long prev_rx_frms;
261 	unsigned long pci_map_fail;
262 	unsigned long skb_alloc_fail;
263 };
264 
265 struct vxge_ring {
266 	struct net_device	*ndev;
267 	struct pci_dev		*pdev;
268 	struct __vxge_hw_ring	*handle;
269 	/* The vpath id maintained in the driver -
270 	 * 0 to 'maximum_vpaths_in_function - 1'
271 	 */
272 	int driver_id;
273 
274 	/* Adaptive interrupt moderation parameters used in T1A */
275 	unsigned long interrupt_count;
276 	unsigned long jiffies;
277 
278 	/* copy of the flag indicating whether rx_hwts is to be used */
279 	u32 rx_hwts:1;
280 
281 	int pkts_processed;
282 	int budget;
283 
284 	struct napi_struct napi;
285 	struct napi_struct *napi_p;
286 
287 #define VXGE_MAX_MAC_ADDR_COUNT		30
288 
289 	int vlan_tag_strip;
290 	u32 rx_vector_no;
291 	enum vxge_hw_status last_status;
292 
293 	/* Rx stats */
294 	struct vxge_ring_stats stats;
295 } ____cacheline_aligned;
296 
297 struct vxge_vpath {
298 	struct vxge_fifo fifo;
299 	struct vxge_ring ring;
300 
301 	struct __vxge_hw_vpath_handle *handle;
302 
303 	/* Actual vpath id for this vpath in the device - 0 to 16 */
304 	int device_id;
305 	int max_mac_addr_cnt;
306 	int is_configured;
307 	int is_open;
308 	struct vxgedev *vdev;
309 	u8 macaddr[ETH_ALEN];
310 	u8 macmask[ETH_ALEN];
311 
312 #define VXGE_MAX_LEARN_MAC_ADDR_CNT	2048
313 	/* mac addresses currently programmed into NIC */
314 	u16 mac_addr_cnt;
315 	u16 mcast_addr_cnt;
316 	struct list_head mac_addr_list;
317 
318 	u32 level_err;
319 	u32 level_trace;
320 };
321 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) {	\
322 	for (i = 0; i < vdev->no_of_vpath; i++) {		\
323 		vdev->vpaths[i].level_err = err;		\
324 		vdev->vpaths[i].level_trace = trace;		\
325 	}							\
326 	vdev->level_err = err;					\
327 	vdev->level_trace = trace;				\
328 }
329 
330 struct vxgedev {
331 	struct net_device	*ndev;
332 	struct pci_dev		*pdev;
333 	struct __vxge_hw_device *devh;
334 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
335 	int vlan_tag_strip;
336 	struct vxge_config	config;
337 	unsigned long	state;
338 
339 	/* Indicates which vpath to reset */
340 	unsigned long  vp_reset;
341 
342 	/* Timer used for polling vpath resets */
343 	struct timer_list vp_reset_timer;
344 
345 	/* Timer used for polling vpath lockup */
346 	struct timer_list vp_lockup_timer;
347 
348 	/*
349 	 * Flags to track whether device is in All Multicast
350 	 * or in promiscuous mode.
351 	 */
352 	u16		all_multi_flg;
353 
354 	/* A flag indicating whether rx_hwts is to be used or not. */
355 	u32	rx_hwts:1,
356 		titan1:1;
357 
358 	struct vxge_msix_entry *vxge_entries;
359 	struct msix_entry *entries;
360 	/*
361 	 * 4 for each vpath * 17;
362 	 * total is 68
363 	 */
364 #define	VXGE_MAX_REQUESTED_MSIX	68
365 #define VXGE_INTR_STRLEN 80
366 	char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
367 
368 	enum vxge_hw_event cric_err_event;
369 
370 	int max_vpath_supported;
371 	int no_of_vpath;
372 
373 	struct napi_struct napi;
374 	/* A debug option, when enabled and if error condition occurs,
375 	 * the driver will do following steps:
376 	 * - mask all interrupts
377 	 * - Not clear the source of the alarm
378 	 * - gracefully stop all I/O
379 	 * A diagnostic dump of register and stats at this point
380 	 * reveals very useful information.
381 	 */
382 	int exec_mode;
383 	int max_config_port;
384 	struct vxge_vpath	*vpaths;
385 
386 	struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
387 	void __iomem *bar0;
388 	struct vxge_sw_stats	stats;
389 	int		mtu;
390 	/* Below variables are used for vpath selection to transmit a packet */
391 	u8 		vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
392 	u64		vpaths_deployed;
393 
394 	u32 		intr_cnt;
395 	u32 		level_err;
396 	u32 		level_trace;
397 	char		fw_version[VXGE_HW_FW_STRLEN];
398 	struct work_struct reset_task;
399 };
400 
401 struct vxge_rx_priv {
402 	struct sk_buff		*skb;
403 	unsigned char		*skb_data;
404 	dma_addr_t		data_dma;
405 	dma_addr_t		data_size;
406 };
407 
408 struct vxge_tx_priv {
409 	struct sk_buff		*skb;
410 	dma_addr_t		dma_buffers[MAX_SKB_FRAGS+1];
411 };
412 
413 #define VXGE_MODULE_PARAM_INT(p, val) \
414 	static int p = val; \
415 	module_param(p, int, 0)
416 
417 static inline
vxge_os_timer(struct timer_list * timer,void (* func)(struct timer_list *),unsigned long timeout)418 void vxge_os_timer(struct timer_list *timer, void (*func)(struct timer_list *),
419 		   unsigned long timeout)
420 {
421 	timer_setup(timer, func, 0);
422 	mod_timer(timer, jiffies + timeout);
423 }
424 
425 void vxge_initialize_ethtool_ops(struct net_device *ndev);
426 int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
427 
428 /* #define VXGE_DEBUG_INIT: debug for initialization functions
429  * #define VXGE_DEBUG_TX	 : debug transmit related functions
430  * #define VXGE_DEBUG_RX  : debug recevice related functions
431  * #define VXGE_DEBUG_MEM : debug memory module
432  * #define VXGE_DEBUG_LOCK: debug locks
433  * #define VXGE_DEBUG_SEM : debug semaphore
434  * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
435 */
436 #define VXGE_DEBUG_INIT		0x00000001
437 #define VXGE_DEBUG_TX		0x00000002
438 #define VXGE_DEBUG_RX		0x00000004
439 #define VXGE_DEBUG_MEM		0x00000008
440 #define VXGE_DEBUG_LOCK		0x00000010
441 #define VXGE_DEBUG_SEM		0x00000020
442 #define VXGE_DEBUG_ENTRYEXIT	0x00000040
443 #define VXGE_DEBUG_INTR		0x00000080
444 #define VXGE_DEBUG_LL_CONFIG	0x00000100
445 
446 /* Debug tracing for VXGE driver */
447 #ifndef VXGE_DEBUG_MASK
448 #define VXGE_DEBUG_MASK	0x0
449 #endif
450 
451 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
452 #define vxge_debug_ll_config(level, fmt, ...) \
453 	vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, ##__VA_ARGS__)
454 #else
455 #define vxge_debug_ll_config(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
456 #endif
457 
458 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
459 #define vxge_debug_init(level, fmt, ...) \
460 	vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, ##__VA_ARGS__)
461 #else
462 #define vxge_debug_init(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
463 #endif
464 
465 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
466 #define vxge_debug_tx(level, fmt, ...) \
467 	vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, ##__VA_ARGS__)
468 #else
469 #define vxge_debug_tx(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
470 #endif
471 
472 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
473 #define vxge_debug_rx(level, fmt, ...) \
474 	vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, ##__VA_ARGS__)
475 #else
476 #define vxge_debug_rx(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
477 #endif
478 
479 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
480 #define vxge_debug_mem(level, fmt, ...) \
481 	vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, ##__VA_ARGS__)
482 #else
483 #define vxge_debug_mem(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
484 #endif
485 
486 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
487 #define vxge_debug_entryexit(level, fmt, ...) \
488 	vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, ##__VA_ARGS__)
489 #else
490 #define vxge_debug_entryexit(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
491 #endif
492 
493 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
494 #define vxge_debug_intr(level, fmt, ...) \
495 	vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, ##__VA_ARGS__)
496 #else
497 #define vxge_debug_intr(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
498 #endif
499 
500 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
501 	vxge_hw_device_debug_set((struct __vxge_hw_device  *)vdev->devh, \
502 		level, mask);\
503 	VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
504 		vxge_hw_device_error_level_get((struct __vxge_hw_device  *) \
505 			vdev->devh), \
506 		vxge_hw_device_trace_level_get((struct __vxge_hw_device  *) \
507 			vdev->devh));\
508 }
509 
510 #ifdef NETIF_F_GSO
511 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
512 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
513 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
514 #endif
515 
516 #endif
517