1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * OpenFirmware helpers for memory drivers
4 *
5 * Copyright (C) 2012 Texas Instruments, Inc.
6 * Copyright (C) 2019 Samsung Electronics Co., Ltd.
7 * Copyright (C) 2020 Krzysztof Kozlowski <krzk@kernel.org>
8 */
9
10 #include <linux/device.h>
11 #include <linux/of.h>
12 #include <linux/gfp.h>
13 #include <linux/export.h>
14
15 #include "jedec_ddr.h"
16 #include "of_memory.h"
17
18 /**
19 * of_get_min_tck() - extract min timing values for ddr
20 * @np: pointer to ddr device tree node
21 * @dev: device requesting for min timing values
22 *
23 * Populates the lpddr2_min_tck structure by extracting data
24 * from device tree node. Returns a pointer to the populated
25 * structure. If any error in populating the structure, returns
26 * default min timings provided by JEDEC.
27 */
of_get_min_tck(struct device_node * np,struct device * dev)28 const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np,
29 struct device *dev)
30 {
31 int ret = 0;
32 struct lpddr2_min_tck *min;
33
34 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
35 if (!min)
36 goto default_min_tck;
37
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
41 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin);
42 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
43 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
44 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
45 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
46 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
47 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
48 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
49
50 if (ret) {
51 devm_kfree(dev, min);
52 goto default_min_tck;
53 }
54
55 return min;
56
57 default_min_tck:
58 dev_warn(dev, "Using default min-tck values\n");
59 return &lpddr2_jedec_min_tck;
60 }
61 EXPORT_SYMBOL(of_get_min_tck);
62
of_do_get_timings(struct device_node * np,struct lpddr2_timings * tim)63 static int of_do_get_timings(struct device_node *np,
64 struct lpddr2_timings *tim)
65 {
66 int ret;
67
68 ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
69 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
70 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
71 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
72 ret |= of_property_read_u32(np, "tWR", &tim->tWR);
73 ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min);
74 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
75 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
76 ret |= of_property_read_u32(np, "tXP", &tim->tXP);
77 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
78 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
79 ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max);
80 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
81 ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS);
82 ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL);
83 ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit);
84 ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns);
85 ret |= of_property_read_u32(np, "tDQSCK-max-derated",
86 &tim->tDQSCK_max_derated);
87
88 return ret;
89 }
90
91 /**
92 * of_get_ddr_timings() - extracts the ddr timings and updates no of
93 * frequencies available.
94 * @np_ddr: Pointer to ddr device tree node
95 * @dev: Device requesting for ddr timings
96 * @device_type: Type of ddr(LPDDR2 S2/S4)
97 * @nr_frequencies: No of frequencies available for ddr
98 * (updated by this function)
99 *
100 * Populates lpddr2_timings structure by extracting data from device
101 * tree node. Returns pointer to populated structure. If any error
102 * while populating, returns default timings provided by JEDEC.
103 */
of_get_ddr_timings(struct device_node * np_ddr,struct device * dev,u32 device_type,u32 * nr_frequencies)104 const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
105 struct device *dev,
106 u32 device_type,
107 u32 *nr_frequencies)
108 {
109 struct lpddr2_timings *timings = NULL;
110 u32 arr_sz = 0, i = 0;
111 struct device_node *np_tim;
112 char *tim_compat = NULL;
113
114 switch (device_type) {
115 case DDR_TYPE_LPDDR2_S2:
116 case DDR_TYPE_LPDDR2_S4:
117 tim_compat = "jedec,lpddr2-timings";
118 break;
119 default:
120 dev_warn(dev, "Unsupported memory type\n");
121 }
122
123 for_each_child_of_node(np_ddr, np_tim)
124 if (of_device_is_compatible(np_tim, tim_compat))
125 arr_sz++;
126
127 if (arr_sz)
128 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
129 GFP_KERNEL);
130
131 if (!timings)
132 goto default_timings;
133
134 for_each_child_of_node(np_ddr, np_tim) {
135 if (of_device_is_compatible(np_tim, tim_compat)) {
136 if (of_do_get_timings(np_tim, &timings[i])) {
137 devm_kfree(dev, timings);
138 goto default_timings;
139 }
140 i++;
141 }
142 }
143
144 *nr_frequencies = arr_sz;
145
146 return timings;
147
148 default_timings:
149 dev_warn(dev, "Using default memory timings\n");
150 *nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings);
151 return lpddr2_jedec_timings;
152 }
153 EXPORT_SYMBOL(of_get_ddr_timings);
154
155 /**
156 * of_lpddr3_get_min_tck() - extract min timing values for lpddr3
157 * @np: pointer to ddr device tree node
158 * @dev: device requesting for min timing values
159 *
160 * Populates the lpddr3_min_tck structure by extracting data
161 * from device tree node. Returns a pointer to the populated
162 * structure. If any error in populating the structure, returns NULL.
163 */
of_lpddr3_get_min_tck(struct device_node * np,struct device * dev)164 const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
165 struct device *dev)
166 {
167 int ret = 0;
168 struct lpddr3_min_tck *min;
169
170 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
171 if (!min)
172 goto default_min_tck;
173
174 ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC);
175 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
176 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
177 ret |= of_property_read_u32(np, "tRPpb-min-tck", &min->tRPpb);
178 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
179 ret |= of_property_read_u32(np, "tRC-min-tck", &min->tRC);
180 ret |= of_property_read_u32(np, "tRAS-min-tck", &min->tRAS);
181 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
182 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
183 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
184 ret |= of_property_read_u32(np, "tW2W-C2C-min-tck", &min->tW2W_C2C);
185 ret |= of_property_read_u32(np, "tR2R-C2C-min-tck", &min->tR2R_C2C);
186 ret |= of_property_read_u32(np, "tWL-min-tck", &min->tWL);
187 ret |= of_property_read_u32(np, "tDQSCK-min-tck", &min->tDQSCK);
188 ret |= of_property_read_u32(np, "tRL-min-tck", &min->tRL);
189 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
190 ret |= of_property_read_u32(np, "tXSR-min-tck", &min->tXSR);
191 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
192 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
193 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
194 ret |= of_property_read_u32(np, "tMRD-min-tck", &min->tMRD);
195
196 if (ret) {
197 dev_warn(dev, "Errors while parsing min-tck values\n");
198 devm_kfree(dev, min);
199 goto default_min_tck;
200 }
201
202 return min;
203
204 default_min_tck:
205 dev_warn(dev, "Using default min-tck values\n");
206 return NULL;
207 }
208 EXPORT_SYMBOL(of_lpddr3_get_min_tck);
209
of_lpddr3_do_get_timings(struct device_node * np,struct lpddr3_timings * tim)210 static int of_lpddr3_do_get_timings(struct device_node *np,
211 struct lpddr3_timings *tim)
212 {
213 int ret;
214
215 ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
216 if (ret)
217 /* Deprecated way of passing max-freq as 'reg' */
218 ret = of_property_read_u32(np, "reg", &tim->max_freq);
219 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
220 ret |= of_property_read_u32(np, "tRFC", &tim->tRFC);
221 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
222 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
223 ret |= of_property_read_u32(np, "tRPpb", &tim->tRPpb);
224 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
225 ret |= of_property_read_u32(np, "tRC", &tim->tRC);
226 ret |= of_property_read_u32(np, "tRAS", &tim->tRAS);
227 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
228 ret |= of_property_read_u32(np, "tWR", &tim->tWR);
229 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
230 ret |= of_property_read_u32(np, "tW2W-C2C", &tim->tW2W_C2C);
231 ret |= of_property_read_u32(np, "tR2R-C2C", &tim->tR2R_C2C);
232 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
233 ret |= of_property_read_u32(np, "tXSR", &tim->tXSR);
234 ret |= of_property_read_u32(np, "tXP", &tim->tXP);
235 ret |= of_property_read_u32(np, "tCKE", &tim->tCKE);
236 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
237 ret |= of_property_read_u32(np, "tMRD", &tim->tMRD);
238
239 return ret;
240 }
241
242 /**
243 * of_lpddr3_get_ddr_timings() - extracts the lpddr3 timings and updates no of
244 * frequencies available.
245 * @np_ddr: Pointer to ddr device tree node
246 * @dev: Device requesting for ddr timings
247 * @device_type: Type of ddr
248 * @nr_frequencies: No of frequencies available for ddr
249 * (updated by this function)
250 *
251 * Populates lpddr3_timings structure by extracting data from device
252 * tree node. Returns pointer to populated structure. If any error
253 * while populating, returns NULL.
254 */
255 const struct lpddr3_timings
of_lpddr3_get_ddr_timings(struct device_node * np_ddr,struct device * dev,u32 device_type,u32 * nr_frequencies)256 *of_lpddr3_get_ddr_timings(struct device_node *np_ddr, struct device *dev,
257 u32 device_type, u32 *nr_frequencies)
258 {
259 struct lpddr3_timings *timings = NULL;
260 u32 arr_sz = 0, i = 0;
261 struct device_node *np_tim;
262 char *tim_compat = NULL;
263
264 switch (device_type) {
265 case DDR_TYPE_LPDDR3:
266 tim_compat = "jedec,lpddr3-timings";
267 break;
268 default:
269 dev_warn(dev, "Unsupported memory type\n");
270 }
271
272 for_each_child_of_node(np_ddr, np_tim)
273 if (of_device_is_compatible(np_tim, tim_compat))
274 arr_sz++;
275
276 if (arr_sz)
277 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
278 GFP_KERNEL);
279
280 if (!timings)
281 goto default_timings;
282
283 for_each_child_of_node(np_ddr, np_tim) {
284 if (of_device_is_compatible(np_tim, tim_compat)) {
285 if (of_lpddr3_do_get_timings(np_tim, &timings[i])) {
286 devm_kfree(dev, timings);
287 goto default_timings;
288 }
289 i++;
290 }
291 }
292
293 *nr_frequencies = arr_sz;
294
295 return timings;
296
297 default_timings:
298 dev_warn(dev, "Failed to get timings\n");
299 *nr_frequencies = 0;
300 return NULL;
301 }
302 EXPORT_SYMBOL(of_lpddr3_get_ddr_timings);
303
304 /**
305 * of_lpddr2_get_info() - extracts information about the lpddr2 chip.
306 * @np: Pointer to device tree node containing lpddr2 info
307 * @dev: Device requesting info
308 *
309 * Populates lpddr2_info structure by extracting data from device
310 * tree node. Returns pointer to populated structure. If error
311 * happened while populating, returns NULL. If property is missing
312 * in a device-tree, then the corresponding value is set to -ENOENT.
313 */
314 const struct lpddr2_info
of_lpddr2_get_info(struct device_node * np,struct device * dev)315 *of_lpddr2_get_info(struct device_node *np, struct device *dev)
316 {
317 struct lpddr2_info *ret_info, info = {};
318 struct property *prop;
319 const char *cp;
320 int err;
321 u32 revision_id[2];
322
323 err = of_property_read_u32_array(np, "revision-id", revision_id, 2);
324 if (!err) {
325 info.revision_id1 = revision_id[0];
326 info.revision_id2 = revision_id[1];
327 } else {
328 err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
329 if (err)
330 info.revision_id1 = -ENOENT;
331
332 err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
333 if (err)
334 info.revision_id2 = -ENOENT;
335 }
336
337 err = of_property_read_u32(np, "io-width", &info.io_width);
338 if (err)
339 return NULL;
340
341 info.io_width = 32 / info.io_width - 1;
342
343 err = of_property_read_u32(np, "density", &info.density);
344 if (err)
345 return NULL;
346
347 info.density = ffs(info.density) - 7;
348
349 if (of_device_is_compatible(np, "jedec,lpddr2-s4"))
350 info.arch_type = LPDDR2_TYPE_S4;
351 else if (of_device_is_compatible(np, "jedec,lpddr2-s2"))
352 info.arch_type = LPDDR2_TYPE_S2;
353 else if (of_device_is_compatible(np, "jedec,lpddr2-nvm"))
354 info.arch_type = LPDDR2_TYPE_NVM;
355 else
356 return NULL;
357
358 prop = of_find_property(np, "compatible", NULL);
359 for (cp = of_prop_next_string(prop, NULL); cp;
360 cp = of_prop_next_string(prop, cp)) {
361
362 #define OF_LPDDR2_VENDOR_CMP(compat, ID) \
363 if (!of_compat_cmp(cp, compat ",", strlen(compat ","))) { \
364 info.manufacturer_id = LPDDR2_MANID_##ID; \
365 break; \
366 }
367
368 OF_LPDDR2_VENDOR_CMP("samsung", SAMSUNG)
369 OF_LPDDR2_VENDOR_CMP("qimonda", QIMONDA)
370 OF_LPDDR2_VENDOR_CMP("elpida", ELPIDA)
371 OF_LPDDR2_VENDOR_CMP("etron", ETRON)
372 OF_LPDDR2_VENDOR_CMP("nanya", NANYA)
373 OF_LPDDR2_VENDOR_CMP("hynix", HYNIX)
374 OF_LPDDR2_VENDOR_CMP("mosel", MOSEL)
375 OF_LPDDR2_VENDOR_CMP("winbond", WINBOND)
376 OF_LPDDR2_VENDOR_CMP("esmt", ESMT)
377 OF_LPDDR2_VENDOR_CMP("spansion", SPANSION)
378 OF_LPDDR2_VENDOR_CMP("sst", SST)
379 OF_LPDDR2_VENDOR_CMP("zmos", ZMOS)
380 OF_LPDDR2_VENDOR_CMP("intel", INTEL)
381 OF_LPDDR2_VENDOR_CMP("numonyx", NUMONYX)
382 OF_LPDDR2_VENDOR_CMP("micron", MICRON)
383
384 #undef OF_LPDDR2_VENDOR_CMP
385 }
386
387 if (!info.manufacturer_id)
388 info.manufacturer_id = -ENOENT;
389
390 ret_info = devm_kzalloc(dev, sizeof(*ret_info), GFP_KERNEL);
391 if (ret_info)
392 *ret_info = info;
393
394 return ret_info;
395 }
396 EXPORT_SYMBOL(of_lpddr2_get_info);
397