1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 * - LSM6DS3:
18 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
21 * - FIFO size: 8KB
22 *
23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
24 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
27 * - FIFO size: 4KB
28 *
29 * - LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP:
30 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
31 * 833
32 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
33 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
34 * - FIFO size: 3KB
35 *
36 * - LSM9DS1/LSM6DS0:
37 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
38 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
39 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
40 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
41 * - FIFO size: 32
42 *
43 * Copyright 2016 STMicroelectronics Inc.
44 *
45 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
46 * Denis Ciocca <denis.ciocca@st.com>
47 */
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/delay.h>
52 #include <linux/iio/events.h>
53 #include <linux/iio/iio.h>
54 #include <linux/iio/sysfs.h>
55 #include <linux/interrupt.h>
56 #include <linux/irq.h>
57 #include <linux/pm.h>
58 #include <linux/property.h>
59 #include <linux/regmap.h>
60 #include <linux/bitfield.h>
61
62 #include <linux/platform_data/st_sensors_pdata.h>
63
64 #include "st_lsm6dsx.h"
65
66 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
67
68 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */
69
70 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
71 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
72 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
73 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
74 IIO_CHAN_SOFT_TIMESTAMP(3),
75 };
76
77 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
79 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
80 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
81 IIO_CHAN_SOFT_TIMESTAMP(3),
82 };
83
84 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
86 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
87 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
88 IIO_CHAN_SOFT_TIMESTAMP(3),
89 };
90
91 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
92 {
93 .reset = {
94 .addr = 0x22,
95 .mask = BIT(0),
96 },
97 .boot = {
98 .addr = 0x22,
99 .mask = BIT(7),
100 },
101 .bdu = {
102 .addr = 0x22,
103 .mask = BIT(6),
104 },
105 .id = {
106 {
107 .hw_id = ST_LSM9DS1_ID,
108 .name = ST_LSM9DS1_DEV_NAME,
109 .wai = 0x68,
110 }, {
111 .hw_id = ST_LSM6DS0_ID,
112 .name = ST_LSM6DS0_DEV_NAME,
113 .wai = 0x68,
114 },
115 },
116 .channels = {
117 [ST_LSM6DSX_ID_ACC] = {
118 .chan = st_lsm6dsx_acc_channels,
119 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
120 },
121 [ST_LSM6DSX_ID_GYRO] = {
122 .chan = st_lsm6ds0_gyro_channels,
123 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
124 },
125 },
126 .odr_table = {
127 [ST_LSM6DSX_ID_ACC] = {
128 .reg = {
129 .addr = 0x20,
130 .mask = GENMASK(7, 5),
131 },
132 .odr_avl[0] = { 10000, 0x01 },
133 .odr_avl[1] = { 50000, 0x02 },
134 .odr_avl[2] = { 119000, 0x03 },
135 .odr_avl[3] = { 238000, 0x04 },
136 .odr_avl[4] = { 476000, 0x05 },
137 .odr_avl[5] = { 952000, 0x06 },
138 .odr_len = 6,
139 },
140 [ST_LSM6DSX_ID_GYRO] = {
141 .reg = {
142 .addr = 0x10,
143 .mask = GENMASK(7, 5),
144 },
145 .odr_avl[0] = { 14900, 0x01 },
146 .odr_avl[1] = { 59500, 0x02 },
147 .odr_avl[2] = { 119000, 0x03 },
148 .odr_avl[3] = { 238000, 0x04 },
149 .odr_avl[4] = { 476000, 0x05 },
150 .odr_avl[5] = { 952000, 0x06 },
151 .odr_len = 6,
152 },
153 },
154 .fs_table = {
155 [ST_LSM6DSX_ID_ACC] = {
156 .reg = {
157 .addr = 0x20,
158 .mask = GENMASK(4, 3),
159 },
160 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
161 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
162 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
163 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
164 .fs_len = 4,
165 },
166 [ST_LSM6DSX_ID_GYRO] = {
167 .reg = {
168 .addr = 0x10,
169 .mask = GENMASK(4, 3),
170 },
171
172 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
173 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
174 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
175 .fs_len = 3,
176 },
177 },
178 .irq_config = {
179 .irq1 = {
180 .addr = 0x0c,
181 .mask = BIT(3),
182 },
183 .irq2 = {
184 .addr = 0x0d,
185 .mask = BIT(3),
186 },
187 .hla = {
188 .addr = 0x22,
189 .mask = BIT(5),
190 },
191 .od = {
192 .addr = 0x22,
193 .mask = BIT(4),
194 },
195 },
196 .fifo_ops = {
197 .max_size = 32,
198 },
199 },
200 {
201 .reset = {
202 .addr = 0x12,
203 .mask = BIT(0),
204 },
205 .boot = {
206 .addr = 0x12,
207 .mask = BIT(7),
208 },
209 .bdu = {
210 .addr = 0x12,
211 .mask = BIT(6),
212 },
213 .id = {
214 {
215 .hw_id = ST_LSM6DS3_ID,
216 .name = ST_LSM6DS3_DEV_NAME,
217 .wai = 0x69,
218 },
219 },
220 .channels = {
221 [ST_LSM6DSX_ID_ACC] = {
222 .chan = st_lsm6dsx_acc_channels,
223 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
224 },
225 [ST_LSM6DSX_ID_GYRO] = {
226 .chan = st_lsm6dsx_gyro_channels,
227 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
228 },
229 },
230 .odr_table = {
231 [ST_LSM6DSX_ID_ACC] = {
232 .reg = {
233 .addr = 0x10,
234 .mask = GENMASK(7, 4),
235 },
236 .odr_avl[0] = { 12500, 0x01 },
237 .odr_avl[1] = { 26000, 0x02 },
238 .odr_avl[2] = { 52000, 0x03 },
239 .odr_avl[3] = { 104000, 0x04 },
240 .odr_avl[4] = { 208000, 0x05 },
241 .odr_avl[5] = { 416000, 0x06 },
242 .odr_len = 6,
243 },
244 [ST_LSM6DSX_ID_GYRO] = {
245 .reg = {
246 .addr = 0x11,
247 .mask = GENMASK(7, 4),
248 },
249 .odr_avl[0] = { 12500, 0x01 },
250 .odr_avl[1] = { 26000, 0x02 },
251 .odr_avl[2] = { 52000, 0x03 },
252 .odr_avl[3] = { 104000, 0x04 },
253 .odr_avl[4] = { 208000, 0x05 },
254 .odr_avl[5] = { 416000, 0x06 },
255 .odr_len = 6,
256 },
257 },
258 .fs_table = {
259 [ST_LSM6DSX_ID_ACC] = {
260 .reg = {
261 .addr = 0x10,
262 .mask = GENMASK(3, 2),
263 },
264 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
265 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
266 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
267 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
268 .fs_len = 4,
269 },
270 [ST_LSM6DSX_ID_GYRO] = {
271 .reg = {
272 .addr = 0x11,
273 .mask = GENMASK(3, 2),
274 },
275 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
276 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
277 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
278 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
279 .fs_len = 4,
280 },
281 },
282 .irq_config = {
283 .irq1 = {
284 .addr = 0x0d,
285 .mask = BIT(3),
286 },
287 .irq2 = {
288 .addr = 0x0e,
289 .mask = BIT(3),
290 },
291 .lir = {
292 .addr = 0x58,
293 .mask = BIT(0),
294 },
295 .irq1_func = {
296 .addr = 0x5e,
297 .mask = BIT(5),
298 },
299 .irq2_func = {
300 .addr = 0x5f,
301 .mask = BIT(5),
302 },
303 .hla = {
304 .addr = 0x12,
305 .mask = BIT(5),
306 },
307 .od = {
308 .addr = 0x12,
309 .mask = BIT(4),
310 },
311 },
312 .decimator = {
313 [ST_LSM6DSX_ID_ACC] = {
314 .addr = 0x08,
315 .mask = GENMASK(2, 0),
316 },
317 [ST_LSM6DSX_ID_GYRO] = {
318 .addr = 0x08,
319 .mask = GENMASK(5, 3),
320 },
321 },
322 .fifo_ops = {
323 .update_fifo = st_lsm6dsx_update_fifo,
324 .read_fifo = st_lsm6dsx_read_fifo,
325 .fifo_th = {
326 .addr = 0x06,
327 .mask = GENMASK(11, 0),
328 },
329 .fifo_diff = {
330 .addr = 0x3a,
331 .mask = GENMASK(11, 0),
332 },
333 .max_size = 1365,
334 .th_wl = 3, /* 1LSB = 2B */
335 },
336 .ts_settings = {
337 .timer_en = {
338 .addr = 0x58,
339 .mask = BIT(7),
340 },
341 .hr_timer = {
342 .addr = 0x5c,
343 .mask = BIT(4),
344 },
345 .fifo_en = {
346 .addr = 0x07,
347 .mask = BIT(7),
348 },
349 .decimator = {
350 .addr = 0x09,
351 .mask = GENMASK(5, 3),
352 },
353 },
354 .event_settings = {
355 .wakeup_reg = {
356 .addr = 0x5B,
357 .mask = GENMASK(5, 0),
358 },
359 .wakeup_src_reg = 0x1b,
360 .wakeup_src_status_mask = BIT(3),
361 .wakeup_src_z_mask = BIT(0),
362 .wakeup_src_y_mask = BIT(1),
363 .wakeup_src_x_mask = BIT(2),
364 },
365 },
366 {
367 .reset = {
368 .addr = 0x12,
369 .mask = BIT(0),
370 },
371 .boot = {
372 .addr = 0x12,
373 .mask = BIT(7),
374 },
375 .bdu = {
376 .addr = 0x12,
377 .mask = BIT(6),
378 },
379 .id = {
380 {
381 .hw_id = ST_LSM6DS3H_ID,
382 .name = ST_LSM6DS3H_DEV_NAME,
383 .wai = 0x69,
384 },
385 },
386 .channels = {
387 [ST_LSM6DSX_ID_ACC] = {
388 .chan = st_lsm6dsx_acc_channels,
389 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
390 },
391 [ST_LSM6DSX_ID_GYRO] = {
392 .chan = st_lsm6dsx_gyro_channels,
393 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
394 },
395 },
396 .odr_table = {
397 [ST_LSM6DSX_ID_ACC] = {
398 .reg = {
399 .addr = 0x10,
400 .mask = GENMASK(7, 4),
401 },
402 .odr_avl[0] = { 12500, 0x01 },
403 .odr_avl[1] = { 26000, 0x02 },
404 .odr_avl[2] = { 52000, 0x03 },
405 .odr_avl[3] = { 104000, 0x04 },
406 .odr_avl[4] = { 208000, 0x05 },
407 .odr_avl[5] = { 416000, 0x06 },
408 .odr_len = 6,
409 },
410 [ST_LSM6DSX_ID_GYRO] = {
411 .reg = {
412 .addr = 0x11,
413 .mask = GENMASK(7, 4),
414 },
415 .odr_avl[0] = { 12500, 0x01 },
416 .odr_avl[1] = { 26000, 0x02 },
417 .odr_avl[2] = { 52000, 0x03 },
418 .odr_avl[3] = { 104000, 0x04 },
419 .odr_avl[4] = { 208000, 0x05 },
420 .odr_avl[5] = { 416000, 0x06 },
421 .odr_len = 6,
422 },
423 },
424 .fs_table = {
425 [ST_LSM6DSX_ID_ACC] = {
426 .reg = {
427 .addr = 0x10,
428 .mask = GENMASK(3, 2),
429 },
430 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
431 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
432 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
433 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
434 .fs_len = 4,
435 },
436 [ST_LSM6DSX_ID_GYRO] = {
437 .reg = {
438 .addr = 0x11,
439 .mask = GENMASK(3, 2),
440 },
441 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
442 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
443 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
444 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
445 .fs_len = 4,
446 },
447 },
448 .irq_config = {
449 .irq1 = {
450 .addr = 0x0d,
451 .mask = BIT(3),
452 },
453 .irq2 = {
454 .addr = 0x0e,
455 .mask = BIT(3),
456 },
457 .lir = {
458 .addr = 0x58,
459 .mask = BIT(0),
460 },
461 .irq1_func = {
462 .addr = 0x5e,
463 .mask = BIT(5),
464 },
465 .irq2_func = {
466 .addr = 0x5f,
467 .mask = BIT(5),
468 },
469 .hla = {
470 .addr = 0x12,
471 .mask = BIT(5),
472 },
473 .od = {
474 .addr = 0x12,
475 .mask = BIT(4),
476 },
477 },
478 .decimator = {
479 [ST_LSM6DSX_ID_ACC] = {
480 .addr = 0x08,
481 .mask = GENMASK(2, 0),
482 },
483 [ST_LSM6DSX_ID_GYRO] = {
484 .addr = 0x08,
485 .mask = GENMASK(5, 3),
486 },
487 },
488 .fifo_ops = {
489 .update_fifo = st_lsm6dsx_update_fifo,
490 .read_fifo = st_lsm6dsx_read_fifo,
491 .fifo_th = {
492 .addr = 0x06,
493 .mask = GENMASK(11, 0),
494 },
495 .fifo_diff = {
496 .addr = 0x3a,
497 .mask = GENMASK(11, 0),
498 },
499 .max_size = 682,
500 .th_wl = 3, /* 1LSB = 2B */
501 },
502 .ts_settings = {
503 .timer_en = {
504 .addr = 0x58,
505 .mask = BIT(7),
506 },
507 .hr_timer = {
508 .addr = 0x5c,
509 .mask = BIT(4),
510 },
511 .fifo_en = {
512 .addr = 0x07,
513 .mask = BIT(7),
514 },
515 .decimator = {
516 .addr = 0x09,
517 .mask = GENMASK(5, 3),
518 },
519 },
520 .event_settings = {
521 .wakeup_reg = {
522 .addr = 0x5B,
523 .mask = GENMASK(5, 0),
524 },
525 .wakeup_src_reg = 0x1b,
526 .wakeup_src_status_mask = BIT(3),
527 .wakeup_src_z_mask = BIT(0),
528 .wakeup_src_y_mask = BIT(1),
529 .wakeup_src_x_mask = BIT(2),
530 },
531 },
532 {
533 .reset = {
534 .addr = 0x12,
535 .mask = BIT(0),
536 },
537 .boot = {
538 .addr = 0x12,
539 .mask = BIT(7),
540 },
541 .bdu = {
542 .addr = 0x12,
543 .mask = BIT(6),
544 },
545 .id = {
546 {
547 .hw_id = ST_LSM6DSL_ID,
548 .name = ST_LSM6DSL_DEV_NAME,
549 .wai = 0x6a,
550 }, {
551 .hw_id = ST_LSM6DSM_ID,
552 .name = ST_LSM6DSM_DEV_NAME,
553 .wai = 0x6a,
554 }, {
555 .hw_id = ST_ISM330DLC_ID,
556 .name = ST_ISM330DLC_DEV_NAME,
557 .wai = 0x6a,
558 }, {
559 .hw_id = ST_LSM6DS3TRC_ID,
560 .name = ST_LSM6DS3TRC_DEV_NAME,
561 .wai = 0x6a,
562 },
563 },
564 .channels = {
565 [ST_LSM6DSX_ID_ACC] = {
566 .chan = st_lsm6dsx_acc_channels,
567 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
568 },
569 [ST_LSM6DSX_ID_GYRO] = {
570 .chan = st_lsm6dsx_gyro_channels,
571 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
572 },
573 },
574 .odr_table = {
575 [ST_LSM6DSX_ID_ACC] = {
576 .reg = {
577 .addr = 0x10,
578 .mask = GENMASK(7, 4),
579 },
580 .odr_avl[0] = { 12500, 0x01 },
581 .odr_avl[1] = { 26000, 0x02 },
582 .odr_avl[2] = { 52000, 0x03 },
583 .odr_avl[3] = { 104000, 0x04 },
584 .odr_avl[4] = { 208000, 0x05 },
585 .odr_avl[5] = { 416000, 0x06 },
586 .odr_len = 6,
587 },
588 [ST_LSM6DSX_ID_GYRO] = {
589 .reg = {
590 .addr = 0x11,
591 .mask = GENMASK(7, 4),
592 },
593 .odr_avl[0] = { 12500, 0x01 },
594 .odr_avl[1] = { 26000, 0x02 },
595 .odr_avl[2] = { 52000, 0x03 },
596 .odr_avl[3] = { 104000, 0x04 },
597 .odr_avl[4] = { 208000, 0x05 },
598 .odr_avl[5] = { 416000, 0x06 },
599 .odr_len = 6,
600 },
601 },
602 .fs_table = {
603 [ST_LSM6DSX_ID_ACC] = {
604 .reg = {
605 .addr = 0x10,
606 .mask = GENMASK(3, 2),
607 },
608 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
609 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
610 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
611 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
612 .fs_len = 4,
613 },
614 [ST_LSM6DSX_ID_GYRO] = {
615 .reg = {
616 .addr = 0x11,
617 .mask = GENMASK(3, 2),
618 },
619 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
620 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
621 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
622 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
623 .fs_len = 4,
624 },
625 },
626 .irq_config = {
627 .irq1 = {
628 .addr = 0x0d,
629 .mask = BIT(3),
630 },
631 .irq2 = {
632 .addr = 0x0e,
633 .mask = BIT(3),
634 },
635 .lir = {
636 .addr = 0x58,
637 .mask = BIT(0),
638 },
639 .irq1_func = {
640 .addr = 0x5e,
641 .mask = BIT(5),
642 },
643 .irq2_func = {
644 .addr = 0x5f,
645 .mask = BIT(5),
646 },
647 .hla = {
648 .addr = 0x12,
649 .mask = BIT(5),
650 },
651 .od = {
652 .addr = 0x12,
653 .mask = BIT(4),
654 },
655 },
656 .decimator = {
657 [ST_LSM6DSX_ID_ACC] = {
658 .addr = 0x08,
659 .mask = GENMASK(2, 0),
660 },
661 [ST_LSM6DSX_ID_GYRO] = {
662 .addr = 0x08,
663 .mask = GENMASK(5, 3),
664 },
665 [ST_LSM6DSX_ID_EXT0] = {
666 .addr = 0x09,
667 .mask = GENMASK(2, 0),
668 },
669 },
670 .fifo_ops = {
671 .update_fifo = st_lsm6dsx_update_fifo,
672 .read_fifo = st_lsm6dsx_read_fifo,
673 .fifo_th = {
674 .addr = 0x06,
675 .mask = GENMASK(10, 0),
676 },
677 .fifo_diff = {
678 .addr = 0x3a,
679 .mask = GENMASK(10, 0),
680 },
681 .max_size = 682,
682 .th_wl = 3, /* 1LSB = 2B */
683 },
684 .ts_settings = {
685 .timer_en = {
686 .addr = 0x19,
687 .mask = BIT(5),
688 },
689 .hr_timer = {
690 .addr = 0x5c,
691 .mask = BIT(4),
692 },
693 .fifo_en = {
694 .addr = 0x07,
695 .mask = BIT(7),
696 },
697 .decimator = {
698 .addr = 0x09,
699 .mask = GENMASK(5, 3),
700 },
701 },
702 .shub_settings = {
703 .page_mux = {
704 .addr = 0x01,
705 .mask = BIT(7),
706 },
707 .master_en = {
708 .addr = 0x1a,
709 .mask = BIT(0),
710 },
711 .pullup_en = {
712 .addr = 0x1a,
713 .mask = BIT(3),
714 },
715 .aux_sens = {
716 .addr = 0x04,
717 .mask = GENMASK(5, 4),
718 },
719 .wr_once = {
720 .addr = 0x07,
721 .mask = BIT(5),
722 },
723 .emb_func = {
724 .addr = 0x19,
725 .mask = BIT(2),
726 },
727 .num_ext_dev = 1,
728 .shub_out = {
729 .addr = 0x2e,
730 },
731 .slv0_addr = 0x02,
732 .dw_slv0_addr = 0x0e,
733 .pause = 0x7,
734 },
735 .event_settings = {
736 .enable_reg = {
737 .addr = 0x58,
738 .mask = BIT(7),
739 },
740 .wakeup_reg = {
741 .addr = 0x5B,
742 .mask = GENMASK(5, 0),
743 },
744 .wakeup_src_reg = 0x1b,
745 .wakeup_src_status_mask = BIT(3),
746 .wakeup_src_z_mask = BIT(0),
747 .wakeup_src_y_mask = BIT(1),
748 .wakeup_src_x_mask = BIT(2),
749 },
750 },
751 {
752 .reset = {
753 .addr = 0x12,
754 .mask = BIT(0),
755 },
756 .boot = {
757 .addr = 0x12,
758 .mask = BIT(7),
759 },
760 .bdu = {
761 .addr = 0x12,
762 .mask = BIT(6),
763 },
764 .id = {
765 {
766 .hw_id = ST_LSM6DSR_ID,
767 .name = ST_LSM6DSR_DEV_NAME,
768 .wai = 0x6b,
769 }, {
770 .hw_id = ST_ISM330DHCX_ID,
771 .name = ST_ISM330DHCX_DEV_NAME,
772 .wai = 0x6b,
773 }, {
774 .hw_id = ST_LSM6DSRX_ID,
775 .name = ST_LSM6DSRX_DEV_NAME,
776 .wai = 0x6b,
777 }, {
778 .hw_id = ST_LSM6DSO_ID,
779 .name = ST_LSM6DSO_DEV_NAME,
780 .wai = 0x6c,
781 }, {
782 .hw_id = ST_LSM6DSOX_ID,
783 .name = ST_LSM6DSOX_DEV_NAME,
784 .wai = 0x6c,
785 }, {
786 .hw_id = ST_LSM6DST_ID,
787 .name = ST_LSM6DST_DEV_NAME,
788 .wai = 0x6d,
789 }, {
790 .hw_id = ST_ASM330LHHX_ID,
791 .name = ST_ASM330LHHX_DEV_NAME,
792 .wai = 0x6b,
793 },
794 },
795 .channels = {
796 [ST_LSM6DSX_ID_ACC] = {
797 .chan = st_lsm6dsx_acc_channels,
798 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
799 },
800 [ST_LSM6DSX_ID_GYRO] = {
801 .chan = st_lsm6dsx_gyro_channels,
802 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
803 },
804 },
805 .drdy_mask = {
806 .addr = 0x13,
807 .mask = BIT(3),
808 },
809 .odr_table = {
810 [ST_LSM6DSX_ID_ACC] = {
811 .reg = {
812 .addr = 0x10,
813 .mask = GENMASK(7, 4),
814 },
815 .odr_avl[0] = { 12500, 0x01 },
816 .odr_avl[1] = { 26000, 0x02 },
817 .odr_avl[2] = { 52000, 0x03 },
818 .odr_avl[3] = { 104000, 0x04 },
819 .odr_avl[4] = { 208000, 0x05 },
820 .odr_avl[5] = { 416000, 0x06 },
821 .odr_avl[6] = { 833000, 0x07 },
822 .odr_len = 7,
823 },
824 [ST_LSM6DSX_ID_GYRO] = {
825 .reg = {
826 .addr = 0x11,
827 .mask = GENMASK(7, 4),
828 },
829 .odr_avl[0] = { 12500, 0x01 },
830 .odr_avl[1] = { 26000, 0x02 },
831 .odr_avl[2] = { 52000, 0x03 },
832 .odr_avl[3] = { 104000, 0x04 },
833 .odr_avl[4] = { 208000, 0x05 },
834 .odr_avl[5] = { 416000, 0x06 },
835 .odr_avl[6] = { 833000, 0x07 },
836 .odr_len = 7,
837 },
838 },
839 .fs_table = {
840 [ST_LSM6DSX_ID_ACC] = {
841 .reg = {
842 .addr = 0x10,
843 .mask = GENMASK(3, 2),
844 },
845 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
846 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
847 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
848 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
849 .fs_len = 4,
850 },
851 [ST_LSM6DSX_ID_GYRO] = {
852 .reg = {
853 .addr = 0x11,
854 .mask = GENMASK(3, 2),
855 },
856 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
857 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
858 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
859 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
860 .fs_len = 4,
861 },
862 },
863 .irq_config = {
864 .irq1 = {
865 .addr = 0x0d,
866 .mask = BIT(3),
867 },
868 .irq2 = {
869 .addr = 0x0e,
870 .mask = BIT(3),
871 },
872 .lir = {
873 .addr = 0x56,
874 .mask = BIT(0),
875 },
876 .clear_on_read = {
877 .addr = 0x56,
878 .mask = BIT(6),
879 },
880 .irq1_func = {
881 .addr = 0x5e,
882 .mask = BIT(5),
883 },
884 .irq2_func = {
885 .addr = 0x5f,
886 .mask = BIT(5),
887 },
888 .hla = {
889 .addr = 0x12,
890 .mask = BIT(5),
891 },
892 .od = {
893 .addr = 0x12,
894 .mask = BIT(4),
895 },
896 },
897 .batch = {
898 [ST_LSM6DSX_ID_ACC] = {
899 .addr = 0x09,
900 .mask = GENMASK(3, 0),
901 },
902 [ST_LSM6DSX_ID_GYRO] = {
903 .addr = 0x09,
904 .mask = GENMASK(7, 4),
905 },
906 },
907 .fifo_ops = {
908 .update_fifo = st_lsm6dsx_update_fifo,
909 .read_fifo = st_lsm6dsx_read_tagged_fifo,
910 .fifo_th = {
911 .addr = 0x07,
912 .mask = GENMASK(8, 0),
913 },
914 .fifo_diff = {
915 .addr = 0x3a,
916 .mask = GENMASK(9, 0),
917 },
918 .max_size = 512,
919 .th_wl = 1,
920 },
921 .ts_settings = {
922 .timer_en = {
923 .addr = 0x19,
924 .mask = BIT(5),
925 },
926 .decimator = {
927 .addr = 0x0a,
928 .mask = GENMASK(7, 6),
929 },
930 .freq_fine = 0x63,
931 },
932 .shub_settings = {
933 .page_mux = {
934 .addr = 0x01,
935 .mask = BIT(6),
936 },
937 .master_en = {
938 .sec_page = true,
939 .addr = 0x14,
940 .mask = BIT(2),
941 },
942 .pullup_en = {
943 .sec_page = true,
944 .addr = 0x14,
945 .mask = BIT(3),
946 },
947 .aux_sens = {
948 .addr = 0x14,
949 .mask = GENMASK(1, 0),
950 },
951 .wr_once = {
952 .addr = 0x14,
953 .mask = BIT(6),
954 },
955 .num_ext_dev = 3,
956 .shub_out = {
957 .sec_page = true,
958 .addr = 0x02,
959 },
960 .slv0_addr = 0x15,
961 .dw_slv0_addr = 0x21,
962 .batch_en = BIT(3),
963 },
964 .event_settings = {
965 .enable_reg = {
966 .addr = 0x58,
967 .mask = BIT(7),
968 },
969 .wakeup_reg = {
970 .addr = 0x5b,
971 .mask = GENMASK(5, 0),
972 },
973 .wakeup_src_reg = 0x1b,
974 .wakeup_src_status_mask = BIT(3),
975 .wakeup_src_z_mask = BIT(0),
976 .wakeup_src_y_mask = BIT(1),
977 .wakeup_src_x_mask = BIT(2),
978 },
979 },
980 {
981 .reset = {
982 .addr = 0x12,
983 .mask = BIT(0),
984 },
985 .boot = {
986 .addr = 0x12,
987 .mask = BIT(7),
988 },
989 .bdu = {
990 .addr = 0x12,
991 .mask = BIT(6),
992 },
993 .id = {
994 {
995 .hw_id = ST_ASM330LHH_ID,
996 .name = ST_ASM330LHH_DEV_NAME,
997 .wai = 0x6b,
998 }, {
999 .hw_id = ST_LSM6DSOP_ID,
1000 .name = ST_LSM6DSOP_DEV_NAME,
1001 .wai = 0x6c,
1002 },
1003 },
1004 .channels = {
1005 [ST_LSM6DSX_ID_ACC] = {
1006 .chan = st_lsm6dsx_acc_channels,
1007 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1008 },
1009 [ST_LSM6DSX_ID_GYRO] = {
1010 .chan = st_lsm6dsx_gyro_channels,
1011 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1012 },
1013 },
1014 .drdy_mask = {
1015 .addr = 0x13,
1016 .mask = BIT(3),
1017 },
1018 .odr_table = {
1019 [ST_LSM6DSX_ID_ACC] = {
1020 .reg = {
1021 .addr = 0x10,
1022 .mask = GENMASK(7, 4),
1023 },
1024 .odr_avl[0] = { 12500, 0x01 },
1025 .odr_avl[1] = { 26000, 0x02 },
1026 .odr_avl[2] = { 52000, 0x03 },
1027 .odr_avl[3] = { 104000, 0x04 },
1028 .odr_avl[4] = { 208000, 0x05 },
1029 .odr_avl[5] = { 416000, 0x06 },
1030 .odr_avl[6] = { 833000, 0x07 },
1031 .odr_len = 7,
1032 },
1033 [ST_LSM6DSX_ID_GYRO] = {
1034 .reg = {
1035 .addr = 0x11,
1036 .mask = GENMASK(7, 4),
1037 },
1038 .odr_avl[0] = { 12500, 0x01 },
1039 .odr_avl[1] = { 26000, 0x02 },
1040 .odr_avl[2] = { 52000, 0x03 },
1041 .odr_avl[3] = { 104000, 0x04 },
1042 .odr_avl[4] = { 208000, 0x05 },
1043 .odr_avl[5] = { 416000, 0x06 },
1044 .odr_avl[6] = { 833000, 0x07 },
1045 .odr_len = 7,
1046 },
1047 },
1048 .fs_table = {
1049 [ST_LSM6DSX_ID_ACC] = {
1050 .reg = {
1051 .addr = 0x10,
1052 .mask = GENMASK(3, 2),
1053 },
1054 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1055 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1056 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1057 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1058 .fs_len = 4,
1059 },
1060 [ST_LSM6DSX_ID_GYRO] = {
1061 .reg = {
1062 .addr = 0x11,
1063 .mask = GENMASK(3, 2),
1064 },
1065 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1066 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1067 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1068 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1069 .fs_len = 4,
1070 },
1071 },
1072 .irq_config = {
1073 .irq1 = {
1074 .addr = 0x0d,
1075 .mask = BIT(3),
1076 },
1077 .irq2 = {
1078 .addr = 0x0e,
1079 .mask = BIT(3),
1080 },
1081 .lir = {
1082 .addr = 0x56,
1083 .mask = BIT(0),
1084 },
1085 .clear_on_read = {
1086 .addr = 0x56,
1087 .mask = BIT(6),
1088 },
1089 .irq1_func = {
1090 .addr = 0x5e,
1091 .mask = BIT(5),
1092 },
1093 .irq2_func = {
1094 .addr = 0x5f,
1095 .mask = BIT(5),
1096 },
1097 .hla = {
1098 .addr = 0x12,
1099 .mask = BIT(5),
1100 },
1101 .od = {
1102 .addr = 0x12,
1103 .mask = BIT(4),
1104 },
1105 },
1106 .batch = {
1107 [ST_LSM6DSX_ID_ACC] = {
1108 .addr = 0x09,
1109 .mask = GENMASK(3, 0),
1110 },
1111 [ST_LSM6DSX_ID_GYRO] = {
1112 .addr = 0x09,
1113 .mask = GENMASK(7, 4),
1114 },
1115 },
1116 .fifo_ops = {
1117 .update_fifo = st_lsm6dsx_update_fifo,
1118 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1119 .fifo_th = {
1120 .addr = 0x07,
1121 .mask = GENMASK(8, 0),
1122 },
1123 .fifo_diff = {
1124 .addr = 0x3a,
1125 .mask = GENMASK(9, 0),
1126 },
1127 .max_size = 512,
1128 .th_wl = 1,
1129 },
1130 .ts_settings = {
1131 .timer_en = {
1132 .addr = 0x19,
1133 .mask = BIT(5),
1134 },
1135 .decimator = {
1136 .addr = 0x0a,
1137 .mask = GENMASK(7, 6),
1138 },
1139 .freq_fine = 0x63,
1140 },
1141 .event_settings = {
1142 .enable_reg = {
1143 .addr = 0x58,
1144 .mask = BIT(7),
1145 },
1146 .wakeup_reg = {
1147 .addr = 0x5B,
1148 .mask = GENMASK(5, 0),
1149 },
1150 .wakeup_src_reg = 0x1b,
1151 .wakeup_src_status_mask = BIT(3),
1152 .wakeup_src_z_mask = BIT(0),
1153 .wakeup_src_y_mask = BIT(1),
1154 .wakeup_src_x_mask = BIT(2),
1155 },
1156 },
1157 };
1158
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1159 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1160 {
1161 const struct st_lsm6dsx_shub_settings *hub_settings;
1162 unsigned int data;
1163 int err;
1164
1165 hub_settings = &hw->settings->shub_settings;
1166 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1167 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1168 hub_settings->page_mux.mask, data);
1169 usleep_range(100, 150);
1170
1171 return err;
1172 }
1173
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1174 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1175 const char **name)
1176 {
1177 int err, i, j, data;
1178
1179 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1180 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1181 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1182 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1183 break;
1184 }
1185 if (j < ST_LSM6DSX_MAX_ID)
1186 break;
1187 }
1188
1189 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1190 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1191 return -ENODEV;
1192 }
1193
1194 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1195 if (err < 0) {
1196 dev_err(hw->dev, "failed to read whoami register\n");
1197 return err;
1198 }
1199
1200 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1201 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1202 return -ENODEV;
1203 }
1204
1205 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1206 hw->settings = &st_lsm6dsx_sensor_settings[i];
1207
1208 return 0;
1209 }
1210
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1211 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1212 u32 gain)
1213 {
1214 const struct st_lsm6dsx_fs_table_entry *fs_table;
1215 unsigned int data;
1216 int i, err;
1217
1218 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1219 for (i = 0; i < fs_table->fs_len; i++) {
1220 if (fs_table->fs_avl[i].gain == gain)
1221 break;
1222 }
1223
1224 if (i == fs_table->fs_len)
1225 return -EINVAL;
1226
1227 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1228 fs_table->reg.mask);
1229 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1230 fs_table->reg.mask, data);
1231 if (err < 0)
1232 return err;
1233
1234 sensor->gain = gain;
1235
1236 return 0;
1237 }
1238
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1239 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1240 {
1241 const struct st_lsm6dsx_odr_table_entry *odr_table;
1242 int i;
1243
1244 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1245 for (i = 0; i < odr_table->odr_len; i++) {
1246 /*
1247 * ext devices can run at different odr respect to
1248 * accel sensor
1249 */
1250 if (odr_table->odr_avl[i].milli_hz >= odr)
1251 break;
1252 }
1253
1254 if (i == odr_table->odr_len)
1255 return -EINVAL;
1256
1257 *val = odr_table->odr_avl[i].val;
1258 return odr_table->odr_avl[i].milli_hz;
1259 }
1260
1261 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1262 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1263 enum st_lsm6dsx_sensor_id id)
1264 {
1265 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1266
1267 if (odr > 0) {
1268 if (hw->enable_mask & BIT(id))
1269 return max_t(u32, ref->odr, odr);
1270 else
1271 return odr;
1272 } else {
1273 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1274 }
1275 }
1276
1277 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1278 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1279 {
1280 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1281 struct st_lsm6dsx_hw *hw = sensor->hw;
1282 const struct st_lsm6dsx_reg *reg;
1283 unsigned int data;
1284 u8 val = 0;
1285 int err;
1286
1287 switch (sensor->id) {
1288 case ST_LSM6DSX_ID_GYRO:
1289 break;
1290 case ST_LSM6DSX_ID_EXT0:
1291 case ST_LSM6DSX_ID_EXT1:
1292 case ST_LSM6DSX_ID_EXT2:
1293 case ST_LSM6DSX_ID_ACC: {
1294 u32 odr;
1295 int i;
1296
1297 /*
1298 * i2c embedded controller relies on the accelerometer sensor as
1299 * bus read/write trigger so we need to enable accel device
1300 * at odr = max(accel_odr, ext_odr) in order to properly
1301 * communicate with i2c slave devices
1302 */
1303 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1304 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1305 if (!hw->iio_devs[i] || i == sensor->id)
1306 continue;
1307
1308 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1309 if (odr != req_odr)
1310 /* device already configured */
1311 return 0;
1312 }
1313 break;
1314 }
1315 default: /* should never occur */
1316 return -EINVAL;
1317 }
1318
1319 if (req_odr > 0) {
1320 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1321 if (err < 0)
1322 return err;
1323 }
1324
1325 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1326 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1327 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1328 }
1329
1330 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1331 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1332 bool enable)
1333 {
1334 struct st_lsm6dsx_hw *hw = sensor->hw;
1335 u32 odr = enable ? sensor->odr : 0;
1336 int err;
1337
1338 err = st_lsm6dsx_set_odr(sensor, odr);
1339 if (err < 0)
1340 return err;
1341
1342 if (enable)
1343 hw->enable_mask |= BIT(sensor->id);
1344 else
1345 hw->enable_mask &= ~BIT(sensor->id);
1346
1347 return 0;
1348 }
1349
1350 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor,bool enable)1351 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1352 {
1353 struct st_lsm6dsx_hw *hw = sensor->hw;
1354
1355 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1356 return 0;
1357
1358 return hw->enable_event;
1359 }
1360
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1361 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1362 bool enable)
1363 {
1364 if (st_lsm6dsx_check_events(sensor, enable))
1365 return 0;
1366
1367 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1368 }
1369
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1370 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1371 u8 addr, int *val)
1372 {
1373 struct st_lsm6dsx_hw *hw = sensor->hw;
1374 int err, delay;
1375 __le16 data;
1376
1377 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1378 if (err < 0)
1379 return err;
1380
1381 /*
1382 * we need to wait for sensor settling time before
1383 * reading data in order to avoid corrupted samples
1384 */
1385 delay = 1000000000 / sensor->odr;
1386 usleep_range(3 * delay, 4 * delay);
1387
1388 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1389 if (err < 0)
1390 return err;
1391
1392 if (!hw->enable_event) {
1393 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1394 if (err < 0)
1395 return err;
1396 }
1397
1398 *val = (s16)le16_to_cpu(data);
1399
1400 return IIO_VAL_INT;
1401 }
1402
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1403 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1404 struct iio_chan_spec const *ch,
1405 int *val, int *val2, long mask)
1406 {
1407 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1408 int ret;
1409
1410 switch (mask) {
1411 case IIO_CHAN_INFO_RAW:
1412 ret = iio_device_claim_direct_mode(iio_dev);
1413 if (ret)
1414 break;
1415
1416 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1417 iio_device_release_direct_mode(iio_dev);
1418 break;
1419 case IIO_CHAN_INFO_SAMP_FREQ:
1420 *val = sensor->odr / 1000;
1421 *val2 = (sensor->odr % 1000) * 1000;
1422 ret = IIO_VAL_INT_PLUS_MICRO;
1423 break;
1424 case IIO_CHAN_INFO_SCALE:
1425 *val = 0;
1426 *val2 = sensor->gain;
1427 ret = IIO_VAL_INT_PLUS_NANO;
1428 break;
1429 default:
1430 ret = -EINVAL;
1431 break;
1432 }
1433
1434 return ret;
1435 }
1436
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1437 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1438 struct iio_chan_spec const *chan,
1439 int val, int val2, long mask)
1440 {
1441 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1442 int err;
1443
1444 err = iio_device_claim_direct_mode(iio_dev);
1445 if (err)
1446 return err;
1447
1448 switch (mask) {
1449 case IIO_CHAN_INFO_SCALE:
1450 err = st_lsm6dsx_set_full_scale(sensor, val2);
1451 break;
1452 case IIO_CHAN_INFO_SAMP_FREQ: {
1453 u8 data;
1454
1455 val = val * 1000 + val2 / 1000;
1456 val = st_lsm6dsx_check_odr(sensor, val, &data);
1457 if (val < 0)
1458 err = val;
1459 else
1460 sensor->odr = val;
1461 break;
1462 }
1463 default:
1464 err = -EINVAL;
1465 break;
1466 }
1467
1468 iio_device_release_direct_mode(iio_dev);
1469
1470 return err;
1471 }
1472
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,int state)1473 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1474 {
1475 const struct st_lsm6dsx_reg *reg;
1476 unsigned int data;
1477 int err;
1478
1479 if (!hw->settings->irq_config.irq1_func.addr)
1480 return -ENOTSUPP;
1481
1482 reg = &hw->settings->event_settings.enable_reg;
1483 if (reg->addr) {
1484 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1485 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1486 reg->mask, data);
1487 if (err < 0)
1488 return err;
1489 }
1490
1491 /* Enable wakeup interrupt */
1492 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1493 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1494 hw->irq_routing->mask, data);
1495 }
1496
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1497 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1498 const struct iio_chan_spec *chan,
1499 enum iio_event_type type,
1500 enum iio_event_direction dir,
1501 enum iio_event_info info,
1502 int *val, int *val2)
1503 {
1504 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1505 struct st_lsm6dsx_hw *hw = sensor->hw;
1506
1507 if (type != IIO_EV_TYPE_THRESH)
1508 return -EINVAL;
1509
1510 *val2 = 0;
1511 *val = hw->event_threshold;
1512
1513 return IIO_VAL_INT;
1514 }
1515
1516 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1517 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1518 const struct iio_chan_spec *chan,
1519 enum iio_event_type type,
1520 enum iio_event_direction dir,
1521 enum iio_event_info info,
1522 int val, int val2)
1523 {
1524 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1525 struct st_lsm6dsx_hw *hw = sensor->hw;
1526 const struct st_lsm6dsx_reg *reg;
1527 unsigned int data;
1528 int err;
1529
1530 if (type != IIO_EV_TYPE_THRESH)
1531 return -EINVAL;
1532
1533 if (val < 0 || val > 31)
1534 return -EINVAL;
1535
1536 reg = &hw->settings->event_settings.wakeup_reg;
1537 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1538 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1539 reg->mask, data);
1540 if (err < 0)
1541 return -EINVAL;
1542
1543 hw->event_threshold = val;
1544
1545 return 0;
1546 }
1547
1548 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1549 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1550 const struct iio_chan_spec *chan,
1551 enum iio_event_type type,
1552 enum iio_event_direction dir)
1553 {
1554 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1555 struct st_lsm6dsx_hw *hw = sensor->hw;
1556
1557 if (type != IIO_EV_TYPE_THRESH)
1558 return -EINVAL;
1559
1560 return !!(hw->enable_event & BIT(chan->channel2));
1561 }
1562
1563 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)1564 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1565 const struct iio_chan_spec *chan,
1566 enum iio_event_type type,
1567 enum iio_event_direction dir, int state)
1568 {
1569 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1570 struct st_lsm6dsx_hw *hw = sensor->hw;
1571 u8 enable_event;
1572 int err;
1573
1574 if (type != IIO_EV_TYPE_THRESH)
1575 return -EINVAL;
1576
1577 if (state) {
1578 enable_event = hw->enable_event | BIT(chan->channel2);
1579
1580 /* do not enable events if they are already enabled */
1581 if (hw->enable_event)
1582 goto out;
1583 } else {
1584 enable_event = hw->enable_event & ~BIT(chan->channel2);
1585
1586 /* only turn off sensor if no events is enabled */
1587 if (enable_event)
1588 goto out;
1589 }
1590
1591 /* stop here if no changes have been made */
1592 if (hw->enable_event == enable_event)
1593 return 0;
1594
1595 err = st_lsm6dsx_event_setup(hw, state);
1596 if (err < 0)
1597 return err;
1598
1599 mutex_lock(&hw->conf_lock);
1600 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1601 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1602 mutex_unlock(&hw->conf_lock);
1603 if (err < 0)
1604 return err;
1605
1606 out:
1607 hw->enable_event = enable_event;
1608
1609 return 0;
1610 }
1611
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)1612 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1613 {
1614 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1615 struct st_lsm6dsx_hw *hw = sensor->hw;
1616 int err;
1617
1618 if (val < 1 || val > hw->settings->fifo_ops.max_size)
1619 return -EINVAL;
1620
1621 mutex_lock(&hw->conf_lock);
1622
1623 err = st_lsm6dsx_update_watermark(sensor, val);
1624
1625 mutex_unlock(&hw->conf_lock);
1626
1627 if (err < 0)
1628 return err;
1629
1630 sensor->watermark = val;
1631
1632 return 0;
1633 }
1634
1635 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)1636 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1637 struct device_attribute *attr,
1638 char *buf)
1639 {
1640 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
1641 const struct st_lsm6dsx_odr_table_entry *odr_table;
1642 int i, len = 0;
1643
1644 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1645 for (i = 0; i < odr_table->odr_len; i++)
1646 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1647 odr_table->odr_avl[i].milli_hz / 1000,
1648 odr_table->odr_avl[i].milli_hz % 1000);
1649 buf[len - 1] = '\n';
1650
1651 return len;
1652 }
1653
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)1654 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1655 struct device_attribute *attr,
1656 char *buf)
1657 {
1658 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
1659 const struct st_lsm6dsx_fs_table_entry *fs_table;
1660 struct st_lsm6dsx_hw *hw = sensor->hw;
1661 int i, len = 0;
1662
1663 fs_table = &hw->settings->fs_table[sensor->id];
1664 for (i = 0; i < fs_table->fs_len; i++)
1665 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
1666 fs_table->fs_avl[i].gain);
1667 buf[len - 1] = '\n';
1668
1669 return len;
1670 }
1671
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)1672 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
1673 struct iio_chan_spec const *chan,
1674 long mask)
1675 {
1676 switch (mask) {
1677 case IIO_CHAN_INFO_SCALE:
1678 switch (chan->type) {
1679 case IIO_ANGL_VEL:
1680 case IIO_ACCEL:
1681 return IIO_VAL_INT_PLUS_NANO;
1682 default:
1683 return IIO_VAL_INT_PLUS_MICRO;
1684 }
1685 default:
1686 return IIO_VAL_INT_PLUS_MICRO;
1687 }
1688 }
1689
1690 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1691 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1692 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1693 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1694 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1695
1696 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1697 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1698 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1699 NULL,
1700 };
1701
1702 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1703 .attrs = st_lsm6dsx_acc_attributes,
1704 };
1705
1706 static const struct iio_info st_lsm6dsx_acc_info = {
1707 .attrs = &st_lsm6dsx_acc_attribute_group,
1708 .read_raw = st_lsm6dsx_read_raw,
1709 .write_raw = st_lsm6dsx_write_raw,
1710 .read_event_value = st_lsm6dsx_read_event,
1711 .write_event_value = st_lsm6dsx_write_event,
1712 .read_event_config = st_lsm6dsx_read_event_config,
1713 .write_event_config = st_lsm6dsx_write_event_config,
1714 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1715 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1716 };
1717
1718 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1719 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1720 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1721 NULL,
1722 };
1723
1724 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1725 .attrs = st_lsm6dsx_gyro_attributes,
1726 };
1727
1728 static const struct iio_info st_lsm6dsx_gyro_info = {
1729 .attrs = &st_lsm6dsx_gyro_attribute_group,
1730 .read_raw = st_lsm6dsx_read_raw,
1731 .write_raw = st_lsm6dsx_write_raw,
1732 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1733 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1734 };
1735
st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw * hw,int * drdy_pin)1736 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1737 {
1738 struct device *dev = hw->dev;
1739
1740 if (!dev_fwnode(dev))
1741 return -EINVAL;
1742
1743 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1744 }
1745
1746 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)1747 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1748 const struct st_lsm6dsx_reg **drdy_reg)
1749 {
1750 int err = 0, drdy_pin;
1751
1752 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1753 struct st_sensors_platform_data *pdata;
1754 struct device *dev = hw->dev;
1755
1756 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1757 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1758 }
1759
1760 switch (drdy_pin) {
1761 case 1:
1762 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1763 *drdy_reg = &hw->settings->irq_config.irq1;
1764 break;
1765 case 2:
1766 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1767 *drdy_reg = &hw->settings->irq_config.irq2;
1768 break;
1769 default:
1770 dev_err(hw->dev, "unsupported data ready pin\n");
1771 err = -EINVAL;
1772 break;
1773 }
1774
1775 return err;
1776 }
1777
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)1778 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1779 {
1780 const struct st_lsm6dsx_shub_settings *hub_settings;
1781 struct st_sensors_platform_data *pdata;
1782 struct device *dev = hw->dev;
1783 unsigned int data;
1784 int err = 0;
1785
1786 hub_settings = &hw->settings->shub_settings;
1787
1788 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1789 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1790 (pdata && pdata->pullups)) {
1791 if (hub_settings->pullup_en.sec_page) {
1792 err = st_lsm6dsx_set_page(hw, true);
1793 if (err < 0)
1794 return err;
1795 }
1796
1797 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1798 err = regmap_update_bits(hw->regmap,
1799 hub_settings->pullup_en.addr,
1800 hub_settings->pullup_en.mask, data);
1801
1802 if (hub_settings->pullup_en.sec_page)
1803 st_lsm6dsx_set_page(hw, false);
1804
1805 if (err < 0)
1806 return err;
1807 }
1808
1809 if (hub_settings->aux_sens.addr) {
1810 /* configure aux sensors */
1811 err = st_lsm6dsx_set_page(hw, true);
1812 if (err < 0)
1813 return err;
1814
1815 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1816 err = regmap_update_bits(hw->regmap,
1817 hub_settings->aux_sens.addr,
1818 hub_settings->aux_sens.mask, data);
1819
1820 st_lsm6dsx_set_page(hw, false);
1821
1822 if (err < 0)
1823 return err;
1824 }
1825
1826 if (hub_settings->emb_func.addr) {
1827 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1828 err = regmap_update_bits(hw->regmap,
1829 hub_settings->emb_func.addr,
1830 hub_settings->emb_func.mask, data);
1831 }
1832
1833 return err;
1834 }
1835
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)1836 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1837 {
1838 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1839 int err, val;
1840
1841 ts_settings = &hw->settings->ts_settings;
1842 /* enable hw timestamp generation if necessary */
1843 if (ts_settings->timer_en.addr) {
1844 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1845 err = regmap_update_bits(hw->regmap,
1846 ts_settings->timer_en.addr,
1847 ts_settings->timer_en.mask, val);
1848 if (err < 0)
1849 return err;
1850 }
1851
1852 /* enable high resolution for hw ts timer if necessary */
1853 if (ts_settings->hr_timer.addr) {
1854 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
1855 err = regmap_update_bits(hw->regmap,
1856 ts_settings->hr_timer.addr,
1857 ts_settings->hr_timer.mask, val);
1858 if (err < 0)
1859 return err;
1860 }
1861
1862 /* enable ts queueing in FIFO if necessary */
1863 if (ts_settings->fifo_en.addr) {
1864 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
1865 err = regmap_update_bits(hw->regmap,
1866 ts_settings->fifo_en.addr,
1867 ts_settings->fifo_en.mask, val);
1868 if (err < 0)
1869 return err;
1870 }
1871
1872 /* calibrate timestamp sensitivity */
1873 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
1874 if (ts_settings->freq_fine) {
1875 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
1876 if (err < 0)
1877 return err;
1878
1879 /*
1880 * linearize the AN5192 formula:
1881 * 1 / (1 + x) ~= 1 - x (Taylor’s Series)
1882 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
1883 * ttrim[ns] ~= 25000 - 37.5 * val
1884 * ttrim[ns] ~= 25000 - (37500 * val) / 1000
1885 */
1886 hw->ts_gain -= ((s8)val * 37500) / 1000;
1887 }
1888
1889 return 0;
1890 }
1891
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)1892 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
1893 {
1894 const struct st_lsm6dsx_reg *reg;
1895 int err;
1896
1897 /*
1898 * flush hw FIFO before device reset in order to avoid
1899 * possible races on interrupt line 1. If the first interrupt
1900 * line is asserted during hw reset the device will work in
1901 * I3C-only mode (if it is supported)
1902 */
1903 err = st_lsm6dsx_flush_fifo(hw);
1904 if (err < 0 && err != -ENOTSUPP)
1905 return err;
1906
1907 /* device sw reset */
1908 reg = &hw->settings->reset;
1909 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1910 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1911 if (err < 0)
1912 return err;
1913
1914 msleep(50);
1915
1916 /* reload trimming parameter */
1917 reg = &hw->settings->boot;
1918 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1919 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1920 if (err < 0)
1921 return err;
1922
1923 msleep(50);
1924
1925 return 0;
1926 }
1927
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)1928 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
1929 {
1930 const struct st_lsm6dsx_reg *reg;
1931 int err;
1932
1933 err = st_lsm6dsx_reset_device(hw);
1934 if (err < 0)
1935 return err;
1936
1937 /* enable Block Data Update */
1938 reg = &hw->settings->bdu;
1939 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1940 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1941 if (err < 0)
1942 return err;
1943
1944 /* enable FIFO watermak interrupt */
1945 err = st_lsm6dsx_get_drdy_reg(hw, ®);
1946 if (err < 0)
1947 return err;
1948
1949 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1950 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1951 if (err < 0)
1952 return err;
1953
1954 /* enable Latched interrupts for device events */
1955 if (hw->settings->irq_config.lir.addr) {
1956 reg = &hw->settings->irq_config.lir;
1957 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1958 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1959 if (err < 0)
1960 return err;
1961
1962 /* enable clear on read for latched interrupts */
1963 if (hw->settings->irq_config.clear_on_read.addr) {
1964 reg = &hw->settings->irq_config.clear_on_read;
1965 err = regmap_update_bits(hw->regmap,
1966 reg->addr, reg->mask,
1967 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1968 if (err < 0)
1969 return err;
1970 }
1971 }
1972
1973 /* enable drdy-mas if available */
1974 if (hw->settings->drdy_mask.addr) {
1975 reg = &hw->settings->drdy_mask;
1976 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1977 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1978 if (err < 0)
1979 return err;
1980 }
1981
1982 err = st_lsm6dsx_init_shub(hw);
1983 if (err < 0)
1984 return err;
1985
1986 return st_lsm6dsx_init_hw_timer(hw);
1987 }
1988
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)1989 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
1990 enum st_lsm6dsx_sensor_id id,
1991 const char *name)
1992 {
1993 struct st_lsm6dsx_sensor *sensor;
1994 struct iio_dev *iio_dev;
1995
1996 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
1997 if (!iio_dev)
1998 return NULL;
1999
2000 iio_dev->modes = INDIO_DIRECT_MODE;
2001 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2002 iio_dev->channels = hw->settings->channels[id].chan;
2003 iio_dev->num_channels = hw->settings->channels[id].len;
2004
2005 sensor = iio_priv(iio_dev);
2006 sensor->id = id;
2007 sensor->hw = hw;
2008 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2009 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2010 sensor->watermark = 1;
2011
2012 switch (id) {
2013 case ST_LSM6DSX_ID_ACC:
2014 iio_dev->info = &st_lsm6dsx_acc_info;
2015 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2016 name);
2017 break;
2018 case ST_LSM6DSX_ID_GYRO:
2019 iio_dev->info = &st_lsm6dsx_gyro_info;
2020 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2021 name);
2022 break;
2023 default:
2024 return NULL;
2025 }
2026 iio_dev->name = sensor->name;
2027
2028 return iio_dev;
2029 }
2030
2031 static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2032 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2033 {
2034 const struct st_lsm6dsx_event_settings *event_settings;
2035 int err, data;
2036 s64 timestamp;
2037
2038 if (!hw->enable_event)
2039 return false;
2040
2041 event_settings = &hw->settings->event_settings;
2042 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2043 &data, sizeof(data));
2044 if (err < 0)
2045 return false;
2046
2047 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2048 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2049 (hw->enable_event & BIT(IIO_MOD_Z)))
2050 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2051 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2052 0,
2053 IIO_MOD_Z,
2054 IIO_EV_TYPE_THRESH,
2055 IIO_EV_DIR_EITHER),
2056 timestamp);
2057
2058 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2059 (hw->enable_event & BIT(IIO_MOD_Y)))
2060 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2061 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2062 0,
2063 IIO_MOD_Y,
2064 IIO_EV_TYPE_THRESH,
2065 IIO_EV_DIR_EITHER),
2066 timestamp);
2067
2068 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2069 (hw->enable_event & BIT(IIO_MOD_X)))
2070 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2071 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2072 0,
2073 IIO_MOD_X,
2074 IIO_EV_TYPE_THRESH,
2075 IIO_EV_DIR_EITHER),
2076 timestamp);
2077
2078 return data & event_settings->wakeup_src_status_mask;
2079 }
2080
st_lsm6dsx_handler_thread(int irq,void * private)2081 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2082 {
2083 struct st_lsm6dsx_hw *hw = private;
2084 int fifo_len = 0, len;
2085 bool event;
2086
2087 event = st_lsm6dsx_report_motion_event(hw);
2088
2089 if (!hw->settings->fifo_ops.read_fifo)
2090 return event ? IRQ_HANDLED : IRQ_NONE;
2091
2092 /*
2093 * If we are using edge IRQs, new samples can arrive while
2094 * processing current interrupt since there are no hw
2095 * guarantees the irq line stays "low" long enough to properly
2096 * detect the new interrupt. In this case the new sample will
2097 * be missed.
2098 * Polling FIFO status register allow us to read new
2099 * samples even if the interrupt arrives while processing
2100 * previous data and the timeslot where the line is "low" is
2101 * too short to be properly detected.
2102 */
2103 do {
2104 mutex_lock(&hw->fifo_lock);
2105 len = hw->settings->fifo_ops.read_fifo(hw);
2106 mutex_unlock(&hw->fifo_lock);
2107
2108 if (len > 0)
2109 fifo_len += len;
2110 } while (len > 0);
2111
2112 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2113 }
2114
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2115 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2116 {
2117 struct st_sensors_platform_data *pdata;
2118 const struct st_lsm6dsx_reg *reg;
2119 struct device *dev = hw->dev;
2120 unsigned long irq_type;
2121 bool irq_active_low;
2122 int err;
2123
2124 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2125
2126 switch (irq_type) {
2127 case IRQF_TRIGGER_HIGH:
2128 case IRQF_TRIGGER_RISING:
2129 irq_active_low = false;
2130 break;
2131 case IRQF_TRIGGER_LOW:
2132 case IRQF_TRIGGER_FALLING:
2133 irq_active_low = true;
2134 break;
2135 default:
2136 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2137 return -EINVAL;
2138 }
2139
2140 reg = &hw->settings->irq_config.hla;
2141 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2142 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2143 reg->mask));
2144 if (err < 0)
2145 return err;
2146
2147 pdata = (struct st_sensors_platform_data *)dev->platform_data;
2148 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2149 (pdata && pdata->open_drain)) {
2150 reg = &hw->settings->irq_config.od;
2151 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2152 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2153 if (err < 0)
2154 return err;
2155
2156 irq_type |= IRQF_SHARED;
2157 }
2158
2159 err = devm_request_threaded_irq(hw->dev, hw->irq,
2160 NULL,
2161 st_lsm6dsx_handler_thread,
2162 irq_type | IRQF_ONESHOT,
2163 "lsm6dsx", hw);
2164 if (err) {
2165 dev_err(hw->dev, "failed to request trigger irq %d\n",
2166 hw->irq);
2167 return err;
2168 }
2169
2170 return 0;
2171 }
2172
st_lsm6dsx_init_regulators(struct device * dev)2173 static int st_lsm6dsx_init_regulators(struct device *dev)
2174 {
2175 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2176 int err;
2177
2178 /* vdd-vddio power regulators */
2179 hw->regulators[0].supply = "vdd";
2180 hw->regulators[1].supply = "vddio";
2181 err = devm_regulator_bulk_get(dev, ARRAY_SIZE(hw->regulators),
2182 hw->regulators);
2183 if (err)
2184 return dev_err_probe(dev, err, "failed to get regulators\n");
2185
2186 err = regulator_bulk_enable(ARRAY_SIZE(hw->regulators),
2187 hw->regulators);
2188 if (err) {
2189 dev_err(dev, "failed to enable regulators: %d\n", err);
2190 return err;
2191 }
2192
2193 msleep(50);
2194
2195 return 0;
2196 }
2197
st_lsm6dsx_chip_uninit(void * data)2198 static void st_lsm6dsx_chip_uninit(void *data)
2199 {
2200 struct st_lsm6dsx_hw *hw = data;
2201
2202 regulator_bulk_disable(ARRAY_SIZE(hw->regulators), hw->regulators);
2203 }
2204
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2205 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2206 struct regmap *regmap)
2207 {
2208 struct st_sensors_platform_data *pdata = dev->platform_data;
2209 const struct st_lsm6dsx_shub_settings *hub_settings;
2210 struct st_lsm6dsx_hw *hw;
2211 const char *name = NULL;
2212 int i, err;
2213
2214 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2215 if (!hw)
2216 return -ENOMEM;
2217
2218 dev_set_drvdata(dev, (void *)hw);
2219
2220 mutex_init(&hw->fifo_lock);
2221 mutex_init(&hw->conf_lock);
2222 mutex_init(&hw->page_lock);
2223
2224 err = st_lsm6dsx_init_regulators(dev);
2225 if (err)
2226 return err;
2227
2228 err = devm_add_action_or_reset(dev, st_lsm6dsx_chip_uninit, hw);
2229 if (err)
2230 return err;
2231
2232 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2233 if (!hw->buff)
2234 return -ENOMEM;
2235
2236 hw->dev = dev;
2237 hw->irq = irq;
2238 hw->regmap = regmap;
2239
2240 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2241 if (err < 0)
2242 return err;
2243
2244 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2245 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2246 if (!hw->iio_devs[i])
2247 return -ENOMEM;
2248 }
2249
2250 err = st_lsm6dsx_init_device(hw);
2251 if (err < 0)
2252 return err;
2253
2254 hub_settings = &hw->settings->shub_settings;
2255 if (hub_settings->master_en.addr &&
2256 (!dev_fwnode(dev) ||
2257 !device_property_read_bool(dev, "st,disable-sensor-hub"))) {
2258 err = st_lsm6dsx_shub_probe(hw, name);
2259 if (err < 0)
2260 return err;
2261 }
2262
2263 if (hw->irq > 0) {
2264 err = st_lsm6dsx_irq_setup(hw);
2265 if (err < 0)
2266 return err;
2267
2268 err = st_lsm6dsx_fifo_setup(hw);
2269 if (err < 0)
2270 return err;
2271 }
2272
2273 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2274 if (err)
2275 return err;
2276
2277 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2278 if (!hw->iio_devs[i])
2279 continue;
2280
2281 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2282 if (err)
2283 return err;
2284 }
2285
2286 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2287 (pdata && pdata->wakeup_source))
2288 device_init_wakeup(dev, true);
2289
2290 return 0;
2291 }
2292 EXPORT_SYMBOL(st_lsm6dsx_probe);
2293
st_lsm6dsx_suspend(struct device * dev)2294 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
2295 {
2296 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2297 struct st_lsm6dsx_sensor *sensor;
2298 int i, err = 0;
2299
2300 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2301 if (!hw->iio_devs[i])
2302 continue;
2303
2304 sensor = iio_priv(hw->iio_devs[i]);
2305 if (!(hw->enable_mask & BIT(sensor->id)))
2306 continue;
2307
2308 if (device_may_wakeup(dev) &&
2309 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2310 /* Enable wake from IRQ */
2311 enable_irq_wake(hw->irq);
2312 continue;
2313 }
2314
2315 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2316 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2317 sensor->id == ST_LSM6DSX_ID_EXT2)
2318 err = st_lsm6dsx_shub_set_enable(sensor, false);
2319 else
2320 err = st_lsm6dsx_sensor_set_enable(sensor, false);
2321 if (err < 0)
2322 return err;
2323
2324 hw->suspend_mask |= BIT(sensor->id);
2325 }
2326
2327 if (hw->fifo_mask)
2328 err = st_lsm6dsx_flush_fifo(hw);
2329
2330 return err;
2331 }
2332
st_lsm6dsx_resume(struct device * dev)2333 static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
2334 {
2335 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2336 struct st_lsm6dsx_sensor *sensor;
2337 int i, err = 0;
2338
2339 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2340 if (!hw->iio_devs[i])
2341 continue;
2342
2343 sensor = iio_priv(hw->iio_devs[i]);
2344 if (device_may_wakeup(dev) &&
2345 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2346 disable_irq_wake(hw->irq);
2347
2348 if (!(hw->suspend_mask & BIT(sensor->id)))
2349 continue;
2350
2351 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2352 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2353 sensor->id == ST_LSM6DSX_ID_EXT2)
2354 err = st_lsm6dsx_shub_set_enable(sensor, true);
2355 else
2356 err = st_lsm6dsx_sensor_set_enable(sensor, true);
2357 if (err < 0)
2358 return err;
2359
2360 hw->suspend_mask &= ~BIT(sensor->id);
2361 }
2362
2363 if (hw->fifo_mask)
2364 err = st_lsm6dsx_resume_fifo(hw);
2365
2366 return err;
2367 }
2368
2369 const struct dev_pm_ops st_lsm6dsx_pm_ops = {
2370 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
2371 };
2372 EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
2373
2374 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2375 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2376 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2377 MODULE_LICENSE("GPL v2");
2378