1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * LTC2688 16 channel, 16 bit Voltage Output SoftSpan DAC driver
4 *
5 * Copyright 2022 Analog Devices Inc.
6 */
7 #include <linux/bitfield.h>
8 #include <linux/bits.h>
9 #include <linux/clk.h>
10 #include <linux/device.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/iio/iio.h>
13 #include <linux/limits.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/mutex.h>
18 #include <linux/of.h>
19 #include <linux/property.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/spi/spi.h>
23
24 #define LTC2688_DAC_CHANNELS 16
25
26 #define LTC2688_CMD_CH_CODE(x) (0x00 + (x))
27 #define LTC2688_CMD_CH_SETTING(x) (0x10 + (x))
28 #define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x))
29 #define LTC2688_CMD_CH_GAIN(x) (0x30 + (x))
30 #define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x))
31
32 #define LTC2688_CMD_CONFIG 0x70
33 #define LTC2688_CMD_POWERDOWN 0x71
34 #define LTC2688_CMD_A_B_SELECT 0x72
35 #define LTC2688_CMD_SW_TOGGLE 0x73
36 #define LTC2688_CMD_TOGGLE_DITHER_EN 0x74
37 #define LTC2688_CMD_THERMAL_STAT 0x77
38 #define LTC2688_CMD_UPDATE_ALL 0x7C
39 #define LTC2688_CMD_NOOP 0xFF
40
41 #define LTC2688_READ_OPERATION 0x80
42
43 /* Channel Settings */
44 #define LTC2688_CH_SPAN_MSK GENMASK(2, 0)
45 #define LTC2688_CH_OVERRANGE_MSK BIT(3)
46 #define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4)
47 #define LTC2688_CH_TGP_MAX 3
48 #define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6)
49 #define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9)
50 #define LTC2688_CH_MODE_MSK BIT(11)
51
52 #define LTC2688_DITHER_RAW_MASK GENMASK(15, 2)
53 #define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2)
54 #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1)
55 #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1)
56
57 /* Configuration register */
58 #define LTC2688_CONFIG_RST BIT(15)
59 #define LTC2688_CONFIG_EXT_REF BIT(1)
60
61 #define LTC2688_DITHER_FREQ_AVAIL_N 5
62
63 enum {
64 LTC2688_SPAN_RANGE_0V_5V,
65 LTC2688_SPAN_RANGE_0V_10V,
66 LTC2688_SPAN_RANGE_M5V_5V,
67 LTC2688_SPAN_RANGE_M10V_10V,
68 LTC2688_SPAN_RANGE_M15V_15V,
69 LTC2688_SPAN_RANGE_MAX
70 };
71
72 enum {
73 LTC2688_MODE_DEFAULT,
74 LTC2688_MODE_DITHER_TOGGLE,
75 };
76
77 struct ltc2688_chan {
78 long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N];
79 bool overrange;
80 bool toggle_chan;
81 u8 mode;
82 };
83
84 struct ltc2688_state {
85 struct spi_device *spi;
86 struct regmap *regmap;
87 struct regulator_bulk_data regulators[2];
88 struct ltc2688_chan channels[LTC2688_DAC_CHANNELS];
89 struct iio_chan_spec *iio_chan;
90 /* lock to protect against multiple access to the device and shared data */
91 struct mutex lock;
92 int vref;
93 /*
94 * DMA (thus cache coherency maintenance) may require the
95 * transfer buffers to live in their own cache lines.
96 */
97 u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
98 u8 rx_data[3];
99 };
100
ltc2688_spi_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)101 static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size,
102 void *val, size_t val_size)
103 {
104 struct ltc2688_state *st = context;
105 struct spi_transfer xfers[] = {
106 {
107 .tx_buf = st->tx_data,
108 .bits_per_word = 8,
109 .len = reg_size + val_size,
110 .cs_change = 1,
111 }, {
112 .tx_buf = st->tx_data + 3,
113 .rx_buf = st->rx_data,
114 .bits_per_word = 8,
115 .len = reg_size + val_size,
116 },
117 };
118 int ret;
119
120 memcpy(st->tx_data, reg, reg_size);
121
122 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
123 if (ret)
124 return ret;
125
126 memcpy(val, &st->rx_data[1], val_size);
127
128 return 0;
129 }
130
ltc2688_spi_write(void * context,const void * data,size_t count)131 static int ltc2688_spi_write(void *context, const void *data, size_t count)
132 {
133 struct ltc2688_state *st = context;
134
135 return spi_write(st->spi, data, count);
136 }
137
ltc2688_span_get(const struct ltc2688_state * st,int c)138 static int ltc2688_span_get(const struct ltc2688_state *st, int c)
139 {
140 int ret, reg, span;
141
142 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), ®);
143 if (ret)
144 return ret;
145
146 span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg);
147 /* sanity check to make sure we don't get any weird value from the HW */
148 if (span >= LTC2688_SPAN_RANGE_MAX)
149 return -EIO;
150
151 return span;
152 }
153
154 static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = {
155 {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000},
156 };
157
ltc2688_scale_get(const struct ltc2688_state * st,int c,int * val)158 static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val)
159 {
160 const struct ltc2688_chan *chan = &st->channels[c];
161 int span, fs;
162
163 span = ltc2688_span_get(st, c);
164 if (span < 0)
165 return span;
166
167 fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0];
168 if (chan->overrange)
169 fs = mult_frac(fs, 105, 100);
170
171 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096);
172
173 return 0;
174 }
175
ltc2688_offset_get(const struct ltc2688_state * st,int c,int * val)176 static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val)
177 {
178 int span;
179
180 span = ltc2688_span_get(st, c);
181 if (span < 0)
182 return span;
183
184 if (ltc2688_span_helper[span][0] < 0)
185 *val = -32768;
186 else
187 *val = 0;
188
189 return 0;
190 }
191
192 enum {
193 LTC2688_INPUT_A,
194 LTC2688_INPUT_B,
195 LTC2688_INPUT_B_AVAIL,
196 LTC2688_DITHER_OFF,
197 LTC2688_DITHER_FREQ_AVAIL,
198 };
199
ltc2688_dac_code_write(struct ltc2688_state * st,u32 chan,u32 input,u16 code)200 static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input,
201 u16 code)
202 {
203 struct ltc2688_chan *c = &st->channels[chan];
204 int ret, reg;
205
206 /* 2 LSBs set to 0 if writing dither amplitude */
207 if (!c->toggle_chan && input == LTC2688_INPUT_B) {
208 if (code > LTC2688_DITHER_RAW_MAX_VAL)
209 return -EINVAL;
210
211 code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code);
212 }
213
214 mutex_lock(&st->lock);
215 /* select the correct input register to read from */
216 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
217 input << chan);
218 if (ret)
219 goto out_unlock;
220
221 /*
222 * If in dither/toggle mode the dac should be updated by an
223 * external signal (or sw toggle) and not here.
224 */
225 if (c->mode == LTC2688_MODE_DEFAULT)
226 reg = LTC2688_CMD_CH_CODE_UPDATE(chan);
227 else
228 reg = LTC2688_CMD_CH_CODE(chan);
229
230 ret = regmap_write(st->regmap, reg, code);
231 out_unlock:
232 mutex_unlock(&st->lock);
233 return ret;
234 }
235
ltc2688_dac_code_read(struct ltc2688_state * st,u32 chan,u32 input,u32 * code)236 static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input,
237 u32 *code)
238 {
239 struct ltc2688_chan *c = &st->channels[chan];
240 int ret;
241
242 mutex_lock(&st->lock);
243 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
244 input << chan);
245 if (ret)
246 goto out_unlock;
247
248 ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code);
249 out_unlock:
250 mutex_unlock(&st->lock);
251
252 if (!c->toggle_chan && input == LTC2688_INPUT_B)
253 *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code);
254
255 return ret;
256 }
257
258 static const int ltc2688_raw_range[] = {0, 1, U16_MAX};
259
ltc2688_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long info)260 static int ltc2688_read_avail(struct iio_dev *indio_dev,
261 struct iio_chan_spec const *chan,
262 const int **vals, int *type, int *length,
263 long info)
264 {
265 switch (info) {
266 case IIO_CHAN_INFO_RAW:
267 *vals = ltc2688_raw_range;
268 *type = IIO_VAL_INT;
269 return IIO_AVAIL_RANGE;
270 default:
271 return -EINVAL;
272 }
273 }
274
ltc2688_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)275 static int ltc2688_read_raw(struct iio_dev *indio_dev,
276 struct iio_chan_spec const *chan, int *val,
277 int *val2, long info)
278 {
279 struct ltc2688_state *st = iio_priv(indio_dev);
280 int ret;
281
282 switch (info) {
283 case IIO_CHAN_INFO_RAW:
284 ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A,
285 val);
286 if (ret)
287 return ret;
288
289 return IIO_VAL_INT;
290 case IIO_CHAN_INFO_OFFSET:
291 ret = ltc2688_offset_get(st, chan->channel, val);
292 if (ret)
293 return ret;
294
295 return IIO_VAL_INT;
296 case IIO_CHAN_INFO_SCALE:
297 ret = ltc2688_scale_get(st, chan->channel, val);
298 if (ret)
299 return ret;
300
301 *val2 = 16;
302 return IIO_VAL_FRACTIONAL_LOG2;
303 case IIO_CHAN_INFO_CALIBBIAS:
304 ret = regmap_read(st->regmap,
305 LTC2688_CMD_CH_OFFSET(chan->channel), val);
306 if (ret)
307 return ret;
308
309 *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val);
310 return IIO_VAL_INT;
311 case IIO_CHAN_INFO_CALIBSCALE:
312 ret = regmap_read(st->regmap,
313 LTC2688_CMD_CH_GAIN(chan->channel), val);
314 if (ret)
315 return ret;
316
317 return IIO_VAL_INT;
318 default:
319 return -EINVAL;
320 }
321 }
322
ltc2688_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long info)323 static int ltc2688_write_raw(struct iio_dev *indio_dev,
324 struct iio_chan_spec const *chan, int val,
325 int val2, long info)
326 {
327 struct ltc2688_state *st = iio_priv(indio_dev);
328
329 switch (info) {
330 case IIO_CHAN_INFO_RAW:
331 if (val > U16_MAX || val < 0)
332 return -EINVAL;
333
334 return ltc2688_dac_code_write(st, chan->channel,
335 LTC2688_INPUT_A, val);
336 case IIO_CHAN_INFO_CALIBBIAS:
337 if (val > LTC2688_CH_CALIBBIAS_MAX_VAL)
338 return -EINVAL;
339
340 return regmap_write(st->regmap,
341 LTC2688_CMD_CH_OFFSET(chan->channel),
342 FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val));
343 case IIO_CHAN_INFO_CALIBSCALE:
344 return regmap_write(st->regmap,
345 LTC2688_CMD_CH_GAIN(chan->channel), val);
346 default:
347 return -EINVAL;
348 }
349 }
350
ltc2688_dither_toggle_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)351 static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev,
352 uintptr_t private,
353 const struct iio_chan_spec *chan,
354 const char *buf, size_t len)
355 {
356 struct ltc2688_state *st = iio_priv(indio_dev);
357 struct ltc2688_chan *c = &st->channels[chan->channel];
358 int ret;
359 bool en;
360
361 ret = kstrtobool(buf, &en);
362 if (ret)
363 return ret;
364
365 mutex_lock(&st->lock);
366 ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN,
367 BIT(chan->channel), en << chan->channel);
368 if (ret)
369 goto out_unlock;
370
371 c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT;
372 out_unlock:
373 mutex_unlock(&st->lock);
374
375 return ret ?: len;
376 }
377
ltc2688_reg_bool_get(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)378 static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev,
379 uintptr_t private,
380 const struct iio_chan_spec *chan,
381 char *buf)
382 {
383 const struct ltc2688_state *st = iio_priv(indio_dev);
384 int ret;
385 u32 val;
386
387 ret = regmap_read(st->regmap, private, &val);
388 if (ret)
389 return ret;
390
391 return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel)));
392 }
393
ltc2688_reg_bool_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)394 static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev,
395 uintptr_t private,
396 const struct iio_chan_spec *chan,
397 const char *buf, size_t len)
398 {
399 const struct ltc2688_state *st = iio_priv(indio_dev);
400 int ret;
401 bool en;
402
403 ret = kstrtobool(buf, &en);
404 if (ret)
405 return ret;
406
407 ret = regmap_update_bits(st->regmap, private, BIT(chan->channel),
408 en << chan->channel);
409 if (ret)
410 return ret;
411
412 return len;
413 }
414
ltc2688_dither_freq_avail(const struct ltc2688_state * st,const struct ltc2688_chan * chan,char * buf)415 static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st,
416 const struct ltc2688_chan *chan,
417 char *buf)
418 {
419 int sz = 0;
420 u32 f;
421
422 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
423 sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]);
424
425 buf[sz - 1] = '\n';
426
427 return sz;
428 }
429
ltc2688_dither_freq_get(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)430 static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev,
431 uintptr_t private,
432 const struct iio_chan_spec *chan,
433 char *buf)
434 {
435 const struct ltc2688_state *st = iio_priv(indio_dev);
436 const struct ltc2688_chan *c = &st->channels[chan->channel];
437 u32 reg, freq;
438 int ret;
439
440 if (private == LTC2688_DITHER_FREQ_AVAIL)
441 return ltc2688_dither_freq_avail(st, c, buf);
442
443 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
444 ®);
445 if (ret)
446 return ret;
447
448 freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg);
449 if (freq >= ARRAY_SIZE(c->dither_frequency))
450 return -EIO;
451
452 return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]);
453 }
454
ltc2688_dither_freq_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)455 static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev,
456 uintptr_t private,
457 const struct iio_chan_spec *chan,
458 const char *buf, size_t len)
459 {
460 const struct ltc2688_state *st = iio_priv(indio_dev);
461 const struct ltc2688_chan *c = &st->channels[chan->channel];
462 long val;
463 u32 freq;
464 int ret;
465
466 if (private == LTC2688_DITHER_FREQ_AVAIL)
467 return -EINVAL;
468
469 ret = kstrtol(buf, 10, &val);
470 if (ret)
471 return ret;
472
473 for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) {
474 if (val == c->dither_frequency[freq])
475 break;
476 }
477
478 if (freq == ARRAY_SIZE(c->dither_frequency))
479 return -EINVAL;
480
481 ret = regmap_update_bits(st->regmap,
482 LTC2688_CMD_CH_SETTING(chan->channel),
483 LTC2688_CH_DIT_PER_MSK,
484 FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq));
485 if (ret)
486 return ret;
487
488 return len;
489 }
490
ltc2688_dac_input_read(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)491 static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev,
492 uintptr_t private,
493 const struct iio_chan_spec *chan,
494 char *buf)
495 {
496 struct ltc2688_state *st = iio_priv(indio_dev);
497 int ret;
498 u32 val;
499
500 if (private == LTC2688_INPUT_B_AVAIL)
501 return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0],
502 ltc2688_raw_range[1],
503 ltc2688_raw_range[2] / 4);
504
505 if (private == LTC2688_DITHER_OFF)
506 return sysfs_emit(buf, "0\n");
507
508 ret = ltc2688_dac_code_read(st, chan->channel, private, &val);
509 if (ret)
510 return ret;
511
512 return sysfs_emit(buf, "%u\n", val);
513 }
514
ltc2688_dac_input_write(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)515 static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev,
516 uintptr_t private,
517 const struct iio_chan_spec *chan,
518 const char *buf, size_t len)
519 {
520 struct ltc2688_state *st = iio_priv(indio_dev);
521 int ret;
522 u16 val;
523
524 if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF)
525 return -EINVAL;
526
527 ret = kstrtou16(buf, 10, &val);
528 if (ret)
529 return ret;
530
531 ret = ltc2688_dac_code_write(st, chan->channel, private, val);
532 if (ret)
533 return ret;
534
535 return len;
536 }
537
ltc2688_get_dither_phase(struct iio_dev * dev,const struct iio_chan_spec * chan)538 static int ltc2688_get_dither_phase(struct iio_dev *dev,
539 const struct iio_chan_spec *chan)
540 {
541 struct ltc2688_state *st = iio_priv(dev);
542 int ret, regval;
543
544 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
545 ®val);
546 if (ret)
547 return ret;
548
549 return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval);
550 }
551
ltc2688_set_dither_phase(struct iio_dev * dev,const struct iio_chan_spec * chan,unsigned int phase)552 static int ltc2688_set_dither_phase(struct iio_dev *dev,
553 const struct iio_chan_spec *chan,
554 unsigned int phase)
555 {
556 struct ltc2688_state *st = iio_priv(dev);
557
558 return regmap_update_bits(st->regmap,
559 LTC2688_CMD_CH_SETTING(chan->channel),
560 LTC2688_CH_DIT_PH_MSK,
561 FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase));
562 }
563
ltc2688_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)564 static int ltc2688_reg_access(struct iio_dev *indio_dev,
565 unsigned int reg,
566 unsigned int writeval,
567 unsigned int *readval)
568 {
569 struct ltc2688_state *st = iio_priv(indio_dev);
570
571 if (readval)
572 return regmap_read(st->regmap, reg, readval);
573
574 return regmap_write(st->regmap, reg, writeval);
575 }
576
577 static const char * const ltc2688_dither_phase[] = {
578 "0", "1.5708", "3.14159", "4.71239",
579 };
580
581 static const struct iio_enum ltc2688_dither_phase_enum = {
582 .items = ltc2688_dither_phase,
583 .num_items = ARRAY_SIZE(ltc2688_dither_phase),
584 .set = ltc2688_set_dither_phase,
585 .get = ltc2688_get_dither_phase,
586 };
587
588 #define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \
589 .name = _name, \
590 .read = (_read), \
591 .write = (_write), \
592 .private = (_what), \
593 .shared = (_shared), \
594 }
595
596 /*
597 * For toggle mode we only expose the symbol attr (sw_toggle) in case a TGPx is
598 * not provided in dts.
599 */
600 static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = {
601 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
602 ltc2688_dac_input_read, ltc2688_dac_input_write),
603 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
604 ltc2688_dac_input_read, ltc2688_dac_input_write),
605 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
606 IIO_SEPARATE, ltc2688_reg_bool_get,
607 ltc2688_dither_toggle_set),
608 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
609 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
610 LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE,
611 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
612 {}
613 };
614
615 static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = {
616 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
617 ltc2688_dac_input_read, ltc2688_dac_input_write),
618 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
619 ltc2688_dac_input_read, ltc2688_dac_input_write),
620 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
621 IIO_SEPARATE, ltc2688_reg_bool_get,
622 ltc2688_dither_toggle_set),
623 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
624 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
625 {}
626 };
627
628 static struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = {
629 LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE,
630 ltc2688_dac_input_read, ltc2688_dac_input_write),
631 LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL,
632 IIO_SEPARATE, ltc2688_dac_input_read,
633 ltc2688_dac_input_write),
634 LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE,
635 ltc2688_dac_input_read, ltc2688_dac_input_write),
636 /*
637 * Not IIO_ENUM because the available freq needs to be computed at
638 * probe. We could still use it, but it didn't felt much right.
639 */
640 LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE,
641 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
642 LTC2688_CHAN_EXT_INFO("dither_frequency_available",
643 LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE,
644 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
645 IIO_ENUM("dither_phase", IIO_SEPARATE, <c2688_dither_phase_enum),
646 IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE,
647 <c2688_dither_phase_enum),
648 LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN,
649 IIO_SEPARATE, ltc2688_reg_bool_get,
650 ltc2688_dither_toggle_set),
651 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
652 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
653 {}
654 };
655
656 static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = {
657 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
658 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
659 {}
660 };
661
662 #define LTC2688_CHANNEL(_chan) { \
663 .type = IIO_VOLTAGE, \
664 .indexed = 1, \
665 .output = 1, \
666 .channel = (_chan), \
667 .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
668 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \
669 BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \
670 .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \
671 .ext_info = ltc2688_ext_info, \
672 }
673
674 static const struct iio_chan_spec ltc2688_channels[] = {
675 LTC2688_CHANNEL(0),
676 LTC2688_CHANNEL(1),
677 LTC2688_CHANNEL(2),
678 LTC2688_CHANNEL(3),
679 LTC2688_CHANNEL(4),
680 LTC2688_CHANNEL(5),
681 LTC2688_CHANNEL(6),
682 LTC2688_CHANNEL(7),
683 LTC2688_CHANNEL(8),
684 LTC2688_CHANNEL(9),
685 LTC2688_CHANNEL(10),
686 LTC2688_CHANNEL(11),
687 LTC2688_CHANNEL(12),
688 LTC2688_CHANNEL(13),
689 LTC2688_CHANNEL(14),
690 LTC2688_CHANNEL(15),
691 };
692
ltc2688_clk_disable(void * clk)693 static void ltc2688_clk_disable(void *clk)
694 {
695 clk_disable_unprepare(clk);
696 }
697
698 static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = {
699 4, 8, 16, 32, 64,
700 };
701
ltc2688_tgp_clk_setup(struct ltc2688_state * st,struct ltc2688_chan * chan,struct fwnode_handle * node,int tgp)702 static int ltc2688_tgp_clk_setup(struct ltc2688_state *st,
703 struct ltc2688_chan *chan,
704 struct fwnode_handle *node, int tgp)
705 {
706 struct device *dev = &st->spi->dev;
707 unsigned long rate;
708 struct clk *clk;
709 int ret, f;
710
711 clk = devm_get_clk_from_child(dev, to_of_node(node), NULL);
712 if (IS_ERR(clk))
713 return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n");
714
715 ret = clk_prepare_enable(clk);
716 if (ret)
717 return dev_err_probe(dev, ret, "failed to enable tgp clk.\n");
718
719 ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk);
720 if (ret)
721 return ret;
722
723 if (chan->toggle_chan)
724 return 0;
725
726 /* calculate available dither frequencies */
727 rate = clk_get_rate(clk);
728 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
729 chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]);
730
731 return 0;
732 }
733
ltc2688_span_lookup(const struct ltc2688_state * st,int min,int max)734 static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max)
735 {
736 u32 span;
737
738 for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) {
739 if (min == ltc2688_span_helper[span][0] &&
740 max == ltc2688_span_helper[span][1])
741 return span;
742 }
743
744 return -EINVAL;
745 }
746
ltc2688_channel_config(struct ltc2688_state * st)747 static int ltc2688_channel_config(struct ltc2688_state *st)
748 {
749 struct device *dev = &st->spi->dev;
750 struct fwnode_handle *child;
751 u32 reg, clk_input, val, tmp[2];
752 int ret, span;
753
754 device_for_each_child_node(dev, child) {
755 struct ltc2688_chan *chan;
756
757 ret = fwnode_property_read_u32(child, "reg", ®);
758 if (ret) {
759 fwnode_handle_put(child);
760 return dev_err_probe(dev, ret,
761 "Failed to get reg property\n");
762 }
763
764 if (reg >= LTC2688_DAC_CHANNELS) {
765 fwnode_handle_put(child);
766 return dev_err_probe(dev, -EINVAL,
767 "reg bigger than: %d\n",
768 LTC2688_DAC_CHANNELS);
769 }
770
771 val = 0;
772 chan = &st->channels[reg];
773 if (fwnode_property_read_bool(child, "adi,toggle-mode")) {
774 chan->toggle_chan = true;
775 /* assume sw toggle ABI */
776 st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info;
777 /*
778 * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose
779 * out_voltage_raw{0|1} files.
780 */
781 __clear_bit(IIO_CHAN_INFO_RAW,
782 &st->iio_chan[reg].info_mask_separate);
783 }
784
785 ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt",
786 tmp, ARRAY_SIZE(tmp));
787 if (!ret) {
788 span = ltc2688_span_lookup(st, (int)tmp[0] / 1000,
789 tmp[1] / 1000);
790 if (span < 0) {
791 fwnode_handle_put(child);
792 return dev_err_probe(dev, -EINVAL,
793 "output range not valid:[%d %d]\n",
794 tmp[0], tmp[1]);
795 }
796
797 val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span);
798 }
799
800 ret = fwnode_property_read_u32(child, "adi,toggle-dither-input",
801 &clk_input);
802 if (!ret) {
803 if (clk_input >= LTC2688_CH_TGP_MAX) {
804 fwnode_handle_put(child);
805 return dev_err_probe(dev, -EINVAL,
806 "toggle-dither-input inv value(%d)\n",
807 clk_input);
808 }
809
810 ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input);
811 if (ret) {
812 fwnode_handle_put(child);
813 return ret;
814 }
815
816 /*
817 * 0 means software toggle which is the default mode.
818 * Hence the +1.
819 */
820 val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1);
821
822 /*
823 * If a TGPx is given, we automatically assume a dither
824 * capable channel (unless toggle is already enabled).
825 * On top of this we just set here the dither bit in the
826 * channel settings. It won't have any effect until the
827 * global toggle/dither bit is enabled.
828 */
829 if (!chan->toggle_chan) {
830 val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1);
831 st->iio_chan[reg].ext_info = ltc2688_dither_ext_info;
832 } else {
833 /* wait, no sw toggle after all */
834 st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info;
835 }
836 }
837
838 if (fwnode_property_read_bool(child, "adi,overrange")) {
839 chan->overrange = true;
840 val |= LTC2688_CH_OVERRANGE_MSK;
841 }
842
843 if (!val)
844 continue;
845
846 ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg),
847 val);
848 if (ret) {
849 fwnode_handle_put(child);
850 return dev_err_probe(dev, -EINVAL,
851 "failed to set chan settings\n");
852 }
853 }
854
855 return 0;
856 }
857
ltc2688_setup(struct ltc2688_state * st,struct regulator * vref)858 static int ltc2688_setup(struct ltc2688_state *st, struct regulator *vref)
859 {
860 struct device *dev = &st->spi->dev;
861 struct gpio_desc *gpio;
862 int ret;
863
864 /*
865 * If we have a reset pin, use that to reset the board, If not, use
866 * the reset bit.
867 */
868 gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH);
869 if (IS_ERR(gpio))
870 return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio");
871 if (gpio) {
872 usleep_range(1000, 1200);
873 /* bring device out of reset */
874 gpiod_set_value_cansleep(gpio, 0);
875 } else {
876 ret = regmap_update_bits(st->regmap, LTC2688_CMD_CONFIG,
877 LTC2688_CONFIG_RST,
878 LTC2688_CONFIG_RST);
879 if (ret)
880 return ret;
881 }
882
883 usleep_range(10000, 12000);
884
885 /*
886 * Duplicate the default channel configuration as it can change during
887 * @ltc2688_channel_config()
888 */
889 st->iio_chan = devm_kmemdup(dev, ltc2688_channels,
890 sizeof(ltc2688_channels), GFP_KERNEL);
891 if (!st->iio_chan)
892 return -ENOMEM;
893
894 ret = ltc2688_channel_config(st);
895 if (ret)
896 return ret;
897
898 if (!vref)
899 return 0;
900
901 return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
902 LTC2688_CONFIG_EXT_REF);
903 }
904
ltc2688_disable_regulators(void * data)905 static void ltc2688_disable_regulators(void *data)
906 {
907 struct ltc2688_state *st = data;
908
909 regulator_bulk_disable(ARRAY_SIZE(st->regulators), st->regulators);
910 }
911
ltc2688_disable_regulator(void * regulator)912 static void ltc2688_disable_regulator(void *regulator)
913 {
914 regulator_disable(regulator);
915 }
916
ltc2688_reg_readable(struct device * dev,unsigned int reg)917 static bool ltc2688_reg_readable(struct device *dev, unsigned int reg)
918 {
919 switch (reg) {
920 case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15):
921 return true;
922 case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT:
923 return true;
924 default:
925 return false;
926 }
927 }
928
ltc2688_reg_writable(struct device * dev,unsigned int reg)929 static bool ltc2688_reg_writable(struct device *dev, unsigned int reg)
930 {
931 /*
932 * There's a jump from 0x76 to 0x78 in the write codes and the thermal
933 * status code is 0x77 (which is read only) so that we need to check
934 * that special condition.
935 */
936 if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT)
937 return true;
938
939 return false;
940 }
941
942 static struct regmap_bus ltc2688_regmap_bus = {
943 .read = ltc2688_spi_read,
944 .write = ltc2688_spi_write,
945 .read_flag_mask = LTC2688_READ_OPERATION,
946 .reg_format_endian_default = REGMAP_ENDIAN_BIG,
947 .val_format_endian_default = REGMAP_ENDIAN_BIG,
948 };
949
950 static const struct regmap_config ltc2688_regmap_config = {
951 .reg_bits = 8,
952 .val_bits = 16,
953 .readable_reg = ltc2688_reg_readable,
954 .writeable_reg = ltc2688_reg_writable,
955 /* ignoring the no op command */
956 .max_register = LTC2688_CMD_UPDATE_ALL,
957 };
958
959 static const struct iio_info ltc2688_info = {
960 .write_raw = ltc2688_write_raw,
961 .read_raw = ltc2688_read_raw,
962 .read_avail = ltc2688_read_avail,
963 .debugfs_reg_access = ltc2688_reg_access,
964 };
965
ltc2688_probe(struct spi_device * spi)966 static int ltc2688_probe(struct spi_device *spi)
967 {
968 struct ltc2688_state *st;
969 struct iio_dev *indio_dev;
970 struct regulator *vref_reg;
971 struct device *dev = &spi->dev;
972 int ret;
973
974 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
975 if (!indio_dev)
976 return -ENOMEM;
977
978 st = iio_priv(indio_dev);
979 st->spi = spi;
980
981 /* Just write this once. No need to do it in every regmap read. */
982 st->tx_data[3] = LTC2688_CMD_NOOP;
983 mutex_init(&st->lock);
984
985 st->regmap = devm_regmap_init(dev, <c2688_regmap_bus, st,
986 <c2688_regmap_config);
987 if (IS_ERR(st->regmap))
988 return dev_err_probe(dev, PTR_ERR(st->regmap),
989 "Failed to init regmap");
990
991 st->regulators[0].supply = "vcc";
992 st->regulators[1].supply = "iovcc";
993 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(st->regulators),
994 st->regulators);
995 if (ret)
996 return dev_err_probe(dev, ret, "Failed to get regulators\n");
997
998 ret = regulator_bulk_enable(ARRAY_SIZE(st->regulators), st->regulators);
999 if (ret)
1000 return dev_err_probe(dev, ret, "Failed to enable regulators\n");
1001
1002 ret = devm_add_action_or_reset(dev, ltc2688_disable_regulators, st);
1003 if (ret)
1004 return ret;
1005
1006 vref_reg = devm_regulator_get_optional(dev, "vref");
1007 if (IS_ERR(vref_reg)) {
1008 if (PTR_ERR(vref_reg) != -ENODEV)
1009 return dev_err_probe(dev, PTR_ERR(vref_reg),
1010 "Failed to get vref regulator");
1011
1012 vref_reg = NULL;
1013 /* internal reference */
1014 st->vref = 4096;
1015 } else {
1016 ret = regulator_enable(vref_reg);
1017 if (ret)
1018 return dev_err_probe(dev, ret,
1019 "Failed to enable vref regulators\n");
1020
1021 ret = devm_add_action_or_reset(dev, ltc2688_disable_regulator,
1022 vref_reg);
1023 if (ret)
1024 return ret;
1025
1026 ret = regulator_get_voltage(vref_reg);
1027 if (ret < 0)
1028 return dev_err_probe(dev, ret, "Failed to get vref\n");
1029
1030 st->vref = ret / 1000;
1031 }
1032
1033 ret = ltc2688_setup(st, vref_reg);
1034 if (ret)
1035 return ret;
1036
1037 indio_dev->name = "ltc2688";
1038 indio_dev->info = <c2688_info;
1039 indio_dev->modes = INDIO_DIRECT_MODE;
1040 indio_dev->channels = st->iio_chan;
1041 indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels);
1042
1043 return devm_iio_device_register(dev, indio_dev);
1044 }
1045
1046 static const struct of_device_id ltc2688_of_id[] = {
1047 { .compatible = "adi,ltc2688" },
1048 {}
1049 };
1050 MODULE_DEVICE_TABLE(of, ltc2688_of_id);
1051
1052 static const struct spi_device_id ltc2688_id[] = {
1053 { "ltc2688" },
1054 {}
1055 };
1056 MODULE_DEVICE_TABLE(spi, ltc2688_id);
1057
1058 static struct spi_driver ltc2688_driver = {
1059 .driver = {
1060 .name = "ltc2688",
1061 .of_match_table = ltc2688_of_id,
1062 },
1063 .probe = ltc2688_probe,
1064 .id_table = ltc2688_id,
1065 };
1066 module_spi_driver(ltc2688_driver);
1067
1068 MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
1069 MODULE_DESCRIPTION("Analog Devices LTC2688 DAC");
1070 MODULE_LICENSE("GPL");
1071