1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015, NVIDIA Corporation.
4  */
5 
6 #ifndef _FALCON_H_
7 #define _FALCON_H_
8 
9 #include <linux/types.h>
10 
11 #define FALCON_UCLASS_METHOD_OFFSET		0x00000040
12 
13 #define FALCON_UCLASS_METHOD_DATA		0x00000044
14 
15 #define FALCON_IRQMSET				0x00001010
16 #define FALCON_IRQMSET_WDTMR			(1 << 1)
17 #define FALCON_IRQMSET_HALT			(1 << 4)
18 #define FALCON_IRQMSET_EXTERR			(1 << 5)
19 #define FALCON_IRQMSET_SWGEN0			(1 << 6)
20 #define FALCON_IRQMSET_SWGEN1			(1 << 7)
21 #define FALCON_IRQMSET_EXT(v)			(((v) & 0xff) << 8)
22 
23 #define FALCON_IRQDEST				0x0000101c
24 #define FALCON_IRQDEST_HALT			(1 << 4)
25 #define FALCON_IRQDEST_EXTERR			(1 << 5)
26 #define FALCON_IRQDEST_SWGEN0			(1 << 6)
27 #define FALCON_IRQDEST_SWGEN1			(1 << 7)
28 #define FALCON_IRQDEST_EXT(v)			(((v) & 0xff) << 8)
29 
30 #define FALCON_ITFEN				0x00001048
31 #define FALCON_ITFEN_CTXEN			(1 << 0)
32 #define FALCON_ITFEN_MTHDEN			(1 << 1)
33 
34 #define FALCON_IDLESTATE			0x0000104c
35 
36 #define FALCON_CPUCTL				0x00001100
37 #define FALCON_CPUCTL_STARTCPU			(1 << 1)
38 
39 #define FALCON_BOOTVEC				0x00001104
40 
41 #define FALCON_DMACTL				0x0000110c
42 #define FALCON_DMACTL_DMEM_SCRUBBING		(1 << 1)
43 #define FALCON_DMACTL_IMEM_SCRUBBING		(1 << 2)
44 
45 #define FALCON_DMATRFBASE			0x00001110
46 
47 #define FALCON_DMATRFMOFFS			0x00001114
48 
49 #define FALCON_DMATRFCMD			0x00001118
50 #define FALCON_DMATRFCMD_IDLE			(1 << 1)
51 #define FALCON_DMATRFCMD_IMEM			(1 << 4)
52 #define FALCON_DMATRFCMD_SIZE_256B		(6 << 8)
53 
54 #define FALCON_DMATRFFBOFFS			0x0000111c
55 
56 struct falcon_fw_bin_header_v1 {
57 	u32 magic;		/* 0x10de */
58 	u32 version;		/* version of bin format (1) */
59 	u32 size;		/* entire image size including this header */
60 	u32 os_header_offset;
61 	u32 os_data_offset;
62 	u32 os_size;
63 };
64 
65 struct falcon_fw_os_app_v1 {
66 	u32 offset;
67 	u32 size;
68 };
69 
70 struct falcon_fw_os_header_v1 {
71 	u32 code_offset;
72 	u32 code_size;
73 	u32 data_offset;
74 	u32 data_size;
75 };
76 
77 struct falcon_firmware_section {
78 	unsigned long offset;
79 	size_t size;
80 };
81 
82 struct falcon_firmware {
83 	/* Firmware after it is read but not loaded */
84 	const struct firmware *firmware;
85 
86 	/* Raw firmware data */
87 	dma_addr_t iova;
88 	dma_addr_t phys;
89 	void *virt;
90 	size_t size;
91 
92 	/* Parsed firmware information */
93 	struct falcon_firmware_section bin_data;
94 	struct falcon_firmware_section data;
95 	struct falcon_firmware_section code;
96 };
97 
98 struct falcon {
99 	/* Set by falcon client */
100 	struct device *dev;
101 	void __iomem *regs;
102 
103 	struct falcon_firmware firmware;
104 };
105 
106 int falcon_init(struct falcon *falcon);
107 void falcon_exit(struct falcon *falcon);
108 int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
109 int falcon_load_firmware(struct falcon *falcon);
110 int falcon_boot(struct falcon *falcon);
111 void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
112 int falcon_wait_idle(struct falcon *falcon);
113 
114 #endif /* _FALCON_H_ */
115