1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "mod_info_packet.h"
27 #include "core_types.h"
28 #include "dc_types.h"
29 #include "mod_shared.h"
30 #include "mod_freesync.h"
31 #include "dc.h"
32
33 enum vsc_packet_revision {
34 vsc_packet_undefined = 0,
35 //01h = VSC SDP supports only 3D stereo.
36 vsc_packet_rev1 = 1,
37 //02h = 3D stereo + PSR.
38 vsc_packet_rev2 = 2,
39 //03h = 3D stereo + PSR2.
40 vsc_packet_rev3 = 3,
41 //04h = 3D stereo + PSR/PSR2 + Y-coordinate.
42 vsc_packet_rev4 = 4,
43 //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format
44 vsc_packet_rev5 = 5,
45 };
46
47 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81
48 #define HF_VSIF_VERSION 1
49
50 // VTEM Byte Offset
51 #define VTEM_PB0 0
52 #define VTEM_PB1 1
53 #define VTEM_PB2 2
54 #define VTEM_PB3 3
55 #define VTEM_PB4 4
56 #define VTEM_PB5 5
57 #define VTEM_PB6 6
58
59 #define VTEM_MD0 7
60 #define VTEM_MD1 8
61 #define VTEM_MD2 9
62 #define VTEM_MD3 10
63
64
65 // VTEM Byte Masks
66 //PB0
67 #define MASK_VTEM_PB0__RESERVED0 0x01
68 #define MASK_VTEM_PB0__SYNC 0x02
69 #define MASK_VTEM_PB0__VFR 0x04
70 #define MASK_VTEM_PB0__AFR 0x08
71 #define MASK_VTEM_PB0__DS_TYPE 0x30
72 //0: Periodic pseudo-static EM Data Set
73 //1: Periodic dynamic EM Data Set
74 //2: Unique EM Data Set
75 //3: Reserved
76 #define MASK_VTEM_PB0__END 0x40
77 #define MASK_VTEM_PB0__NEW 0x80
78
79 //PB1
80 #define MASK_VTEM_PB1__RESERVED1 0xFF
81
82 //PB2
83 #define MASK_VTEM_PB2__ORGANIZATION_ID 0xFF
84 //0: This is a Vendor Specific EM Data Set
85 //1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean)
86 //2: This EM Data Set is defined by CTA-861-G
87 //3: This EM Data Set is defined by VESA
88 //PB3
89 #define MASK_VTEM_PB3__DATA_SET_TAG_MSB 0xFF
90 //PB4
91 #define MASK_VTEM_PB4__DATA_SET_TAG_LSB 0xFF
92 //PB5
93 #define MASK_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF
94 //PB6
95 #define MASK_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF
96
97
98
99 //PB7-27 (20 bytes):
100 //PB7 = MD0
101 #define MASK_VTEM_MD0__VRR_EN 0x01
102 #define MASK_VTEM_MD0__M_CONST 0x02
103 #define MASK_VTEM_MD0__QMS_EN 0x04
104 #define MASK_VTEM_MD0__RESERVED2 0x08
105 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0
106
107 //MD1
108 #define MASK_VTEM_MD1__BASE_VFRONT 0xFF
109
110 //MD2
111 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03
112 #define MASK_VTEM_MD2__RB 0x04
113 #define MASK_VTEM_MD2__NEXT_TFR 0xF8
114
115 //MD3
116 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF
117
118 enum ColorimetryRGBDP {
119 ColorimetryRGB_DP_sRGB = 0,
120 ColorimetryRGB_DP_AdobeRGB = 3,
121 ColorimetryRGB_DP_P3 = 4,
122 ColorimetryRGB_DP_CustomColorProfile = 5,
123 ColorimetryRGB_DP_ITU_R_BT2020RGB = 6,
124 };
125 enum ColorimetryYCCDP {
126 ColorimetryYCC_DP_ITU601 = 0,
127 ColorimetryYCC_DP_ITU709 = 1,
128 ColorimetryYCC_DP_AdobeYCC = 5,
129 ColorimetryYCC_DP_ITU2020YCC = 6,
130 ColorimetryYCC_DP_ITU2020YCbCr = 7,
131 };
132
mod_build_vsc_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet,enum dc_color_space cs)133 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
134 struct dc_info_packet *info_packet,
135 enum dc_color_space cs)
136 {
137 unsigned int vsc_packet_revision = vsc_packet_undefined;
138 unsigned int i;
139 unsigned int pixelEncoding = 0;
140 unsigned int colorimetryFormat = 0;
141 bool stereo3dSupport = false;
142
143 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
144 vsc_packet_revision = vsc_packet_rev1;
145 stereo3dSupport = true;
146 }
147
148 /*VSC packet set to 2 when DP revision >= 1.2*/
149 if (stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED)
150 vsc_packet_revision = vsc_packet_rev2;
151
152 /* Update to revision 5 for extended colorimetry support */
153 if (stream->use_vsc_sdp_for_colorimetry)
154 vsc_packet_revision = vsc_packet_rev5;
155
156 /* VSC packet not needed based on the features
157 * supported by this DP display
158 */
159 if (vsc_packet_revision == vsc_packet_undefined)
160 return;
161
162 if (vsc_packet_revision == vsc_packet_rev2) {
163 /* Secondary-data Packet ID = 0*/
164 info_packet->hb0 = 0x00;
165 /* 07h - Packet Type Value indicating Video
166 * Stream Configuration packet
167 */
168 info_packet->hb1 = 0x07;
169 /* 02h = VSC SDP supporting 3D stereo and PSR
170 * (applies to eDP v1.3 or higher).
171 */
172 info_packet->hb2 = 0x02;
173 /* 08h = VSC packet supporting 3D stereo + PSR
174 * (HB2 = 02h).
175 */
176 info_packet->hb3 = 0x08;
177
178 for (i = 0; i < 28; i++)
179 info_packet->sb[i] = 0;
180
181 info_packet->valid = true;
182 }
183
184 if (vsc_packet_revision == vsc_packet_rev1) {
185
186 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0
187 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet
188 info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only
189 info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h).
190
191 info_packet->valid = true;
192 }
193
194 if (stereo3dSupport) {
195 /* ==============================================================================================================|
196 * A. STEREO 3D
197 * ==============================================================================================================|
198 * VSC Payload (1 byte) From DP1.2 spec
199 *
200 * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter)
201 * -----------------------------------------------------------------------------------------------------
202 * 0 = Non Stereo Video | Must be set to 0x0
203 * -----------------------------------------------------------------------------------------------------
204 * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1
205 * | 0x1: Right when Stereo Signal = 1
206 * | 0x2: Left when Stereo Signal = 1
207 * | (others reserved)
208 * -----------------------------------------------------------------------------------------------------
209 * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom
210 * | (others reserved)
211 * -----------------------------------------------------------------------------------------------------
212 * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines
213 * | 0x1: horiz interleaved, right view pixels on odd lines
214 * | 0x2: checker board, start with left view pixel
215 * | 0x3: vertical interleaved, start with left view pixels
216 * | 0x4: vertical interleaved, start with right view pixels
217 * | (others reserved)
218 * -----------------------------------------------------------------------------------------------------
219 * 4 = Side-by-side | 0x0: left half represents left eye view
220 * | 0x1: left half represents right eye view
221 */
222 switch (stream->timing.timing_3d_format) {
223 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
224 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
225 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
226 case TIMING_3D_FORMAT_TB_SW_PACKED:
227 info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom.
228 break;
229 case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA:
230 case TIMING_3D_FORMAT_INBAND_FA:
231 info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1
232 break;
233 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
234 case TIMING_3D_FORMAT_SBS_SW_PACKED:
235 info_packet->sb[0] = 0x04; // Side-by-side
236 break;
237 default:
238 info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0.
239 break;
240 }
241
242 }
243
244 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication.
245 * Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry
246 * format to the DP Sink device with VSC SDP only when the DP Sink device supports it
247 * (i.e., VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST
248 * register (DPCD Address 02210h, bit 3) is set to 1).
249 * (Requires VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit set to 1 in DPCD 02210h. This
250 * DPCD register is exposed in the new Extended Receiver Capability field for DPCD Rev. 1.4
251 * (and higher). When MISC1. bit 6. is Set to 1, a Source device uses a VSC SDP to indicate
252 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and
253 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").)
254 */
255 if (vsc_packet_revision == vsc_packet_rev5) {
256 /* Secondary-data Packet ID = 0 */
257 info_packet->hb0 = 0x00;
258 /* 07h - Packet Type Value indicating Video Stream Configuration packet */
259 info_packet->hb1 = 0x07;
260 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. */
261 info_packet->hb2 = 0x05;
262 /* 13h = VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/Colorimetry Format indication (HB2 = 05h). */
263 info_packet->hb3 = 0x13;
264
265 info_packet->valid = true;
266
267 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs
268 * Data Bytes DB 18~16
269 * Bits 3:0 (Colorimetry Format) | Bits 7:4 (Pixel Encoding)
270 * ----------------------------------------------------------------------------------------------------
271 * 0x0 = sRGB | 0 = RGB
272 * 0x1 = RGB Wide Gamut Fixed Point
273 * 0x2 = RGB Wide Gamut Floating Point
274 * 0x3 = AdobeRGB
275 * 0x4 = DCI-P3
276 * 0x5 = CustomColorProfile
277 * (others reserved)
278 * ----------------------------------------------------------------------------------------------------
279 * 0x0 = ITU-R BT.601 | 1 = YCbCr444
280 * 0x1 = ITU-R BT.709
281 * 0x2 = xvYCC601
282 * 0x3 = xvYCC709
283 * 0x4 = sYCC601
284 * 0x5 = AdobeYCC601
285 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
286 * 0x7 = ITU-R BT.2020 Y'C'bC'r
287 * (others reserved)
288 * ----------------------------------------------------------------------------------------------------
289 * 0x0 = ITU-R BT.601 | 2 = YCbCr422
290 * 0x1 = ITU-R BT.709
291 * 0x2 = xvYCC601
292 * 0x3 = xvYCC709
293 * 0x4 = sYCC601
294 * 0x5 = AdobeYCC601
295 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
296 * 0x7 = ITU-R BT.2020 Y'C'bC'r
297 * (others reserved)
298 * ----------------------------------------------------------------------------------------------------
299 * 0x0 = ITU-R BT.601 | 3 = YCbCr420
300 * 0x1 = ITU-R BT.709
301 * 0x2 = xvYCC601
302 * 0x3 = xvYCC709
303 * 0x4 = sYCC601
304 * 0x5 = AdobeYCC601
305 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
306 * 0x7 = ITU-R BT.2020 Y'C'bC'r
307 * (others reserved)
308 * ----------------------------------------------------------------------------------------------------
309 * 0x0 =DICOM Part14 Grayscale | 4 = Yonly
310 * Display Function
311 * (others reserved)
312 */
313
314 /* Set Pixel Encoding */
315 switch (stream->timing.pixel_encoding) {
316 case PIXEL_ENCODING_RGB:
317 pixelEncoding = 0x0; /* RGB = 0h */
318 break;
319 case PIXEL_ENCODING_YCBCR444:
320 pixelEncoding = 0x1; /* YCbCr444 = 1h */
321 break;
322 case PIXEL_ENCODING_YCBCR422:
323 pixelEncoding = 0x2; /* YCbCr422 = 2h */
324 break;
325 case PIXEL_ENCODING_YCBCR420:
326 pixelEncoding = 0x3; /* YCbCr420 = 3h */
327 break;
328 default:
329 pixelEncoding = 0x0; /* default RGB = 0h */
330 break;
331 }
332
333 /* Set Colorimetry format based on pixel encoding */
334 switch (stream->timing.pixel_encoding) {
335 case PIXEL_ENCODING_RGB:
336 if ((cs == COLOR_SPACE_SRGB) ||
337 (cs == COLOR_SPACE_SRGB_LIMITED))
338 colorimetryFormat = ColorimetryRGB_DP_sRGB;
339 else if (cs == COLOR_SPACE_ADOBERGB)
340 colorimetryFormat = ColorimetryRGB_DP_AdobeRGB;
341 else if ((cs == COLOR_SPACE_2020_RGB_FULLRANGE) ||
342 (cs == COLOR_SPACE_2020_RGB_LIMITEDRANGE))
343 colorimetryFormat = ColorimetryRGB_DP_ITU_R_BT2020RGB;
344 break;
345
346 case PIXEL_ENCODING_YCBCR444:
347 case PIXEL_ENCODING_YCBCR422:
348 case PIXEL_ENCODING_YCBCR420:
349 /* Note: xvYCC probably not supported correctly here on DP since colorspace translation
350 * loses distinction between BT601 vs xvYCC601 in translation
351 */
352 if (cs == COLOR_SPACE_YCBCR601)
353 colorimetryFormat = ColorimetryYCC_DP_ITU601;
354 else if (cs == COLOR_SPACE_YCBCR709)
355 colorimetryFormat = ColorimetryYCC_DP_ITU709;
356 else if (cs == COLOR_SPACE_ADOBERGB)
357 colorimetryFormat = ColorimetryYCC_DP_AdobeYCC;
358 else if (cs == COLOR_SPACE_2020_YCBCR)
359 colorimetryFormat = ColorimetryYCC_DP_ITU2020YCbCr;
360 break;
361
362 default:
363 colorimetryFormat = ColorimetryRGB_DP_sRGB;
364 break;
365 }
366
367 info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat;
368
369 /* Set color depth */
370 switch (stream->timing.display_color_depth) {
371 case COLOR_DEPTH_666:
372 /* NOTE: This is actually not valid for YCbCr pixel encoding to have 6 bpc
373 * as of DP1.4 spec, but value of 0 probably reserved here for potential future use.
374 */
375 info_packet->sb[17] = 0;
376 break;
377 case COLOR_DEPTH_888:
378 info_packet->sb[17] = 1;
379 break;
380 case COLOR_DEPTH_101010:
381 info_packet->sb[17] = 2;
382 break;
383 case COLOR_DEPTH_121212:
384 info_packet->sb[17] = 3;
385 break;
386 /*case COLOR_DEPTH_141414: -- NO SUCH FORMAT IN DP SPEC */
387 case COLOR_DEPTH_161616:
388 info_packet->sb[17] = 4;
389 break;
390 default:
391 info_packet->sb[17] = 0;
392 break;
393 }
394
395 /* all YCbCr are always limited range */
396 if ((cs == COLOR_SPACE_SRGB_LIMITED) ||
397 (cs == COLOR_SPACE_2020_RGB_LIMITEDRANGE) ||
398 (pixelEncoding != 0x0)) {
399 info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */
400 }
401
402 /* Content Type (Bits 2:0)
403 * 0 = Not defined.
404 * 1 = Graphics.
405 * 2 = Photo.
406 * 3 = Video.
407 * 4 = Game.
408 */
409 info_packet->sb[18] = 0;
410 }
411 }
412
413 /**
414 * mod_build_hf_vsif_infopacket - Prepare HDMI Vendor Specific info frame.
415 * Follows HDMI Spec to build up Vendor Specific info frame
416 *
417 * @stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.)
418 * @info_packet: output structure where to store VSIF
419 */
mod_build_hf_vsif_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet)420 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
421 struct dc_info_packet *info_packet)
422 {
423 unsigned int length = 5;
424 bool hdmi_vic_mode = false;
425 uint8_t checksum = 0;
426 uint32_t i = 0;
427 enum dc_timing_3d_format format;
428
429 info_packet->valid = false;
430 format = stream->timing.timing_3d_format;
431 if (stream->view_format == VIEW_3D_FORMAT_NONE)
432 format = TIMING_3D_FORMAT_NONE;
433
434 if (stream->timing.hdmi_vic != 0
435 && stream->timing.h_total >= 3840
436 && stream->timing.v_total >= 2160
437 && format == TIMING_3D_FORMAT_NONE)
438 hdmi_vic_mode = true;
439
440 if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode)
441 return;
442
443 info_packet->sb[1] = 0x03;
444 info_packet->sb[2] = 0x0C;
445 info_packet->sb[3] = 0x00;
446
447 if (format != TIMING_3D_FORMAT_NONE)
448 info_packet->sb[4] = (2 << 5);
449
450 else if (hdmi_vic_mode)
451 info_packet->sb[4] = (1 << 5);
452
453 switch (format) {
454 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
455 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
456 info_packet->sb[5] = (0x0 << 4);
457 break;
458
459 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
460 case TIMING_3D_FORMAT_SBS_SW_PACKED:
461 info_packet->sb[5] = (0x8 << 4);
462 length = 6;
463 break;
464
465 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
466 case TIMING_3D_FORMAT_TB_SW_PACKED:
467 info_packet->sb[5] = (0x6 << 4);
468 break;
469
470 default:
471 break;
472 }
473
474 if (hdmi_vic_mode)
475 info_packet->sb[5] = stream->timing.hdmi_vic;
476
477 info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR;
478 info_packet->hb1 = 0x01;
479 info_packet->hb2 = (uint8_t) (length);
480
481 checksum += info_packet->hb0;
482 checksum += info_packet->hb1;
483 checksum += info_packet->hb2;
484
485 for (i = 1; i <= length; i++)
486 checksum += info_packet->sb[i];
487
488 info_packet->sb[0] = (uint8_t) (0x100 - checksum);
489
490 info_packet->valid = true;
491 }
492
493