1 // SPDX-License-Identifier: GPL-2.0
2
3 /*
4 * Memory Mapped IO Fixed clock driver
5 *
6 * Copyright (C) 2018 Cadence Design Systems, Inc.
7 *
8 * Authors:
9 * Jan Kotas <jank@cadence.com>
10 */
11
12 #include <linux/clk-provider.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/platform_device.h>
17
fixed_mmio_clk_setup(struct device_node * node)18 static struct clk_hw *fixed_mmio_clk_setup(struct device_node *node)
19 {
20 struct clk_hw *clk;
21 const char *clk_name = node->name;
22 void __iomem *base;
23 u32 freq;
24 int ret;
25
26 base = of_iomap(node, 0);
27 if (!base) {
28 pr_err("%pOFn: failed to map address\n", node);
29 return ERR_PTR(-EIO);
30 }
31
32 freq = readl(base);
33 iounmap(base);
34 of_property_read_string(node, "clock-output-names", &clk_name);
35
36 clk = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0, freq);
37 if (IS_ERR(clk)) {
38 pr_err("%pOFn: failed to register fixed rate clock\n", node);
39 return clk;
40 }
41
42 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, clk);
43 if (ret) {
44 pr_err("%pOFn: failed to add clock provider\n", node);
45 clk_hw_unregister(clk);
46 clk = ERR_PTR(ret);
47 }
48
49 return clk;
50 }
51
of_fixed_mmio_clk_setup(struct device_node * node)52 static void __init of_fixed_mmio_clk_setup(struct device_node *node)
53 {
54 fixed_mmio_clk_setup(node);
55 }
56 CLK_OF_DECLARE(fixed_mmio_clk, "fixed-mmio-clock", of_fixed_mmio_clk_setup);
57
58 /*
59 * This is not executed when of_fixed_mmio_clk_setup succeeded.
60 */
of_fixed_mmio_clk_probe(struct platform_device * pdev)61 static int of_fixed_mmio_clk_probe(struct platform_device *pdev)
62 {
63 struct clk_hw *clk;
64
65 clk = fixed_mmio_clk_setup(pdev->dev.of_node);
66 if (IS_ERR(clk))
67 return PTR_ERR(clk);
68
69 platform_set_drvdata(pdev, clk);
70
71 return 0;
72 }
73
of_fixed_mmio_clk_remove(struct platform_device * pdev)74 static int of_fixed_mmio_clk_remove(struct platform_device *pdev)
75 {
76 struct clk_hw *clk = platform_get_drvdata(pdev);
77
78 of_clk_del_provider(pdev->dev.of_node);
79 clk_hw_unregister_fixed_rate(clk);
80
81 return 0;
82 }
83
84 static const struct of_device_id of_fixed_mmio_clk_ids[] = {
85 { .compatible = "fixed-mmio-clock" },
86 { }
87 };
88 MODULE_DEVICE_TABLE(of, of_fixed_mmio_clk_ids);
89
90 static struct platform_driver of_fixed_mmio_clk_driver = {
91 .driver = {
92 .name = "of_fixed_mmio_clk",
93 .of_match_table = of_fixed_mmio_clk_ids,
94 },
95 .probe = of_fixed_mmio_clk_probe,
96 .remove = of_fixed_mmio_clk_remove,
97 };
98 module_platform_driver(of_fixed_mmio_clk_driver);
99
100 MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
101 MODULE_DESCRIPTION("Memory Mapped IO Fixed clock driver");
102 MODULE_LICENSE("GPL v2");
103