1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MICROCODE_INTEL_H
3 #define _ASM_X86_MICROCODE_INTEL_H
4 
5 #include <asm/microcode.h>
6 
7 struct microcode_header_intel {
8 	unsigned int            hdrver;
9 	unsigned int            rev;
10 	unsigned int            date;
11 	unsigned int            sig;
12 	unsigned int            cksum;
13 	unsigned int            ldrver;
14 	unsigned int            pf;
15 	unsigned int            datasize;
16 	unsigned int            totalsize;
17 	unsigned int            reserved[3];
18 };
19 
20 struct microcode_intel {
21 	struct microcode_header_intel hdr;
22 	unsigned int            bits[];
23 };
24 
25 /* microcode format is extended from prescott processors */
26 struct extended_signature {
27 	unsigned int            sig;
28 	unsigned int            pf;
29 	unsigned int            cksum;
30 };
31 
32 struct extended_sigtable {
33 	unsigned int            count;
34 	unsigned int            cksum;
35 	unsigned int            reserved[3];
36 	struct extended_signature sigs[];
37 };
38 
39 #define DEFAULT_UCODE_DATASIZE	(2000)
40 #define MC_HEADER_SIZE		(sizeof(struct microcode_header_intel))
41 #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
42 #define EXT_HEADER_SIZE		(sizeof(struct extended_sigtable))
43 #define EXT_SIGNATURE_SIZE	(sizeof(struct extended_signature))
44 
45 #define get_totalsize(mc) \
46 	(((struct microcode_intel *)mc)->hdr.datasize ? \
47 	 ((struct microcode_intel *)mc)->hdr.totalsize : \
48 	 DEFAULT_UCODE_TOTALSIZE)
49 
50 #define get_datasize(mc) \
51 	(((struct microcode_intel *)mc)->hdr.datasize ? \
52 	 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
53 
54 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
55 
intel_get_microcode_revision(void)56 static inline u32 intel_get_microcode_revision(void)
57 {
58 	u32 rev, dummy;
59 
60 	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
61 
62 	/* As documented in the SDM: Do a CPUID 1 here */
63 	native_cpuid_eax(1);
64 
65 	/* get the current revision from MSR 0x8B */
66 	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
67 
68 	return rev;
69 }
70 
71 #ifdef CONFIG_MICROCODE_INTEL
72 extern void __init load_ucode_intel_bsp(void);
73 extern void load_ucode_intel_ap(void);
74 extern void show_ucode_info_early(void);
75 extern int __init save_microcode_in_initrd_intel(void);
76 void reload_ucode_intel(void);
77 #else
load_ucode_intel_bsp(void)78 static inline __init void load_ucode_intel_bsp(void) {}
load_ucode_intel_ap(void)79 static inline void load_ucode_intel_ap(void) {}
show_ucode_info_early(void)80 static inline void show_ucode_info_early(void) {}
save_microcode_in_initrd_intel(void)81 static inline int __init save_microcode_in_initrd_intel(void) { return -EINVAL; }
reload_ucode_intel(void)82 static inline void reload_ucode_intel(void) {}
83 #endif
84 
85 #endif /* _ASM_X86_MICROCODE_INTEL_H */
86