1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * X86 specific ACPICA environments and implementation
4  *
5  * Copyright (C) 2014, Intel Corporation
6  *   Author: Lv Zheng <lv.zheng@intel.com>
7  */
8 
9 #ifndef _ASM_X86_ACENV_H
10 #define _ASM_X86_ACENV_H
11 
12 #include <asm/special_insns.h>
13 
14 /* Asm macros */
15 
16 /*
17  * ACPI_FLUSH_CPU_CACHE() flushes caches on entering sleep states.
18  * It is required to prevent data loss.
19  *
20  * While running inside virtual machine, the kernel can bypass cache flushing.
21  * Changing sleep state in a virtual machine doesn't affect the host system
22  * sleep state and cannot lead to data loss.
23  */
24 #define ACPI_FLUSH_CPU_CACHE()					\
25 do {								\
26 	if (!cpu_feature_enabled(X86_FEATURE_HYPERVISOR))	\
27 		wbinvd();					\
28 } while (0)
29 
30 int __acpi_acquire_global_lock(unsigned int *lock);
31 int __acpi_release_global_lock(unsigned int *lock);
32 
33 #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
34 	((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
35 
36 #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
37 	((Acq) = __acpi_release_global_lock(&facs->global_lock))
38 
39 /*
40  * Math helper asm macros
41  */
42 #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
43 	asm("divl %2;"				     \
44 	    : "=a"(q32), "=d"(r32)		     \
45 	    : "r"(d32),				     \
46 	     "0"(n_lo), "1"(n_hi))
47 
48 #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
49 	asm("shrl   $1,%2	;"	\
50 	    "rcrl   $1,%3;"		\
51 	    : "=r"(n_hi), "=r"(n_lo)	\
52 	    : "0"(n_hi), "1"(n_lo))
53 
54 #endif /* _ASM_X86_ACENV_H */
55