1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Regents of the University of California
4 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
5 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
7 */
8
9 #include <linux/init.h>
10 #include <linux/mm.h>
11 #include <linux/memblock.h>
12 #include <linux/initrd.h>
13 #include <linux/swap.h>
14 #include <linux/swiotlb.h>
15 #include <linux/sizes.h>
16 #include <linux/of_fdt.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/libfdt.h>
19 #include <linux/set_memory.h>
20 #include <linux/dma-map-ops.h>
21 #include <linux/crash_dump.h>
22 #include <linux/hugetlb.h>
23
24 #include <asm/fixmap.h>
25 #include <asm/tlbflush.h>
26 #include <asm/sections.h>
27 #include <asm/soc.h>
28 #include <asm/io.h>
29 #include <asm/ptdump.h>
30 #include <asm/numa.h>
31
32 #include "../kernel/head.h"
33
34 struct kernel_mapping kernel_map __ro_after_init;
35 EXPORT_SYMBOL(kernel_map);
36 #ifdef CONFIG_XIP_KERNEL
37 #define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38 #endif
39
40 #ifdef CONFIG_64BIT
41 u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
42 #else
43 u64 satp_mode __ro_after_init = SATP_MODE_32;
44 #endif
45 EXPORT_SYMBOL(satp_mode);
46
47 bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
48 bool pgtable_l5_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
49 EXPORT_SYMBOL(pgtable_l4_enabled);
50 EXPORT_SYMBOL(pgtable_l5_enabled);
51
52 phys_addr_t phys_ram_base __ro_after_init;
53 EXPORT_SYMBOL(phys_ram_base);
54
55 unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
56 __page_aligned_bss;
57 EXPORT_SYMBOL(empty_zero_page);
58
59 extern char _start[];
60 #define DTB_EARLY_BASE_VA PGDIR_SIZE
61 void *_dtb_early_va __initdata;
62 uintptr_t _dtb_early_pa __initdata;
63
64 static phys_addr_t dma32_phys_limit __initdata;
65
zone_sizes_init(void)66 static void __init zone_sizes_init(void)
67 {
68 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
69
70 #ifdef CONFIG_ZONE_DMA32
71 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
72 #endif
73 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
74
75 free_area_init(max_zone_pfns);
76 }
77
78 #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
79
80 #define LOG2_SZ_1K ilog2(SZ_1K)
81 #define LOG2_SZ_1M ilog2(SZ_1M)
82 #define LOG2_SZ_1G ilog2(SZ_1G)
83 #define LOG2_SZ_1T ilog2(SZ_1T)
84
print_mlk(char * name,unsigned long b,unsigned long t)85 static inline void print_mlk(char *name, unsigned long b, unsigned long t)
86 {
87 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
88 (((t) - (b)) >> LOG2_SZ_1K));
89 }
90
print_mlm(char * name,unsigned long b,unsigned long t)91 static inline void print_mlm(char *name, unsigned long b, unsigned long t)
92 {
93 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
94 (((t) - (b)) >> LOG2_SZ_1M));
95 }
96
print_mlg(char * name,unsigned long b,unsigned long t)97 static inline void print_mlg(char *name, unsigned long b, unsigned long t)
98 {
99 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld GB)\n", name, b, t,
100 (((t) - (b)) >> LOG2_SZ_1G));
101 }
102
103 #ifdef CONFIG_64BIT
print_mlt(char * name,unsigned long b,unsigned long t)104 static inline void print_mlt(char *name, unsigned long b, unsigned long t)
105 {
106 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld TB)\n", name, b, t,
107 (((t) - (b)) >> LOG2_SZ_1T));
108 }
109 #else
110 #define print_mlt(n, b, t) do {} while (0)
111 #endif
112
print_ml(char * name,unsigned long b,unsigned long t)113 static inline void print_ml(char *name, unsigned long b, unsigned long t)
114 {
115 unsigned long diff = t - b;
116
117 if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10)
118 print_mlt(name, b, t);
119 else if ((diff >> LOG2_SZ_1G) >= 10)
120 print_mlg(name, b, t);
121 else if ((diff >> LOG2_SZ_1M) >= 10)
122 print_mlm(name, b, t);
123 else
124 print_mlk(name, b, t);
125 }
126
print_vm_layout(void)127 static void __init print_vm_layout(void)
128 {
129 pr_notice("Virtual kernel memory layout:\n");
130 print_ml("fixmap", (unsigned long)FIXADDR_START,
131 (unsigned long)FIXADDR_TOP);
132 print_ml("pci io", (unsigned long)PCI_IO_START,
133 (unsigned long)PCI_IO_END);
134 print_ml("vmemmap", (unsigned long)VMEMMAP_START,
135 (unsigned long)VMEMMAP_END);
136 print_ml("vmalloc", (unsigned long)VMALLOC_START,
137 (unsigned long)VMALLOC_END);
138 #ifdef CONFIG_64BIT
139 print_ml("modules", (unsigned long)MODULES_VADDR,
140 (unsigned long)MODULES_END);
141 #endif
142 print_ml("lowmem", (unsigned long)PAGE_OFFSET,
143 (unsigned long)high_memory);
144 if (IS_ENABLED(CONFIG_64BIT)) {
145 #ifdef CONFIG_KASAN
146 print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
147 #endif
148
149 print_ml("kernel", (unsigned long)KERNEL_LINK_ADDR,
150 (unsigned long)ADDRESS_SPACE_END);
151 }
152 }
153 #else
print_vm_layout(void)154 static void print_vm_layout(void) { }
155 #endif /* CONFIG_DEBUG_VM */
156
mem_init(void)157 void __init mem_init(void)
158 {
159 #ifdef CONFIG_FLATMEM
160 BUG_ON(!mem_map);
161 #endif /* CONFIG_FLATMEM */
162
163 swiotlb_init(max_pfn > PFN_DOWN(dma32_phys_limit), SWIOTLB_VERBOSE);
164 memblock_free_all();
165
166 print_vm_layout();
167 }
168
169 /* Limit the memory size via mem. */
170 static phys_addr_t memory_limit;
171
early_mem(char * p)172 static int __init early_mem(char *p)
173 {
174 u64 size;
175
176 if (!p)
177 return 1;
178
179 size = memparse(p, &p) & PAGE_MASK;
180 memory_limit = min_t(u64, size, memory_limit);
181
182 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
183
184 return 0;
185 }
186 early_param("mem", early_mem);
187
setup_bootmem(void)188 static void __init setup_bootmem(void)
189 {
190 phys_addr_t vmlinux_end = __pa_symbol(&_end);
191 phys_addr_t max_mapped_addr;
192 phys_addr_t phys_ram_end, vmlinux_start;
193
194 if (IS_ENABLED(CONFIG_XIP_KERNEL))
195 vmlinux_start = __pa_symbol(&_sdata);
196 else
197 vmlinux_start = __pa_symbol(&_start);
198
199 memblock_enforce_memory_limit(memory_limit);
200
201 /*
202 * Make sure we align the reservation on PMD_SIZE since we will
203 * map the kernel in the linear mapping as read-only: we do not want
204 * any allocation to happen between _end and the next pmd aligned page.
205 */
206 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
207 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
208 /*
209 * Reserve from the start of the kernel to the end of the kernel
210 */
211 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
212
213 phys_ram_end = memblock_end_of_DRAM();
214 if (!IS_ENABLED(CONFIG_XIP_KERNEL))
215 phys_ram_base = memblock_start_of_DRAM();
216 /*
217 * memblock allocator is not aware of the fact that last 4K bytes of
218 * the addressable memory can not be mapped because of IS_ERR_VALUE
219 * macro. Make sure that last 4k bytes are not usable by memblock
220 * if end of dram is equal to maximum addressable memory. For 64-bit
221 * kernel, this problem can't happen here as the end of the virtual
222 * address space is occupied by the kernel mapping then this check must
223 * be done as soon as the kernel mapping base address is determined.
224 */
225 if (!IS_ENABLED(CONFIG_64BIT)) {
226 max_mapped_addr = __pa(~(ulong)0);
227 if (max_mapped_addr == (phys_ram_end - 1))
228 memblock_set_current_limit(max_mapped_addr - 4096);
229 }
230
231 min_low_pfn = PFN_UP(phys_ram_base);
232 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
233 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
234
235 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
236 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
237
238 reserve_initrd_mem();
239 /*
240 * If DTB is built in, no need to reserve its memblock.
241 * Otherwise, do reserve it but avoid using
242 * early_init_fdt_reserve_self() since __pa() does
243 * not work for DTB pointers that are fixmap addresses
244 */
245 if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
246 /*
247 * In case the DTB is not located in a memory region we won't
248 * be able to locate it later on via the linear mapping and
249 * get a segfault when accessing it via __va(dtb_early_pa).
250 * To avoid this situation copy DTB to a memory region.
251 * Note that memblock_phys_alloc will also reserve DTB region.
252 */
253 if (!memblock_is_memory(dtb_early_pa)) {
254 size_t fdt_size = fdt_totalsize(dtb_early_va);
255 phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
256 void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
257
258 memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
259 early_memunmap(new_dtb_early_va, fdt_size);
260 _dtb_early_pa = new_dtb_early_pa;
261 } else
262 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
263 }
264
265 early_init_fdt_scan_reserved_mem();
266 dma_contiguous_reserve(dma32_phys_limit);
267 if (IS_ENABLED(CONFIG_64BIT))
268 hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
269 memblock_allow_resize();
270 }
271
272 #ifdef CONFIG_MMU
273 struct pt_alloc_ops pt_ops __initdata;
274
275 unsigned long riscv_pfn_base __ro_after_init;
276 EXPORT_SYMBOL(riscv_pfn_base);
277
278 pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
279 pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
280 static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
281
282 pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
283 static p4d_t __maybe_unused early_dtb_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
284 static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
285 static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
286
287 #ifdef CONFIG_XIP_KERNEL
288 #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
289 #define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base))
290 #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
291 #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
292 #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
293 #endif /* CONFIG_XIP_KERNEL */
294
__set_fixmap(enum fixed_addresses idx,phys_addr_t phys,pgprot_t prot)295 void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
296 {
297 unsigned long addr = __fix_to_virt(idx);
298 pte_t *ptep;
299
300 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
301
302 ptep = &fixmap_pte[pte_index(addr)];
303
304 if (pgprot_val(prot))
305 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
306 else
307 pte_clear(&init_mm, addr, ptep);
308 local_flush_tlb_page(addr);
309 }
310
get_pte_virt_early(phys_addr_t pa)311 static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
312 {
313 return (pte_t *)((uintptr_t)pa);
314 }
315
get_pte_virt_fixmap(phys_addr_t pa)316 static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
317 {
318 clear_fixmap(FIX_PTE);
319 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
320 }
321
get_pte_virt_late(phys_addr_t pa)322 static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
323 {
324 return (pte_t *) __va(pa);
325 }
326
alloc_pte_early(uintptr_t va)327 static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
328 {
329 /*
330 * We only create PMD or PGD early mappings so we
331 * should never reach here with MMU disabled.
332 */
333 BUG();
334 }
335
alloc_pte_fixmap(uintptr_t va)336 static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
337 {
338 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
339 }
340
alloc_pte_late(uintptr_t va)341 static phys_addr_t __init alloc_pte_late(uintptr_t va)
342 {
343 unsigned long vaddr;
344
345 vaddr = __get_free_page(GFP_KERNEL);
346 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
347
348 return __pa(vaddr);
349 }
350
create_pte_mapping(pte_t * ptep,uintptr_t va,phys_addr_t pa,phys_addr_t sz,pgprot_t prot)351 static void __init create_pte_mapping(pte_t *ptep,
352 uintptr_t va, phys_addr_t pa,
353 phys_addr_t sz, pgprot_t prot)
354 {
355 uintptr_t pte_idx = pte_index(va);
356
357 BUG_ON(sz != PAGE_SIZE);
358
359 if (pte_none(ptep[pte_idx]))
360 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
361 }
362
363 #ifndef __PAGETABLE_PMD_FOLDED
364
365 static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
366 static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
367 static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
368
369 #ifdef CONFIG_XIP_KERNEL
370 #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
371 #define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
372 #define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
373 #endif /* CONFIG_XIP_KERNEL */
374
375 static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss;
376 static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss;
377 static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
378
379 #ifdef CONFIG_XIP_KERNEL
380 #define trampoline_p4d ((p4d_t *)XIP_FIXUP(trampoline_p4d))
381 #define fixmap_p4d ((p4d_t *)XIP_FIXUP(fixmap_p4d))
382 #define early_p4d ((p4d_t *)XIP_FIXUP(early_p4d))
383 #endif /* CONFIG_XIP_KERNEL */
384
385 static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
386 static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
387 static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
388
389 #ifdef CONFIG_XIP_KERNEL
390 #define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
391 #define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
392 #define early_pud ((pud_t *)XIP_FIXUP(early_pud))
393 #endif /* CONFIG_XIP_KERNEL */
394
get_pmd_virt_early(phys_addr_t pa)395 static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
396 {
397 /* Before MMU is enabled */
398 return (pmd_t *)((uintptr_t)pa);
399 }
400
get_pmd_virt_fixmap(phys_addr_t pa)401 static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
402 {
403 clear_fixmap(FIX_PMD);
404 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
405 }
406
get_pmd_virt_late(phys_addr_t pa)407 static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
408 {
409 return (pmd_t *) __va(pa);
410 }
411
alloc_pmd_early(uintptr_t va)412 static phys_addr_t __init alloc_pmd_early(uintptr_t va)
413 {
414 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
415
416 return (uintptr_t)early_pmd;
417 }
418
alloc_pmd_fixmap(uintptr_t va)419 static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
420 {
421 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
422 }
423
alloc_pmd_late(uintptr_t va)424 static phys_addr_t __init alloc_pmd_late(uintptr_t va)
425 {
426 unsigned long vaddr;
427
428 vaddr = __get_free_page(GFP_KERNEL);
429 BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
430
431 return __pa(vaddr);
432 }
433
create_pmd_mapping(pmd_t * pmdp,uintptr_t va,phys_addr_t pa,phys_addr_t sz,pgprot_t prot)434 static void __init create_pmd_mapping(pmd_t *pmdp,
435 uintptr_t va, phys_addr_t pa,
436 phys_addr_t sz, pgprot_t prot)
437 {
438 pte_t *ptep;
439 phys_addr_t pte_phys;
440 uintptr_t pmd_idx = pmd_index(va);
441
442 if (sz == PMD_SIZE) {
443 if (pmd_none(pmdp[pmd_idx]))
444 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
445 return;
446 }
447
448 if (pmd_none(pmdp[pmd_idx])) {
449 pte_phys = pt_ops.alloc_pte(va);
450 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
451 ptep = pt_ops.get_pte_virt(pte_phys);
452 memset(ptep, 0, PAGE_SIZE);
453 } else {
454 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
455 ptep = pt_ops.get_pte_virt(pte_phys);
456 }
457
458 create_pte_mapping(ptep, va, pa, sz, prot);
459 }
460
get_pud_virt_early(phys_addr_t pa)461 static pud_t *__init get_pud_virt_early(phys_addr_t pa)
462 {
463 return (pud_t *)((uintptr_t)pa);
464 }
465
get_pud_virt_fixmap(phys_addr_t pa)466 static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
467 {
468 clear_fixmap(FIX_PUD);
469 return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
470 }
471
get_pud_virt_late(phys_addr_t pa)472 static pud_t *__init get_pud_virt_late(phys_addr_t pa)
473 {
474 return (pud_t *)__va(pa);
475 }
476
alloc_pud_early(uintptr_t va)477 static phys_addr_t __init alloc_pud_early(uintptr_t va)
478 {
479 /* Only one PUD is available for early mapping */
480 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
481
482 return (uintptr_t)early_pud;
483 }
484
alloc_pud_fixmap(uintptr_t va)485 static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
486 {
487 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
488 }
489
alloc_pud_late(uintptr_t va)490 static phys_addr_t alloc_pud_late(uintptr_t va)
491 {
492 unsigned long vaddr;
493
494 vaddr = __get_free_page(GFP_KERNEL);
495 BUG_ON(!vaddr);
496 return __pa(vaddr);
497 }
498
get_p4d_virt_early(phys_addr_t pa)499 static p4d_t *__init get_p4d_virt_early(phys_addr_t pa)
500 {
501 return (p4d_t *)((uintptr_t)pa);
502 }
503
get_p4d_virt_fixmap(phys_addr_t pa)504 static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa)
505 {
506 clear_fixmap(FIX_P4D);
507 return (p4d_t *)set_fixmap_offset(FIX_P4D, pa);
508 }
509
get_p4d_virt_late(phys_addr_t pa)510 static p4d_t *__init get_p4d_virt_late(phys_addr_t pa)
511 {
512 return (p4d_t *)__va(pa);
513 }
514
alloc_p4d_early(uintptr_t va)515 static phys_addr_t __init alloc_p4d_early(uintptr_t va)
516 {
517 /* Only one P4D is available for early mapping */
518 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
519
520 return (uintptr_t)early_p4d;
521 }
522
alloc_p4d_fixmap(uintptr_t va)523 static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va)
524 {
525 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
526 }
527
alloc_p4d_late(uintptr_t va)528 static phys_addr_t alloc_p4d_late(uintptr_t va)
529 {
530 unsigned long vaddr;
531
532 vaddr = __get_free_page(GFP_KERNEL);
533 BUG_ON(!vaddr);
534 return __pa(vaddr);
535 }
536
create_pud_mapping(pud_t * pudp,uintptr_t va,phys_addr_t pa,phys_addr_t sz,pgprot_t prot)537 static void __init create_pud_mapping(pud_t *pudp,
538 uintptr_t va, phys_addr_t pa,
539 phys_addr_t sz, pgprot_t prot)
540 {
541 pmd_t *nextp;
542 phys_addr_t next_phys;
543 uintptr_t pud_index = pud_index(va);
544
545 if (sz == PUD_SIZE) {
546 if (pud_val(pudp[pud_index]) == 0)
547 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
548 return;
549 }
550
551 if (pud_val(pudp[pud_index]) == 0) {
552 next_phys = pt_ops.alloc_pmd(va);
553 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
554 nextp = pt_ops.get_pmd_virt(next_phys);
555 memset(nextp, 0, PAGE_SIZE);
556 } else {
557 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
558 nextp = pt_ops.get_pmd_virt(next_phys);
559 }
560
561 create_pmd_mapping(nextp, va, pa, sz, prot);
562 }
563
create_p4d_mapping(p4d_t * p4dp,uintptr_t va,phys_addr_t pa,phys_addr_t sz,pgprot_t prot)564 static void __init create_p4d_mapping(p4d_t *p4dp,
565 uintptr_t va, phys_addr_t pa,
566 phys_addr_t sz, pgprot_t prot)
567 {
568 pud_t *nextp;
569 phys_addr_t next_phys;
570 uintptr_t p4d_index = p4d_index(va);
571
572 if (sz == P4D_SIZE) {
573 if (p4d_val(p4dp[p4d_index]) == 0)
574 p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot);
575 return;
576 }
577
578 if (p4d_val(p4dp[p4d_index]) == 0) {
579 next_phys = pt_ops.alloc_pud(va);
580 p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE);
581 nextp = pt_ops.get_pud_virt(next_phys);
582 memset(nextp, 0, PAGE_SIZE);
583 } else {
584 next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index]));
585 nextp = pt_ops.get_pud_virt(next_phys);
586 }
587
588 create_pud_mapping(nextp, va, pa, sz, prot);
589 }
590
591 #define pgd_next_t p4d_t
592 #define alloc_pgd_next(__va) (pgtable_l5_enabled ? \
593 pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled ? \
594 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va)))
595 #define get_pgd_next_virt(__pa) (pgtable_l5_enabled ? \
596 pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled ? \
597 pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa)))
598 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
599 (pgtable_l5_enabled ? \
600 create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \
601 (pgtable_l4_enabled ? \
602 create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) : \
603 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot)))
604 #define fixmap_pgd_next (pgtable_l5_enabled ? \
605 (uintptr_t)fixmap_p4d : (pgtable_l4_enabled ? \
606 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd))
607 #define trampoline_pgd_next (pgtable_l5_enabled ? \
608 (uintptr_t)trampoline_p4d : (pgtable_l4_enabled ? \
609 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
610 #define early_dtb_pgd_next (pgtable_l5_enabled ? \
611 (uintptr_t)early_dtb_p4d : (pgtable_l4_enabled ? \
612 (uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd))
613 #else
614 #define pgd_next_t pte_t
615 #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
616 #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
617 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
618 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
619 #define fixmap_pgd_next ((uintptr_t)fixmap_pte)
620 #define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
621 #define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
622 #define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
623 #define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
624 #endif /* __PAGETABLE_PMD_FOLDED */
625
create_pgd_mapping(pgd_t * pgdp,uintptr_t va,phys_addr_t pa,phys_addr_t sz,pgprot_t prot)626 void __init create_pgd_mapping(pgd_t *pgdp,
627 uintptr_t va, phys_addr_t pa,
628 phys_addr_t sz, pgprot_t prot)
629 {
630 pgd_next_t *nextp;
631 phys_addr_t next_phys;
632 uintptr_t pgd_idx = pgd_index(va);
633
634 if (sz == PGDIR_SIZE) {
635 if (pgd_val(pgdp[pgd_idx]) == 0)
636 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
637 return;
638 }
639
640 if (pgd_val(pgdp[pgd_idx]) == 0) {
641 next_phys = alloc_pgd_next(va);
642 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
643 nextp = get_pgd_next_virt(next_phys);
644 memset(nextp, 0, PAGE_SIZE);
645 } else {
646 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
647 nextp = get_pgd_next_virt(next_phys);
648 }
649
650 create_pgd_next_mapping(nextp, va, pa, sz, prot);
651 }
652
best_map_size(phys_addr_t base,phys_addr_t size)653 static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
654 {
655 /* Upgrade to PMD_SIZE mappings whenever possible */
656 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
657 return PAGE_SIZE;
658
659 return PMD_SIZE;
660 }
661
662 #ifdef CONFIG_XIP_KERNEL
663 #define phys_ram_base (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
664 extern char _xiprom[], _exiprom[], __data_loc;
665
666 /* called from head.S with MMU off */
__copy_data(void)667 asmlinkage void __init __copy_data(void)
668 {
669 void *from = (void *)(&__data_loc);
670 void *to = (void *)CONFIG_PHYS_RAM_BASE;
671 size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
672
673 memcpy(to, from, sz);
674 }
675 #endif
676
677 #ifdef CONFIG_STRICT_KERNEL_RWX
pgprot_from_va(uintptr_t va)678 static __init pgprot_t pgprot_from_va(uintptr_t va)
679 {
680 if (is_va_kernel_text(va))
681 return PAGE_KERNEL_READ_EXEC;
682
683 /*
684 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
685 * we must protect its linear mapping alias from being executed and
686 * written.
687 * And rodata section is marked readonly in mark_rodata_ro.
688 */
689 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
690 return PAGE_KERNEL_READ;
691
692 return PAGE_KERNEL;
693 }
694
mark_rodata_ro(void)695 void mark_rodata_ro(void)
696 {
697 set_kernel_memory(__start_rodata, _data, set_memory_ro);
698 if (IS_ENABLED(CONFIG_64BIT))
699 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
700 set_memory_ro);
701
702 debug_checkwx();
703 }
704 #else
pgprot_from_va(uintptr_t va)705 static __init pgprot_t pgprot_from_va(uintptr_t va)
706 {
707 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
708 return PAGE_KERNEL;
709
710 return PAGE_KERNEL_EXEC;
711 }
712 #endif /* CONFIG_STRICT_KERNEL_RWX */
713
714 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
disable_pgtable_l5(void)715 static void __init disable_pgtable_l5(void)
716 {
717 pgtable_l5_enabled = false;
718 kernel_map.page_offset = PAGE_OFFSET_L4;
719 satp_mode = SATP_MODE_48;
720 }
721
disable_pgtable_l4(void)722 static void __init disable_pgtable_l4(void)
723 {
724 pgtable_l4_enabled = false;
725 kernel_map.page_offset = PAGE_OFFSET_L3;
726 satp_mode = SATP_MODE_39;
727 }
728
729 /*
730 * There is a simple way to determine if 4-level is supported by the
731 * underlying hardware: establish 1:1 mapping in 4-level page table mode
732 * then read SATP to see if the configuration was taken into account
733 * meaning sv48 is supported.
734 */
set_satp_mode(void)735 static __init void set_satp_mode(void)
736 {
737 u64 identity_satp, hw_satp;
738 uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
739 bool check_l4 = false;
740
741 create_p4d_mapping(early_p4d,
742 set_satp_mode_pmd, (uintptr_t)early_pud,
743 P4D_SIZE, PAGE_TABLE);
744 create_pud_mapping(early_pud,
745 set_satp_mode_pmd, (uintptr_t)early_pmd,
746 PUD_SIZE, PAGE_TABLE);
747 /* Handle the case where set_satp_mode straddles 2 PMDs */
748 create_pmd_mapping(early_pmd,
749 set_satp_mode_pmd, set_satp_mode_pmd,
750 PMD_SIZE, PAGE_KERNEL_EXEC);
751 create_pmd_mapping(early_pmd,
752 set_satp_mode_pmd + PMD_SIZE,
753 set_satp_mode_pmd + PMD_SIZE,
754 PMD_SIZE, PAGE_KERNEL_EXEC);
755 retry:
756 create_pgd_mapping(early_pg_dir,
757 set_satp_mode_pmd,
758 check_l4 ? (uintptr_t)early_pud : (uintptr_t)early_p4d,
759 PGDIR_SIZE, PAGE_TABLE);
760
761 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
762
763 local_flush_tlb_all();
764 csr_write(CSR_SATP, identity_satp);
765 hw_satp = csr_swap(CSR_SATP, 0ULL);
766 local_flush_tlb_all();
767
768 if (hw_satp != identity_satp) {
769 if (!check_l4) {
770 disable_pgtable_l5();
771 check_l4 = true;
772 memset(early_pg_dir, 0, PAGE_SIZE);
773 goto retry;
774 }
775 disable_pgtable_l4();
776 }
777
778 memset(early_pg_dir, 0, PAGE_SIZE);
779 memset(early_p4d, 0, PAGE_SIZE);
780 memset(early_pud, 0, PAGE_SIZE);
781 memset(early_pmd, 0, PAGE_SIZE);
782 }
783 #endif
784
785 /*
786 * setup_vm() is called from head.S with MMU-off.
787 *
788 * Following requirements should be honoured for setup_vm() to work
789 * correctly:
790 * 1) It should use PC-relative addressing for accessing kernel symbols.
791 * To achieve this we always use GCC cmodel=medany.
792 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
793 * so disable compiler instrumentation when FTRACE is enabled.
794 *
795 * Currently, the above requirements are honoured by using custom CFLAGS
796 * for init.o in mm/Makefile.
797 */
798
799 #ifndef __riscv_cmodel_medany
800 #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
801 #endif
802
803 #ifdef CONFIG_XIP_KERNEL
create_kernel_page_table(pgd_t * pgdir,__always_unused bool early)804 static void __init create_kernel_page_table(pgd_t *pgdir,
805 __always_unused bool early)
806 {
807 uintptr_t va, end_va;
808
809 /* Map the flash resident part */
810 end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
811 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
812 create_pgd_mapping(pgdir, va,
813 kernel_map.xiprom + (va - kernel_map.virt_addr),
814 PMD_SIZE, PAGE_KERNEL_EXEC);
815
816 /* Map the data in RAM */
817 end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
818 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
819 create_pgd_mapping(pgdir, va,
820 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
821 PMD_SIZE, PAGE_KERNEL);
822 }
823 #else
create_kernel_page_table(pgd_t * pgdir,bool early)824 static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
825 {
826 uintptr_t va, end_va;
827
828 end_va = kernel_map.virt_addr + kernel_map.size;
829 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
830 create_pgd_mapping(pgdir, va,
831 kernel_map.phys_addr + (va - kernel_map.virt_addr),
832 PMD_SIZE,
833 early ?
834 PAGE_KERNEL_EXEC : pgprot_from_va(va));
835 }
836 #endif
837
838 /*
839 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
840 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
841 * entry.
842 */
create_fdt_early_page_table(pgd_t * pgdir,uintptr_t dtb_pa)843 static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
844 {
845 #ifndef CONFIG_BUILTIN_DTB
846 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
847
848 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
849 IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
850 PGDIR_SIZE,
851 IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
852
853 if (pgtable_l5_enabled)
854 create_p4d_mapping(early_dtb_p4d, DTB_EARLY_BASE_VA,
855 (uintptr_t)early_dtb_pud, P4D_SIZE, PAGE_TABLE);
856
857 if (pgtable_l4_enabled)
858 create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
859 (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
860
861 if (IS_ENABLED(CONFIG_64BIT)) {
862 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
863 pa, PMD_SIZE, PAGE_KERNEL);
864 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
865 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
866 }
867
868 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
869 #else
870 /*
871 * For 64-bit kernel, __va can't be used since it would return a linear
872 * mapping address whereas dtb_early_va will be used before
873 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
874 * kernel is mapped in the linear mapping, that makes no difference.
875 */
876 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
877 #endif
878
879 dtb_early_pa = dtb_pa;
880 }
881
882 /*
883 * MMU is not enabled, the page tables are allocated directly using
884 * early_pmd/pud/p4d and the address returned is the physical one.
885 */
pt_ops_set_early(void)886 static void __init pt_ops_set_early(void)
887 {
888 pt_ops.alloc_pte = alloc_pte_early;
889 pt_ops.get_pte_virt = get_pte_virt_early;
890 #ifndef __PAGETABLE_PMD_FOLDED
891 pt_ops.alloc_pmd = alloc_pmd_early;
892 pt_ops.get_pmd_virt = get_pmd_virt_early;
893 pt_ops.alloc_pud = alloc_pud_early;
894 pt_ops.get_pud_virt = get_pud_virt_early;
895 pt_ops.alloc_p4d = alloc_p4d_early;
896 pt_ops.get_p4d_virt = get_p4d_virt_early;
897 #endif
898 }
899
900 /*
901 * MMU is enabled but page table setup is not complete yet.
902 * fixmap page table alloc functions must be used as a means to temporarily
903 * map the allocated physical pages since the linear mapping does not exist yet.
904 *
905 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
906 * but it will be used as described above.
907 */
pt_ops_set_fixmap(void)908 static void __init pt_ops_set_fixmap(void)
909 {
910 pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
911 pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
912 #ifndef __PAGETABLE_PMD_FOLDED
913 pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
914 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
915 pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
916 pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
917 pt_ops.alloc_p4d = kernel_mapping_pa_to_va((uintptr_t)alloc_p4d_fixmap);
918 pt_ops.get_p4d_virt = kernel_mapping_pa_to_va((uintptr_t)get_p4d_virt_fixmap);
919 #endif
920 }
921
922 /*
923 * MMU is enabled and page table setup is complete, so from now, we can use
924 * generic page allocation functions to setup page table.
925 */
pt_ops_set_late(void)926 static void __init pt_ops_set_late(void)
927 {
928 pt_ops.alloc_pte = alloc_pte_late;
929 pt_ops.get_pte_virt = get_pte_virt_late;
930 #ifndef __PAGETABLE_PMD_FOLDED
931 pt_ops.alloc_pmd = alloc_pmd_late;
932 pt_ops.get_pmd_virt = get_pmd_virt_late;
933 pt_ops.alloc_pud = alloc_pud_late;
934 pt_ops.get_pud_virt = get_pud_virt_late;
935 pt_ops.alloc_p4d = alloc_p4d_late;
936 pt_ops.get_p4d_virt = get_p4d_virt_late;
937 #endif
938 }
939
setup_vm(uintptr_t dtb_pa)940 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
941 {
942 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
943
944 kernel_map.virt_addr = KERNEL_LINK_ADDR;
945 kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
946
947 #ifdef CONFIG_XIP_KERNEL
948 kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
949 kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
950
951 phys_ram_base = CONFIG_PHYS_RAM_BASE;
952 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
953 kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
954
955 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
956 #else
957 kernel_map.phys_addr = (uintptr_t)(&_start);
958 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
959 #endif
960
961 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
962 set_satp_mode();
963 #endif
964
965 kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
966 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
967
968 riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
969
970 /*
971 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
972 * kernel, whereas for 64-bit kernel, the end of the virtual address
973 * space is occupied by the modules/BPF/kernel mappings which reduces
974 * the available size of the linear mapping.
975 */
976 memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
977
978 /* Sanity check alignment and size */
979 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
980 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
981
982 #ifdef CONFIG_64BIT
983 /*
984 * The last 4K bytes of the addressable memory can not be mapped because
985 * of IS_ERR_VALUE macro.
986 */
987 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
988 #endif
989
990 apply_early_boot_alternatives();
991 pt_ops_set_early();
992
993 /* Setup early PGD for fixmap */
994 create_pgd_mapping(early_pg_dir, FIXADDR_START,
995 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
996
997 #ifndef __PAGETABLE_PMD_FOLDED
998 /* Setup fixmap P4D and PUD */
999 if (pgtable_l5_enabled)
1000 create_p4d_mapping(fixmap_p4d, FIXADDR_START,
1001 (uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE);
1002 /* Setup fixmap PUD and PMD */
1003 if (pgtable_l4_enabled)
1004 create_pud_mapping(fixmap_pud, FIXADDR_START,
1005 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
1006 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
1007 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
1008 /* Setup trampoline PGD and PMD */
1009 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1010 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
1011 if (pgtable_l5_enabled)
1012 create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr,
1013 (uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE);
1014 if (pgtable_l4_enabled)
1015 create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
1016 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
1017 #ifdef CONFIG_XIP_KERNEL
1018 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1019 kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
1020 #else
1021 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1022 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
1023 #endif
1024 #else
1025 /* Setup trampoline PGD */
1026 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1027 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
1028 #endif
1029
1030 /*
1031 * Setup early PGD covering entire kernel which will allow
1032 * us to reach paging_init(). We map all memory banks later
1033 * in setup_vm_final() below.
1034 */
1035 create_kernel_page_table(early_pg_dir, true);
1036
1037 /* Setup early mapping for FDT early scan */
1038 create_fdt_early_page_table(early_pg_dir, dtb_pa);
1039
1040 /*
1041 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
1042 * range can not span multiple pmds.
1043 */
1044 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
1045 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
1046
1047 #ifndef __PAGETABLE_PMD_FOLDED
1048 /*
1049 * Early ioremap fixmap is already created as it lies within first 2MB
1050 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
1051 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
1052 * the user if not.
1053 */
1054 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
1055 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
1056 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
1057 WARN_ON(1);
1058 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
1059 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
1060 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
1061 fix_to_virt(FIX_BTMAP_BEGIN));
1062 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
1063 fix_to_virt(FIX_BTMAP_END));
1064
1065 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
1066 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
1067 }
1068 #endif
1069
1070 pt_ops_set_fixmap();
1071 }
1072
setup_vm_final(void)1073 static void __init setup_vm_final(void)
1074 {
1075 uintptr_t va, map_size;
1076 phys_addr_t pa, start, end;
1077 u64 i;
1078
1079 /* Setup swapper PGD for fixmap */
1080 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
1081 __pa_symbol(fixmap_pgd_next),
1082 PGDIR_SIZE, PAGE_TABLE);
1083
1084 /* Map all memory banks in the linear mapping */
1085 for_each_mem_range(i, &start, &end) {
1086 if (start >= end)
1087 break;
1088 if (start <= __pa(PAGE_OFFSET) &&
1089 __pa(PAGE_OFFSET) < end)
1090 start = __pa(PAGE_OFFSET);
1091 if (end >= __pa(PAGE_OFFSET) + memory_limit)
1092 end = __pa(PAGE_OFFSET) + memory_limit;
1093
1094 map_size = best_map_size(start, end - start);
1095 for (pa = start; pa < end; pa += map_size) {
1096 va = (uintptr_t)__va(pa);
1097
1098 create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
1099 pgprot_from_va(va));
1100 }
1101 }
1102
1103 /* Map the kernel */
1104 if (IS_ENABLED(CONFIG_64BIT))
1105 create_kernel_page_table(swapper_pg_dir, false);
1106
1107 #ifdef CONFIG_KASAN
1108 kasan_swapper_init();
1109 #endif
1110
1111 /* Clear fixmap PTE and PMD mappings */
1112 clear_fixmap(FIX_PTE);
1113 clear_fixmap(FIX_PMD);
1114 clear_fixmap(FIX_PUD);
1115 clear_fixmap(FIX_P4D);
1116
1117 /* Move to swapper page table */
1118 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
1119 local_flush_tlb_all();
1120
1121 pt_ops_set_late();
1122 }
1123 #else
setup_vm(uintptr_t dtb_pa)1124 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
1125 {
1126 dtb_early_va = (void *)dtb_pa;
1127 dtb_early_pa = dtb_pa;
1128 }
1129
setup_vm_final(void)1130 static inline void setup_vm_final(void)
1131 {
1132 }
1133 #endif /* CONFIG_MMU */
1134
1135 /*
1136 * reserve_crashkernel() - reserves memory for crash kernel
1137 *
1138 * This function reserves memory area given in "crashkernel=" kernel command
1139 * line parameter. The memory reserved is used by dump capture kernel when
1140 * primary kernel is crashing.
1141 */
reserve_crashkernel(void)1142 static void __init reserve_crashkernel(void)
1143 {
1144 unsigned long long crash_base = 0;
1145 unsigned long long crash_size = 0;
1146 unsigned long search_start = memblock_start_of_DRAM();
1147 unsigned long search_end = memblock_end_of_DRAM();
1148
1149 int ret = 0;
1150
1151 if (!IS_ENABLED(CONFIG_KEXEC_CORE))
1152 return;
1153 /*
1154 * Don't reserve a region for a crash kernel on a crash kernel
1155 * since it doesn't make much sense and we have limited memory
1156 * resources.
1157 */
1158 if (is_kdump_kernel()) {
1159 pr_info("crashkernel: ignoring reservation request\n");
1160 return;
1161 }
1162
1163 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
1164 &crash_size, &crash_base);
1165 if (ret || !crash_size)
1166 return;
1167
1168 crash_size = PAGE_ALIGN(crash_size);
1169
1170 if (crash_base) {
1171 search_start = crash_base;
1172 search_end = crash_base + crash_size;
1173 }
1174
1175 /*
1176 * Current riscv boot protocol requires 2MB alignment for
1177 * RV64 and 4MB alignment for RV32 (hugepage size)
1178 *
1179 * Try to alloc from 32bit addressible physical memory so that
1180 * swiotlb can work on the crash kernel.
1181 */
1182 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1183 search_start,
1184 min(search_end, (unsigned long) SZ_4G));
1185 if (crash_base == 0) {
1186 /* Try again without restricting region to 32bit addressible memory */
1187 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1188 search_start, search_end);
1189 if (crash_base == 0) {
1190 pr_warn("crashkernel: couldn't allocate %lldKB\n",
1191 crash_size >> 10);
1192 return;
1193 }
1194 }
1195
1196 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1197 crash_base, crash_base + crash_size, crash_size >> 20);
1198
1199 crashk_res.start = crash_base;
1200 crashk_res.end = crash_base + crash_size - 1;
1201 }
1202
paging_init(void)1203 void __init paging_init(void)
1204 {
1205 setup_bootmem();
1206 setup_vm_final();
1207 }
1208
misc_mem_init(void)1209 void __init misc_mem_init(void)
1210 {
1211 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1212 arch_numa_init();
1213 sparse_init();
1214 zone_sizes_init();
1215 reserve_crashkernel();
1216 memblock_dump_all();
1217 }
1218
1219 #ifdef CONFIG_SPARSEMEM_VMEMMAP
vmemmap_populate(unsigned long start,unsigned long end,int node,struct vmem_altmap * altmap)1220 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1221 struct vmem_altmap *altmap)
1222 {
1223 return vmemmap_populate_basepages(start, end, node, NULL);
1224 }
1225 #endif
1226