1/* SPDX-License-Identifier: GPL-2.0 */
2#include <linux/errno.h>
3#include <linux/linkage.h>
4#include <asm/asm-offsets.h>
5#include <asm/assembler.h>
6#include <asm/smp.h>
7
8	.text
9/*
10 * Implementation of MPIDR_EL1 hash algorithm through shifting
11 * and OR'ing.
12 *
13 * @dst: register containing hash result
14 * @rs0: register containing affinity level 0 bit shift
15 * @rs1: register containing affinity level 1 bit shift
16 * @rs2: register containing affinity level 2 bit shift
17 * @rs3: register containing affinity level 3 bit shift
18 * @mpidr: register containing MPIDR_EL1 value
19 * @mask: register containing MPIDR mask
20 *
21 * Pseudo C-code:
22 *
23 *u32 dst;
24 *
25 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
26 *	u32 aff0, aff1, aff2, aff3;
27 *	u64 mpidr_masked = mpidr & mask;
28 *	aff0 = mpidr_masked & 0xff;
29 *	aff1 = mpidr_masked & 0xff00;
30 *	aff2 = mpidr_masked & 0xff0000;
31 *	aff3 = mpidr_masked & 0xff00000000;
32 *	dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
33 *}
34 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
35 * Output register: dst
36 * Note: input and output registers must be disjoint register sets
37         (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
38 */
39	.macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
40	and	\mpidr, \mpidr, \mask		// mask out MPIDR bits
41	and	\dst, \mpidr, #0xff		// mask=aff0
42	lsr	\dst ,\dst, \rs0		// dst=aff0>>rs0
43	and	\mask, \mpidr, #0xff00		// mask = aff1
44	lsr	\mask ,\mask, \rs1
45	orr	\dst, \dst, \mask		// dst|=(aff1>>rs1)
46	and	\mask, \mpidr, #0xff0000	// mask = aff2
47	lsr	\mask ,\mask, \rs2
48	orr	\dst, \dst, \mask		// dst|=(aff2>>rs2)
49	and	\mask, \mpidr, #0xff00000000	// mask = aff3
50	lsr	\mask ,\mask, \rs3
51	orr	\dst, \dst, \mask		// dst|=(aff3>>rs3)
52	.endm
53/*
54 * Save CPU state in the provided sleep_stack_data area, and publish its
55 * location for cpu_resume()'s use in sleep_save_stash.
56 *
57 * cpu_resume() will restore this saved state, and return. Because the
58 * link-register is saved and restored, it will appear to return from this
59 * function. So that the caller can tell the suspend/resume paths apart,
60 * __cpu_suspend_enter() will always return a non-zero value, whereas the
61 * path through cpu_resume() will return 0.
62 *
63 *  x0 = struct sleep_stack_data area
64 */
65SYM_FUNC_START(__cpu_suspend_enter)
66	stp	x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
67	stp	x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
68	stp	x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
69	stp	x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
70	stp	x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
71	stp	x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
72
73	/* save the sp in cpu_suspend_ctx */
74	mov	x2, sp
75	str	x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
76
77	/* find the mpidr_hash */
78	ldr_l	x1, sleep_save_stash
79	mrs	x7, mpidr_el1
80	adr_l	x9, mpidr_hash
81	ldr	x10, [x9, #MPIDR_HASH_MASK]
82	/*
83	 * Following code relies on the struct mpidr_hash
84	 * members size.
85	 */
86	ldp	w3, w4, [x9, #MPIDR_HASH_SHIFTS]
87	ldp	w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
88	compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
89	add	x1, x1, x8, lsl #3
90
91	str	x0, [x1]
92	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
93	stp	x29, lr, [sp, #-16]!
94	bl	cpu_do_suspend
95	ldp	x29, lr, [sp], #16
96	mov	x0, #1
97	ret
98SYM_FUNC_END(__cpu_suspend_enter)
99
100	.pushsection ".idmap.text", "awx"
101SYM_CODE_START(cpu_resume)
102	bl	init_kernel_el
103	bl	switch_to_vhe
104	bl	__cpu_setup
105	/* enable the MMU early - so we can access sleep_save_stash by va */
106	adrp	x1, swapper_pg_dir
107	bl	__enable_mmu
108	ldr	x8, =_cpu_resume
109	br	x8
110SYM_CODE_END(cpu_resume)
111	.ltorg
112	.popsection
113
114SYM_FUNC_START(_cpu_resume)
115	mrs	x1, mpidr_el1
116	adr_l	x8, mpidr_hash		// x8 = struct mpidr_hash virt address
117
118	/* retrieve mpidr_hash members to compute the hash */
119	ldr	x2, [x8, #MPIDR_HASH_MASK]
120	ldp	w3, w4, [x8, #MPIDR_HASH_SHIFTS]
121	ldp	w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
122	compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
123
124	/* x7 contains hash index, let's use it to grab context pointer */
125	ldr_l	x0, sleep_save_stash
126	ldr	x0, [x0, x7, lsl #3]
127	add	x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
128	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
129	/* load sp from context */
130	ldr	x2, [x0, #CPU_CTX_SP]
131	mov	sp, x2
132	/*
133	 * cpu_do_resume expects x0 to contain context address pointer
134	 */
135	bl	cpu_do_resume
136
137#if defined(CONFIG_KASAN) && defined(CONFIG_KASAN_STACK)
138	mov	x0, sp
139	bl	kasan_unpoison_task_stack_below
140#endif
141
142	ldp	x19, x20, [x29, #16]
143	ldp	x21, x22, [x29, #32]
144	ldp	x23, x24, [x29, #48]
145	ldp	x25, x26, [x29, #64]
146	ldp	x27, x28, [x29, #80]
147	ldp	x29, lr, [x29]
148	mov	x0, #0
149	ret
150SYM_FUNC_END(_cpu_resume)
151