1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * arch/arm/mach-iop32x/iq80321.c
4  *
5  * Board support code for the Intel IQ80321 platform.
6  *
7  * Author: Rory Bolt <rorybolt@pacbell.net>
8  * Copyright (C) 2002 Rory Bolt
9  * Copyright (C) 2004 Intel Corp.
10  */
11 
12 #include <linux/mm.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/string.h>
17 #include <linux/serial_core.h>
18 #include <linux/serial_8250.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/gpio/machine.h>
23 #include <asm/irq.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/pci.h>
27 #include <asm/mach/time.h>
28 #include <asm/mach-types.h>
29 #include <asm/page.h>
30 
31 #include "hardware.h"
32 #include "irqs.h"
33 #include "gpio-iop32x.h"
34 
35 /*
36  * IQ80321 timer tick configuration.
37  */
iq80321_timer_init(void)38 static void __init iq80321_timer_init(void)
39 {
40 	/* 33.333 MHz crystal.  */
41 	iop_init_time(200000000);
42 }
43 
44 
45 /*
46  * IQ80321 I/O.
47  */
48 static struct map_desc iq80321_io_desc[] __initdata = {
49  	{	/* on-board devices */
50 		.virtual	= IQ80321_UART,
51 		.pfn		= __phys_to_pfn(IQ80321_UART),
52 		.length		= 0x00100000,
53 		.type		= MT_DEVICE,
54 	},
55 };
56 
iq80321_map_io(void)57 void __init iq80321_map_io(void)
58 {
59 	iop3xx_map_io();
60 	iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
61 }
62 
63 
64 /*
65  * IQ80321 PCI.
66  */
67 static int __init
iq80321_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)68 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
69 {
70 	int irq;
71 
72 	if ((slot == 2 || slot == 6) && pin == 1) {
73 		/* PCI-X Slot INTA */
74 		irq = IRQ_IOP32X_XINT2;
75 	} else if ((slot == 2 || slot == 6) && pin == 2) {
76 		/* PCI-X Slot INTA */
77 		irq = IRQ_IOP32X_XINT3;
78 	} else if ((slot == 2 || slot == 6) && pin == 3) {
79 		/* PCI-X Slot INTA */
80 		irq = IRQ_IOP32X_XINT0;
81 	} else if ((slot == 2 || slot == 6) && pin == 4) {
82 		/* PCI-X Slot INTA */
83 		irq = IRQ_IOP32X_XINT1;
84 	} else if (slot == 4 || slot == 8) {
85 		/* Gig-E */
86 		irq = IRQ_IOP32X_XINT0;
87 	} else {
88 		printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
89 			"device PCI:%d:%d:%d\n", dev->bus->number,
90 			PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
91 		irq = -1;
92 	}
93 
94 	return irq;
95 }
96 
97 static struct hw_pci iq80321_pci __initdata = {
98 	.nr_controllers = 1,
99 	.ops		= &iop3xx_ops,
100 	.setup		= iop3xx_pci_setup,
101 	.preinit	= iop3xx_pci_preinit_cond,
102 	.map_irq	= iq80321_pci_map_irq,
103 };
104 
iq80321_pci_init(void)105 static int __init iq80321_pci_init(void)
106 {
107 	if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
108 		machine_is_iq80321())
109 		pci_common_init(&iq80321_pci);
110 
111 	return 0;
112 }
113 
114 subsys_initcall(iq80321_pci_init);
115 
116 
117 /*
118  * IQ80321 machine initialisation.
119  */
120 static struct physmap_flash_data iq80321_flash_data = {
121 	.width		= 1,
122 };
123 
124 static struct resource iq80321_flash_resource = {
125 	.start		= 0xf0000000,
126 	.end		= 0xf07fffff,
127 	.flags		= IORESOURCE_MEM,
128 };
129 
130 static struct platform_device iq80321_flash_device = {
131 	.name		= "physmap-flash",
132 	.id		= 0,
133 	.dev		= {
134 		.platform_data	= &iq80321_flash_data,
135 	},
136 	.num_resources	= 1,
137 	.resource	= &iq80321_flash_resource,
138 };
139 
140 static struct plat_serial8250_port iq80321_serial_port[] = {
141 	{
142 		.mapbase	= IQ80321_UART,
143 		.membase	= (char *)IQ80321_UART,
144 		.irq		= IRQ_IOP32X_XINT1,
145 		.flags		= UPF_SKIP_TEST,
146 		.iotype		= UPIO_MEM,
147 		.regshift	= 0,
148 		.uartclk	= 1843200,
149 	},
150 	{ },
151 };
152 
153 static struct resource iq80321_uart_resource = {
154 	.start		= IQ80321_UART,
155 	.end		= IQ80321_UART + 7,
156 	.flags		= IORESOURCE_MEM,
157 };
158 
159 static struct platform_device iq80321_serial_device = {
160 	.name		= "serial8250",
161 	.id		= PLAT8250_DEV_PLATFORM,
162 	.dev		= {
163 		.platform_data		= iq80321_serial_port,
164 	},
165 	.num_resources	= 1,
166 	.resource	= &iq80321_uart_resource,
167 };
168 
iq80321_init_machine(void)169 static void __init iq80321_init_machine(void)
170 {
171 	register_iop32x_gpio();
172 	gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
173 	gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
174 	platform_device_register(&iop3xx_i2c0_device);
175 	platform_device_register(&iop3xx_i2c1_device);
176 	platform_device_register(&iq80321_flash_device);
177 	platform_device_register(&iq80321_serial_device);
178 	platform_device_register(&iop3xx_dma_0_channel);
179 	platform_device_register(&iop3xx_dma_1_channel);
180 	platform_device_register(&iop3xx_aau_channel);
181 }
182 
183 MACHINE_START(IQ80321, "Intel IQ80321")
184 	/* Maintainer: Intel Corp. */
185 	.atag_offset	= 0x100,
186 	.nr_irqs	= IOP32X_NR_IRQS,
187 	.map_io		= iq80321_map_io,
188 	.init_irq	= iop32x_init_irq,
189 	.init_time	= iq80321_timer_init,
190 	.init_machine	= iq80321_init_machine,
191 	.restart	= iop3xx_restart,
192 MACHINE_END
193