1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * arch/arm/mach-iop32x/iq31244.c
4 *
5 * Board support code for the Intel EP80219 and IQ31244 platforms.
6 *
7 * Author: Rory Bolt <rorybolt@pacbell.net>
8 * Copyright (C) 2002 Rory Bolt
9 * Copyright 2003 (c) MontaVista, Software, Inc.
10 * Copyright (C) 2004 Intel Corp.
11 */
12
13 #include <linux/mm.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/pm.h>
19 #include <linux/string.h>
20 #include <linux/serial_core.h>
21 #include <linux/serial_8250.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/platform_device.h>
24 #include <linux/io.h>
25 #include <linux/gpio/machine.h>
26 #include <asm/cputype.h>
27 #include <asm/irq.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/pci.h>
31 #include <asm/mach/time.h>
32 #include <asm/mach-types.h>
33 #include <asm/page.h>
34
35 #include "hardware.h"
36 #include "irqs.h"
37 #include "gpio-iop32x.h"
38
39 /*
40 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
41 * same machine id, and the processor type was used to select board type.
42 * However this assumption breaks for an iq80219 board which is an iop219
43 * processor on an iq31244 board. The force_ep80219 flag has been added
44 * for old boot loaders using the iq31244 machine id for an ep80219 platform.
45 */
46 static int force_ep80219;
47
is_80219(void)48 static int is_80219(void)
49 {
50 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
51 }
52
is_ep80219(void)53 static int is_ep80219(void)
54 {
55 if (machine_is_ep80219() || force_ep80219)
56 return 1;
57 else
58 return 0;
59 }
60
61
62 /*
63 * EP80219/IQ31244 timer tick configuration.
64 */
iq31244_timer_init(void)65 static void __init iq31244_timer_init(void)
66 {
67 if (is_ep80219()) {
68 /* 33.333 MHz crystal. */
69 iop_init_time(200000000);
70 } else {
71 /* 33.000 MHz crystal. */
72 iop_init_time(198000000);
73 }
74 }
75
76
77 /*
78 * IQ31244 I/O.
79 */
80 static struct map_desc iq31244_io_desc[] __initdata = {
81 { /* on-board devices */
82 .virtual = IQ31244_UART,
83 .pfn = __phys_to_pfn(IQ31244_UART),
84 .length = 0x00100000,
85 .type = MT_DEVICE,
86 },
87 };
88
iq31244_map_io(void)89 void __init iq31244_map_io(void)
90 {
91 iop3xx_map_io();
92 iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
93 }
94
95
96 /*
97 * EP80219/IQ31244 PCI.
98 */
99 static int __init
ep80219_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)100 ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
101 {
102 int irq;
103
104 if (slot == 0) {
105 /* CFlash */
106 irq = IRQ_IOP32X_XINT1;
107 } else if (slot == 1) {
108 /* 82551 Pro 100 */
109 irq = IRQ_IOP32X_XINT0;
110 } else if (slot == 2) {
111 /* PCI-X Slot */
112 irq = IRQ_IOP32X_XINT3;
113 } else if (slot == 3) {
114 /* SATA */
115 irq = IRQ_IOP32X_XINT2;
116 } else {
117 printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
118 "device PCI:%d:%d:%d\n", dev->bus->number,
119 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
120 irq = -1;
121 }
122
123 return irq;
124 }
125
126 static struct hw_pci ep80219_pci __initdata = {
127 .nr_controllers = 1,
128 .ops = &iop3xx_ops,
129 .setup = iop3xx_pci_setup,
130 .preinit = iop3xx_pci_preinit,
131 .map_irq = ep80219_pci_map_irq,
132 };
133
134 static int __init
iq31244_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)135 iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
136 {
137 int irq;
138
139 if (slot == 0) {
140 /* CFlash */
141 irq = IRQ_IOP32X_XINT1;
142 } else if (slot == 1) {
143 /* SATA */
144 irq = IRQ_IOP32X_XINT2;
145 } else if (slot == 2) {
146 /* PCI-X Slot */
147 irq = IRQ_IOP32X_XINT3;
148 } else if (slot == 3) {
149 /* 82546 GigE */
150 irq = IRQ_IOP32X_XINT0;
151 } else {
152 printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
153 "device PCI:%d:%d:%d\n", dev->bus->number,
154 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
155 irq = -1;
156 }
157
158 return irq;
159 }
160
161 static struct hw_pci iq31244_pci __initdata = {
162 .nr_controllers = 1,
163 .ops = &iop3xx_ops,
164 .setup = iop3xx_pci_setup,
165 .preinit = iop3xx_pci_preinit,
166 .map_irq = iq31244_pci_map_irq,
167 };
168
iq31244_pci_init(void)169 static int __init iq31244_pci_init(void)
170 {
171 if (is_ep80219())
172 pci_common_init(&ep80219_pci);
173 else if (machine_is_iq31244()) {
174 if (is_80219()) {
175 printk("note: iq31244 board type has been selected\n");
176 printk("note: to select ep80219 operation:\n");
177 printk("\t1/ specify \"force_ep80219\" on the kernel"
178 " command line\n");
179 printk("\t2/ update boot loader to pass"
180 " the ep80219 id: %d\n", MACH_TYPE_EP80219);
181 }
182 pci_common_init(&iq31244_pci);
183 }
184
185 return 0;
186 }
187
188 subsys_initcall(iq31244_pci_init);
189
190
191 /*
192 * IQ31244 machine initialisation.
193 */
194 static struct physmap_flash_data iq31244_flash_data = {
195 .width = 2,
196 };
197
198 static struct resource iq31244_flash_resource = {
199 .start = 0xf0000000,
200 .end = 0xf07fffff,
201 .flags = IORESOURCE_MEM,
202 };
203
204 static struct platform_device iq31244_flash_device = {
205 .name = "physmap-flash",
206 .id = 0,
207 .dev = {
208 .platform_data = &iq31244_flash_data,
209 },
210 .num_resources = 1,
211 .resource = &iq31244_flash_resource,
212 };
213
214 static struct plat_serial8250_port iq31244_serial_port[] = {
215 {
216 .mapbase = IQ31244_UART,
217 .membase = (char *)IQ31244_UART,
218 .irq = IRQ_IOP32X_XINT1,
219 .flags = UPF_SKIP_TEST,
220 .iotype = UPIO_MEM,
221 .regshift = 0,
222 .uartclk = 1843200,
223 },
224 { },
225 };
226
227 static struct resource iq31244_uart_resource = {
228 .start = IQ31244_UART,
229 .end = IQ31244_UART + 7,
230 .flags = IORESOURCE_MEM,
231 };
232
233 static struct platform_device iq31244_serial_device = {
234 .name = "serial8250",
235 .id = PLAT8250_DEV_PLATFORM,
236 .dev = {
237 .platform_data = iq31244_serial_port,
238 },
239 .num_resources = 1,
240 .resource = &iq31244_uart_resource,
241 };
242
243 /*
244 * This function will send a SHUTDOWN_COMPLETE message to the PIC
245 * controller over I2C. We are not using the i2c subsystem since
246 * we are going to power off and it may be removed
247 */
ep80219_power_off(void)248 void ep80219_power_off(void)
249 {
250 /*
251 * Send the Address byte w/ the start condition
252 */
253 *IOP3XX_IDBR1 = 0x60;
254 *IOP3XX_ICR1 = 0xE9;
255 mdelay(1);
256
257 /*
258 * Send the START_MSG byte w/ no start or stop condition
259 */
260 *IOP3XX_IDBR1 = 0x0F;
261 *IOP3XX_ICR1 = 0xE8;
262 mdelay(1);
263
264 /*
265 * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
266 * stop condition
267 */
268 *IOP3XX_IDBR1 = 0x03;
269 *IOP3XX_ICR1 = 0xE8;
270 mdelay(1);
271
272 /*
273 * Send an ignored byte w/ stop condition
274 */
275 *IOP3XX_IDBR1 = 0x00;
276 *IOP3XX_ICR1 = 0xEA;
277
278 while (1)
279 ;
280 }
281
iq31244_init_machine(void)282 static void __init iq31244_init_machine(void)
283 {
284 register_iop32x_gpio();
285 gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
286 gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
287 platform_device_register(&iop3xx_i2c0_device);
288 platform_device_register(&iop3xx_i2c1_device);
289 platform_device_register(&iq31244_flash_device);
290 platform_device_register(&iq31244_serial_device);
291 platform_device_register(&iop3xx_dma_0_channel);
292 platform_device_register(&iop3xx_dma_1_channel);
293
294 if (is_ep80219())
295 pm_power_off = ep80219_power_off;
296
297 if (!is_80219())
298 platform_device_register(&iop3xx_aau_channel);
299 }
300
force_ep80219_setup(char * str)301 static int __init force_ep80219_setup(char *str)
302 {
303 force_ep80219 = 1;
304 return 1;
305 }
306
307 __setup("force_ep80219", force_ep80219_setup);
308
309 MACHINE_START(IQ31244, "Intel IQ31244")
310 /* Maintainer: Intel Corp. */
311 .atag_offset = 0x100,
312 .map_io = iq31244_map_io,
313 .init_irq = iop32x_init_irq,
314 .init_time = iq31244_timer_init,
315 .init_machine = iq31244_init_machine,
316 .restart = iop3xx_restart,
317 MACHINE_END
318
319 /* There should have been an ep80219 machine identifier from the beginning.
320 * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
321 * "force_ep80219" on the kernel command line, otherwise iq31244 operation
322 * will be selected.
323 */
324 MACHINE_START(EP80219, "Intel EP80219")
325 /* Maintainer: Intel Corp. */
326 .atag_offset = 0x100,
327 .nr_irqs = IOP32X_NR_IRQS,
328 .map_io = iq31244_map_io,
329 .init_irq = iop32x_init_irq,
330 .init_time = iq31244_timer_init,
331 .init_machine = iq31244_init_machine,
332 .restart = iop3xx_restart,
333 MACHINE_END
334