1 /*
2  * This file contains the processor specific definitions
3  * of the TI DM644x, DM355, DM365, and DM646x.
4  *
5  * Copyright (C) 2011 Texas Instruments Incorporated
6  * Copyright (c) 2007 Deep Root Systems, LLC
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation version 2.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13  * kind, whether express or implied; without even the implied warranty
14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 #ifndef __DAVINCI_H
18 #define __DAVINCI_H
19 
20 #include <linux/clk.h>
21 #include <linux/videodev2.h>
22 #include <linux/davinci_emac.h>
23 #include <linux/platform_device.h>
24 #include <linux/spi/spi.h>
25 #include <linux/platform_data/davinci_asp.h>
26 #include <linux/platform_data/edma.h>
27 #include <linux/platform_data/keyscan-davinci.h>
28 
29 #include "hardware.h"
30 
31 #include <media/davinci/vpfe_capture.h>
32 #include <media/davinci/vpif_types.h>
33 #include <media/davinci/vpss.h>
34 #include <media/davinci/vpbe_types.h>
35 #include <media/davinci/vpbe_venc.h>
36 #include <media/davinci/vpbe.h>
37 #include <media/davinci/vpbe_osd.h>
38 
39 #define DAVINCI_PLL1_BASE		0x01c40800
40 #define DAVINCI_PLL2_BASE		0x01c40c00
41 #define DAVINCI_PWR_SLEEP_CNTRL_BASE	0x01c41000
42 
43 #define DAVINCI_SYSTEM_MODULE_BASE	0x01c40000
44 #define SYSMOD_VDAC_CONFIG		0x2c
45 #define SYSMOD_VIDCLKCTL		0x38
46 #define SYSMOD_VPSS_CLKCTL		0x44
47 #define SYSMOD_VDD3P3VPWDN		0x48
48 #define SYSMOD_VSCLKDIS			0x6c
49 #define SYSMOD_PUPDCTL1			0x7c
50 
51 /* VPSS CLKCTL bit definitions */
52 #define VPSS_MUXSEL_EXTCLK_ENABLE	BIT(1)
53 #define VPSS_VENCCLKEN_ENABLE		BIT(3)
54 #define VPSS_DACCLKEN_ENABLE		BIT(4)
55 #define VPSS_PLLC2SYSCLK5_ENABLE	BIT(5)
56 
57 extern void __iomem *davinci_sysmod_base;
58 #define DAVINCI_SYSMOD_VIRT(x)	(davinci_sysmod_base + (x))
59 void davinci_map_sysmod(void);
60 
61 #define DAVINCI_GPIO_BASE 0x01C67000
62 int davinci_gpio_register(struct resource *res, int size, void *pdata);
63 
64 #define DAVINCI_TIMER0_BASE		(IO_PHYS + 0x21400)
65 #define DAVINCI_WDOG_BASE		(IO_PHYS + 0x21C00)
66 
67 /* DM355 base addresses */
68 #define DM355_ASYNC_EMIF_CONTROL_BASE	0x01e10000
69 #define DM355_ASYNC_EMIF_DATA_CE0_BASE	0x02000000
70 
71 #define ASP1_TX_EVT_EN	1
72 #define ASP1_RX_EVT_EN	2
73 
74 /* DM365 base addresses */
75 #define DM365_ASYNC_EMIF_CONTROL_BASE	0x01d10000
76 #define DM365_ASYNC_EMIF_DATA_CE0_BASE	0x02000000
77 #define DM365_ASYNC_EMIF_DATA_CE1_BASE	0x04000000
78 
79 /* DM644x base addresses */
80 #define DM644X_ASYNC_EMIF_CONTROL_BASE	0x01e00000
81 #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
82 #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
83 #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
84 #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
85 
86 /* DM646x base addresses */
87 #define DM646X_ASYNC_EMIF_CONTROL_BASE	0x20008000
88 #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
89 
90 int davinci_init_wdt(void);
91 
92 /* DM355 function declarations */
93 void dm355_init(void);
94 void dm355_init_time(void);
95 void dm355_init_irq(void);
96 void dm355_register_clocks(void);
97 void dm355_init_spi0(unsigned chipselect_mask,
98 		const struct spi_board_info *info, unsigned len);
99 void dm355_init_asp1(u32 evt_enable);
100 int dm355_init_video(struct vpfe_config *, struct vpbe_config *);
101 int dm355_gpio_register(void);
102 
103 /* DM365 function declarations */
104 void dm365_init(void);
105 void dm365_init_irq(void);
106 void dm365_init_time(void);
107 void dm365_register_clocks(void);
108 void dm365_init_asp(void);
109 void dm365_init_vc(void);
110 void dm365_init_ks(struct davinci_ks_platform_data *pdata);
111 void dm365_init_rtc(void);
112 void dm365_init_spi0(unsigned chipselect_mask,
113 			const struct spi_board_info *info, unsigned len);
114 int dm365_init_video(struct vpfe_config *, struct vpbe_config *);
115 int dm365_gpio_register(void);
116 
117 /* DM644x function declarations */
118 void dm644x_init(void);
119 void dm644x_init_irq(void);
120 void dm644x_init_devices(void);
121 void dm644x_init_time(void);
122 void dm644x_register_clocks(void);
123 void dm644x_init_asp(void);
124 int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
125 int dm644x_gpio_register(void);
126 
127 /* DM646x function declarations */
128 void dm646x_init(void);
129 void dm646x_init_irq(void);
130 void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
131 void dm646x_register_clocks(void);
132 void dm646x_init_mcasp0(struct snd_platform_data *pdata);
133 void dm646x_init_mcasp1(struct snd_platform_data *pdata);
134 int dm646x_init_edma(struct edma_rsv_info *rsv);
135 void dm646x_video_init(void);
136 void dm646x_setup_vpif(struct vpif_display_config *,
137 		       struct vpif_capture_config *);
138 int dm646x_gpio_register(void);
139 
140 extern struct platform_device dm365_serial_device[];
141 extern struct platform_device dm355_serial_device[];
142 extern struct platform_device dm644x_serial_device[];
143 extern struct platform_device dm646x_serial_device[];
144 #endif /*__DAVINCI_H */
145