1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZA2MEVB board 4 * 5 * Copyright (C) 2018 Renesas Electronics 6 * 7 * As upstream Linux does not support XIP, it cannot run in 8 MiB of HyperRAM. 8 * Hence the 64 MiB of SDRAM on the sub-board needs to be enabled, which has 9 * the following ramifications: 10 * - SCIF4 connected to the on-board USB-serial can no longer be used as the 11 * serial console, 12 * - Instead, SCIF2 is used as the serial console, by connecting a 3.3V TTL 13 * USB-to-Serial adapter to the CMOS camera connector: 14 * - RXD = CN17-9, 15 * - TXD = CN17-10, 16 * - GND = CN17-2 or CN17-17, 17 * - The first Ethernet channel can no longer be used, 18 * - USB Channel 1 loses the overcurrent input signal. 19 * 20 * Please make sure your sub-board matches the following switch settings: 21 * 22 * SW6 SW6-1 set to SDRAM 23 * ON SW6-2 set to Audio 24 * +---------------------+ SW6-3 set to DRP 25 * | = = = = = | SW6-4 set to CEU 26 * | = = | SW6-5 set to Ether2 27 * | 1 2 3 4 5 6 7 8 9 0 | SW6-6 set to VDC6 28 * +---------------------+ SW6-7 set to VDC6 29 */ 30 31/dts-v1/; 32#include "r7s9210.dtsi" 33#include <dt-bindings/gpio/gpio.h> 34#include <dt-bindings/input/input.h> 35#include <dt-bindings/pinctrl/r7s9210-pinctrl.h> 36 37/ { 38 model = "RZA2MEVB"; 39 compatible = "renesas,rza2mevb", "renesas,r7s9210"; 40 41 aliases { 42 serial0 = &scif2; 43 ethernet0 = ðer1; 44 }; 45 46 chosen { 47 bootargs = "ignore_loglevel"; 48 stdout-path = "serial0:115200n8"; 49 }; 50 51 keyboard { 52 compatible = "gpio-keys"; 53 54 pinctrl-names = "default"; 55 pinctrl-0 = <&keyboard_pins>; 56 57 key-3 { 58 interrupt-parent = <&irqc>; 59 interrupts = <0 IRQ_TYPE_EDGE_BOTH>; 60 linux,code = <KEY_3>; 61 label = "SW3"; 62 wakeup-source; 63 }; 64 }; 65 66 lbsc { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 }; 70 71 leds { 72 compatible = "gpio-leds"; 73 74 red { 75 gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>; 76 }; 77 green { 78 gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>; 79 }; 80 }; 81 82 memory@c000000 { 83 device_type = "memory"; 84 reg = <0x0c000000 0x04000000>; /* SDRAM */ 85 }; 86}; 87 88&ehci0 { 89 status = "okay"; 90}; 91 92&ehci1 { 93 status = "okay"; 94}; 95 96ðer1 { 97 pinctrl-names = "default"; 98 pinctrl-0 = <ð1_pins>; 99 status = "okay"; 100 renesas,no-ether-link; 101 phy-handle = <&phy1>; 102 phy1: ethernet-phy@1 { 103 compatible = "ethernet-phy-id001c.c816", 104 "ethernet-phy-ieee802.3-c22"; 105 reg = <0>; 106 }; 107}; 108 109/* EXTAL */ 110&extal_clk { 111 clock-frequency = <24000000>; /* 24MHz */ 112}; 113 114&i2c3 { 115 status = "okay"; 116 clock-frequency = <400000>; 117 118 pinctrl-names = "default"; 119 pinctrl-0 = <&i2c3_pins>; 120 121 eeprom@50 { 122 compatible = "renesas,r1ex24128", "atmel,24c128"; 123 reg = <0x50>; 124 pagesize = <64>; 125 }; 126}; 127 128/* High resolution System tick timers */ 129&ostm0 { 130 status = "okay"; 131}; 132 133&ostm1 { 134 status = "okay"; 135}; 136 137&pinctrl { 138 eth0_pins: eth0 { 139 pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */ 140 <RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */ 141 <RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */ 142 <RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */ 143 <RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */ 144 <RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */ 145 <RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */ 146 <RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */ 147 <RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */ 148 <RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */ 149 <RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */ 150 }; 151 152 eth1_pins: eth1 { 153 pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */ 154 <RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */ 155 <RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */ 156 <RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */ 157 <RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */ 158 <RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */ 159 <RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */ 160 <RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */ 161 <RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */ 162 <RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */ 163 <RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */ 164 }; 165 166 i2c3_pins: i2c3 { 167 pinmux = <RZA2_PINMUX(PORTD, 6, 1)>, /* RIIC3SCL */ 168 <RZA2_PINMUX(PORTD, 7, 1)>; /* RIIC3SDA */ 169 }; 170 171 keyboard_pins: keyboard { 172 pinmux = <RZA2_PINMUX(PORTJ, 1, 6)>; /* IRQ0 */ 173 }; 174 175 /* Serial Console */ 176 scif2_pins: serial2 { 177 pinmux = <RZA2_PINMUX(PORTE, 2, 3)>, /* TxD2 */ 178 <RZA2_PINMUX(PORTE, 1, 3)>; /* RxD2 */ 179 }; 180 181 sdhi0_pins: sdhi0 { 182 pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */ 183 <RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */ 184 }; 185 186 sdhi1_pins: sdhi1 { 187 pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */ 188 <RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */ 189 }; 190 191 usb0_pins: usb0 { 192 pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */ 193 <RZA2_PINMUX(PORTC, 6, 1)>, /* VBUSEN0 */ 194 <RZA2_PINMUX(PORTC, 7, 1)>; /* OVRCUR0 */ 195 }; 196 197 usb1_pins: usb1 { 198 pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */ 199 <RZA2_PINMUX(PORTC, 5, 1)>; /* VBUSEN1 */ 200 }; 201}; 202 203/* RTC_X1 */ 204&rtc_x1_clk { 205 clock-frequency = <32768>; 206}; 207 208/* Serial Console */ 209&scif2 { 210 pinctrl-names = "default"; 211 pinctrl-0 = <&scif2_pins>; 212 213 status = "okay"; 214}; 215 216&sdhi0 { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&sdhi0_pins>; 219 bus-width = <4>; 220 status = "okay"; 221}; 222 223&sdhi1 { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&sdhi1_pins>; 226 bus-width = <4>; 227 status = "okay"; 228}; 229 230/* USB-0 as Host */ 231&usb2_phy0 { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&usb0_pins>; 234 dr_mode = "host"; /* Requires JP3 to be fitted */ 235 status = "okay"; 236}; 237 238/* USB-1 as Host */ 239&usb2_phy1 { 240 pinctrl-names = "default"; 241 pinctrl-0 = <&usb1_pins>; 242 dr_mode = "host"; 243 status = "okay"; 244}; 245 246/* USB_X1 */ 247&usb_x1_clk { 248 clock-frequency = <48000000>; 249}; 250