1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek USB3 xHCI Device Tree Bindings
9
10maintainers:
11  - Chunfeng Yun <chunfeng.yun@mediatek.com>
12
13allOf:
14  - $ref: "usb-xhci.yaml"
15
16description: |
17  There are two scenarios:
18  case 1: only supports xHCI driver;
19  case 2: supports dual-role mode, and the host is based on xHCI driver.
20
21properties:
22  # common properties for both case 1 and case 2
23  compatible:
24    items:
25      - enum:
26          - mediatek,mt2701-xhci
27          - mediatek,mt2712-xhci
28          - mediatek,mt7622-xhci
29          - mediatek,mt7623-xhci
30          - mediatek,mt7629-xhci
31          - mediatek,mt8173-xhci
32          - mediatek,mt8183-xhci
33          - mediatek,mt8186-xhci
34          - mediatek,mt8192-xhci
35          - mediatek,mt8195-xhci
36      - const: mediatek,mtk-xhci
37
38  reg:
39    minItems: 1
40    items:
41      - description: the registers of xHCI MAC
42      - description: the registers of IP Port Control
43
44  reg-names:
45    minItems: 1
46    items:
47      - const: mac
48      - const: ippc  # optional, only needed for case 1.
49
50  interrupts:
51    description:
52      use "interrupts-extended" when the interrupts are connected to the
53      separate interrupt controllers
54    minItems: 1
55    items:
56      - description: xHCI host controller interrupt
57      - description: optional, wakeup interrupt used to support runtime PM
58
59  interrupt-names:
60    minItems: 1
61    items:
62      - const: host
63      - const: wakeup
64
65  power-domains:
66    description: A phandle to USB power domain node to control USB's MTCMOS
67    maxItems: 1
68
69  clocks:
70    minItems: 1
71    items:
72      - description: Controller clock used by normal mode
73      - description: Reference clock used by low power mode etc
74      - description: Mcu bus clock for register access
75      - description: DMA bus clock for data transfer
76      - description: controller clock
77
78  clock-names:
79    minItems: 1
80    items:
81      - const: sys_ck  # required, the following ones are optional
82      - const: ref_ck
83      - const: mcu_ck
84      - const: dma_ck
85      - const: xhci_ck
86
87  assigned-clocks:
88    minItems: 1
89    maxItems: 5
90
91  assigned-clock-parents:
92    minItems: 1
93    maxItems: 5
94
95  phys:
96    description:
97      List of all PHYs used on this HCD, it's better to keep PHYs in order
98      as the hardware layout
99    minItems: 1
100    items:
101      - description: USB2/HS PHY    # required, others are optional
102      - description: USB3/SS(P) PHY
103      - description: USB2/HS PHY
104      - description: USB3/SS(P) PHY
105      - description: USB2/HS PHY
106      - description: USB3/SS(P) PHY
107      - description: USB2/HS PHY
108      - description: USB3/SS(P) PHY
109      - description: USB2/HS PHY
110
111  vusb33-supply:
112    description: Regulator of USB AVDD3.3v
113
114  vbus-supply:
115    description: Regulator of USB VBUS5v
116
117  usb3-lpm-capable: true
118
119  usb2-lpm-disable: true
120
121  imod-interval-ns:
122    description:
123      Interrupt moderation interval value, it is 8 times as much as that
124      defined in the xHCI spec on MTK's controller.
125    default: 5000
126
127  # the following properties are only used for case 1
128  wakeup-source:
129    description: enable USB remote wakeup, see power/wakeup-source.txt
130    type: boolean
131
132  mediatek,syscon-wakeup:
133    $ref: /schemas/types.yaml#/definitions/phandle-array
134    maxItems: 1
135    description:
136      A phandle to syscon used to access the register of the USB wakeup glue
137      layer between xHCI and SPM, the field should always be 3 cells long.
138    items:
139      items:
140        - description:
141            The first cell represents a phandle to syscon
142        - description:
143            The second cell represents the register base address of the glue
144            layer in syscon
145        - description: |
146            The third cell represents the hardware version of the glue layer,
147            1 - used by mt8173 etc, revision 1 without following IPM rule;
148            2 - used by mt2712 etc, revision 2 following IPM rule;
149            101 - used by mt8183, specific 1.01;
150            102 - used by mt8192, specific 1.02;
151            103 - used by mt8195, IP0, specific 1.03;
152            104 - used by mt8195, IP1, specific 1.04;
153            105 - used by mt8195, IP2, specific 1.05;
154            106 - used by mt8195, IP3, specific 1.06;
155          enum: [1, 2, 101, 102, 103, 104, 105, 106]
156
157  mediatek,u3p-dis-msk:
158    $ref: /schemas/types.yaml#/definitions/uint32
159    description: The mask to disable u3ports, bit0 for u3port0,
160      bit1 for u3port1, ... etc
161
162  mediatek,u2p-dis-msk:
163    $ref: /schemas/types.yaml#/definitions/uint32
164    description: The mask to disable u2ports, bit0 for u2port0,
165      bit1 for u2port1, ... etc
166
167  "#address-cells":
168    const: 1
169
170  "#size-cells":
171    const: 0
172
173patternProperties:
174  "@[0-9a-f]{1}$":
175    type: object
176    description: The hard wired USB devices.
177
178dependencies:
179  wakeup-source: [ 'mediatek,syscon-wakeup' ]
180
181required:
182  - compatible
183  - reg
184  - reg-names
185  - interrupts
186  - clocks
187  - clock-names
188
189additionalProperties: false
190
191examples:
192  - |
193    #include <dt-bindings/clock/mt8173-clk.h>
194    #include <dt-bindings/interrupt-controller/arm-gic.h>
195    #include <dt-bindings/interrupt-controller/irq.h>
196    #include <dt-bindings/phy/phy.h>
197    #include <dt-bindings/power/mt8173-power.h>
198
199    usb@11270000 {
200        compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
201        reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
202        reg-names = "mac", "ippc";
203        interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
204        power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
205        clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
206        clock-names = "sys_ck", "ref_ck";
207        phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
208        vusb33-supply = <&mt6397_vusb_reg>;
209        vbus-supply = <&usb_p1_vbus>;
210        imod-interval-ns = <10000>;
211        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
212        wakeup-source;
213        usb3-lpm-capable;
214    };
215...
216