1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 BayLibre, SAS 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Amlogic Meson G12A DWC3 USB SoC Controller Glue 9 10maintainers: 11 - Neil Armstrong <narmstrong@baylibre.com> 12 13description: | 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 16 only. 17 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 19 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 21 22 The DWC3 Glue controls the PHY routing and power, an interrupt line is 23 connected to the Glue to serve as OTG ID change detection. 24 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in 26 host-only mode. 27 28 The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY. 29 30properties: 31 compatible: 32 enum: 33 - amlogic,meson-gxl-usb-ctrl 34 - amlogic,meson-gxm-usb-ctrl 35 - amlogic,meson-axg-usb-ctrl 36 - amlogic,meson-g12a-usb-ctrl 37 - amlogic,meson-a1-usb-ctrl 38 39 ranges: true 40 41 "#address-cells": 42 enum: [ 1, 2 ] 43 44 "#size-cells": 45 enum: [ 1, 2 ] 46 47 clocks: 48 minItems: 1 49 maxItems: 3 50 51 clock-names: 52 minItems: 1 53 maxItems: 3 54 55 resets: 56 minItems: 1 57 58 reg: 59 maxItems: 1 60 61 interrupts: 62 maxItems: 1 63 64 phy-names: 65 minItems: 1 66 maxItems: 3 67 68 phys: 69 minItems: 1 70 maxItems: 3 71 72 dr_mode: true 73 74 power-domains: 75 maxItems: 1 76 77 vbus-supply: 78 description: VBUS power supply when used in OTG switchable mode 79 80patternProperties: 81 "^usb@[0-9a-f]+$": 82 oneOf: 83 - $ref: dwc2.yaml# 84 - $ref: snps,dwc3.yaml# 85 86additionalProperties: false 87 88required: 89 - compatible 90 - "#address-cells" 91 - "#size-cells" 92 - ranges 93 - clocks 94 - resets 95 - reg 96 - interrupts 97 - phy-names 98 - phys 99 - dr_mode 100 101allOf: 102 - if: 103 properties: 104 compatible: 105 enum: 106 - amlogic,meson-g12a-usb-ctrl 107 108 then: 109 properties: 110 phy-names: 111 items: 112 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 113 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 114 - const: usb3-phy0 # USB3 PHY if USB3_0 is used 115 - if: 116 properties: 117 compatible: 118 enum: 119 - amlogic,meson-gxl-usb-ctrl 120 121 then: 122 properties: 123 clocks: 124 minItems: 2 125 clock-names: 126 items: 127 - const: usb_ctrl 128 - const: ddr 129 phy-names: 130 items: 131 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 132 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 133 required: 134 - clock-names 135 - if: 136 properties: 137 compatible: 138 enum: 139 - amlogic,meson-gxm-usb-ctrl 140 141 then: 142 properties: 143 clocks: 144 minItems: 2 145 clock-names: 146 items: 147 - const: usb_ctrl 148 - const: ddr 149 phy-names: 150 items: 151 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 152 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 153 - const: usb2-phy2 # USB2 PHY2 if USBOTG_C port is used 154 155 required: 156 - clock-names 157 - if: 158 properties: 159 compatible: 160 enum: 161 - amlogic,meson-axg-usb-ctrl 162 163 then: 164 properties: 165 phy-names: 166 items: 167 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 168 clocks: 169 minItems: 2 170 clock-names: 171 items: 172 - const: usb_ctrl 173 - const: ddr 174 required: 175 - clock-names 176 - if: 177 properties: 178 compatible: 179 enum: 180 - amlogic,meson-a1-usb-ctrl 181 182 then: 183 properties: 184 phy-names: 185 items: 186 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 187 clocks: 188 minItems: 3 189 clock-names: 190 items: 191 - const: usb_ctrl 192 - const: usb_bus 193 - const: xtal_usb_ctrl 194 required: 195 - clock-names 196 197examples: 198 - | 199 usb: usb@ffe09000 { 200 compatible = "amlogic,meson-g12a-usb-ctrl"; 201 reg = <0xffe09000 0xa0>; 202 interrupts = <16>; 203 #address-cells = <1>; 204 #size-cells = <1>; 205 ranges; 206 207 clocks = <&clkc_usb>; 208 resets = <&reset_usb>; 209 210 dr_mode = "otg"; 211 212 phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>; 213 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; 214 215 dwc2: usb@ff400000 { 216 compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 217 reg = <0xff400000 0x40000>; 218 interrupts = <31>; 219 clocks = <&clkc_usb1>; 220 clock-names = "otg"; 221 phys = <&usb2_phy1>; 222 dr_mode = "peripheral"; 223 g-rx-fifo-size = <192>; 224 g-np-tx-fifo-size = <128>; 225 g-tx-fifo-size = <128 128 16 16 16>; 226 }; 227 228 dwc3: usb@ff500000 { 229 compatible = "snps,dwc3"; 230 reg = <0xff500000 0x100000>; 231 interrupts = <30>; 232 dr_mode = "host"; 233 snps,dis_u2_susphy_quirk; 234 snps,quirk-frame-length-adjustment = <0x20>; 235 }; 236 }; 237