1=============
2Current State
3=============
4
5The following describes the current state of the NetWinder's floating point
6emulator.
7
8In the following nomenclature is used to describe the floating point
9instructions.  It follows the conventions in the ARM manual.
10
11::
12
13  <S|D|E> = <single|double|extended>, no default
14  {P|M|Z} = {round to +infinity,round to -infinity,round to zero},
15            default = round to nearest
16
17Note: items enclosed in {} are optional.
18
19Floating Point Coprocessor Data Transfer Instructions (CPDT)
20------------------------------------------------------------
21
22LDF/STF - load and store floating
23
24<LDF|STF>{cond}<S|D|E> Fd, Rn
25<LDF|STF>{cond}<S|D|E> Fd, [Rn, #<expression>]{!}
26<LDF|STF>{cond}<S|D|E> Fd, [Rn], #<expression>
27
28These instructions are fully implemented.
29
30LFM/SFM - load and store multiple floating
31
32Form 1 syntax:
33<LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn]
34<LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn, #<expression>]{!}
35<LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn], #<expression>
36
37Form 2 syntax:
38<LFM|SFM>{cond}<FD,EA> Fd, <count>, [Rn]{!}
39
40These instructions are fully implemented.  They store/load three words
41for each floating point register into the memory location given in the
42instruction.  The format in memory is unlikely to be compatible with
43other implementations, in particular the actual hardware.  Specific
44mention of this is made in the ARM manuals.
45
46Floating Point Coprocessor Register Transfer Instructions (CPRT)
47----------------------------------------------------------------
48
49Conversions, read/write status/control register instructions
50
51FLT{cond}<S,D,E>{P,M,Z} Fn, Rd          Convert integer to floating point
52FIX{cond}{P,M,Z} Rd, Fn                 Convert floating point to integer
53WFS{cond} Rd                            Write floating point status register
54RFS{cond} Rd                            Read floating point status register
55WFC{cond} Rd                            Write floating point control register
56RFC{cond} Rd                            Read floating point control register
57
58FLT/FIX are fully implemented.
59
60RFS/WFS are fully implemented.
61
62RFC/WFC are fully implemented.  RFC/WFC are supervisor only instructions, and
63presently check the CPU mode, and do an invalid instruction trap if not called
64from supervisor mode.
65
66Compare instructions
67
68CMF{cond} Fn, Fm        Compare floating
69CMFE{cond} Fn, Fm       Compare floating with exception
70CNF{cond} Fn, Fm        Compare negated floating
71CNFE{cond} Fn, Fm       Compare negated floating with exception
72
73These are fully implemented.
74
75Floating Point Coprocessor Data Instructions (CPDT)
76---------------------------------------------------
77
78Dyadic operations:
79
80ADF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - add
81SUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - subtract
82RSF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse subtract
83MUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - multiply
84DVF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - divide
85RDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse divide
86
87These are fully implemented.
88
89FML{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast multiply
90FDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast divide
91FRD{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast reverse divide
92
93These are fully implemented as well.  They use the same algorithm as the
94non-fast versions.  Hence, in this implementation their performance is
95equivalent to the MUF/DVF/RDV instructions.  This is acceptable according
96to the ARM manual.  The manual notes these are defined only for single
97operands, on the actual FPA11 hardware they do not work for double or
98extended precision operands.  The emulator currently does not check
99the requested permissions conditions, and performs the requested operation.
100
101RMF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - IEEE remainder
102
103This is fully implemented.
104
105Monadic operations:
106
107MVF{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - move
108MNF{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - move negated
109
110These are fully implemented.
111
112ABS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - absolute value
113SQT{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - square root
114RND{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - round
115
116These are fully implemented.
117
118URD{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - unnormalized round
119NRM{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - normalize
120
121These are implemented.  URD is implemented using the same code as the RND
122instruction.  Since URD cannot return a unnormalized number, NRM becomes
123a NOP.
124
125Library calls:
126
127POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power
128RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power
129POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2)
130
131LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10
132LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e
133EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent
134SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine
135COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine
136TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent
137ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine
138ACS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arccosine
139ATN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arctangent
140
141These are not implemented.  They are not currently issued by the compiler,
142and are handled by routines in libc.  These are not implemented by the FPA11
143hardware, but are handled by the floating point support code.  They should
144be implemented in future versions.
145
146Signalling:
147
148Signals are implemented.  However current ELF kernels produced by Rebel.com
149have a bug in them that prevents the module from generating a SIGFPE.  This
150is caused by a failure to alias fp_current to the kernel variable
151current_set[0] correctly.
152
153The kernel provided with this distribution (vmlinux-nwfpe-0.93) contains
154a fix for this problem and also incorporates the current version of the
155emulator directly.  It is possible to run with no floating point module
156loaded with this kernel.  It is provided as a demonstration of the
157technology and for those who want to do floating point work that depends
158on signals.  It is not strictly necessary to use the module.
159
160A module (either the one provided by Russell King, or the one in this
161distribution) can be loaded to replace the functionality of the emulator
162built into the kernel.
163