1 /*
2 * uda134x.c -- UDA134X ALSA SoC Codec driver
3 *
4 * Modifications by Christian Pellegrin <chripell@evolware.org>
5 *
6 * Copyright 2007 Dension Audio Systems Ltd.
7 * Author: Zoltan Devai
8 *
9 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/module.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23
24 #include <sound/uda134x.h>
25 #include <sound/l3.h>
26
27 #include "uda134x.h"
28
29
30 #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
31 #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
32 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
33
34 struct uda134x_priv {
35 int sysclk;
36 int dai_fmt;
37
38 struct snd_pcm_substream *master_substream;
39 struct snd_pcm_substream *slave_substream;
40 };
41
42 /* In-data addresses are hard-coded into the reg-cache values */
43 static const char uda134x_reg[UDA134X_REGS_NUM] = {
44 /* Extended address registers */
45 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
46 /* Status, data regs */
47 0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00,
48 };
49
50 /*
51 * The codec has no support for reading its registers except for peak level...
52 */
uda134x_read_reg_cache(struct snd_soc_codec * codec,unsigned int reg)53 static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
54 unsigned int reg)
55 {
56 u8 *cache = codec->reg_cache;
57
58 if (reg >= UDA134X_REGS_NUM)
59 return -1;
60 return cache[reg];
61 }
62
63 /*
64 * Write the register cache
65 */
uda134x_write_reg_cache(struct snd_soc_codec * codec,u8 reg,unsigned int value)66 static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
67 u8 reg, unsigned int value)
68 {
69 u8 *cache = codec->reg_cache;
70
71 if (reg >= UDA134X_REGS_NUM)
72 return;
73 cache[reg] = value;
74 }
75
76 /*
77 * Write to the uda134x registers
78 *
79 */
uda134x_write(struct snd_soc_codec * codec,unsigned int reg,unsigned int value)80 static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
81 unsigned int value)
82 {
83 int ret;
84 u8 addr;
85 u8 data = value;
86 struct uda134x_platform_data *pd = codec->control_data;
87
88 pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
89
90 if (reg >= UDA134X_REGS_NUM) {
91 printk(KERN_ERR "%s unknown register: reg: %u",
92 __func__, reg);
93 return -EINVAL;
94 }
95
96 uda134x_write_reg_cache(codec, reg, value);
97
98 switch (reg) {
99 case UDA134X_STATUS0:
100 case UDA134X_STATUS1:
101 addr = UDA134X_STATUS_ADDR;
102 break;
103 case UDA134X_DATA000:
104 case UDA134X_DATA001:
105 case UDA134X_DATA010:
106 case UDA134X_DATA011:
107 addr = UDA134X_DATA0_ADDR;
108 break;
109 case UDA134X_DATA1:
110 addr = UDA134X_DATA1_ADDR;
111 break;
112 default:
113 /* It's an extended address register */
114 addr = (reg | UDA134X_EXTADDR_PREFIX);
115
116 ret = l3_write(&pd->l3,
117 UDA134X_DATA0_ADDR, &addr, 1);
118 if (ret != 1)
119 return -EIO;
120
121 addr = UDA134X_DATA0_ADDR;
122 data = (value | UDA134X_EXTDATA_PREFIX);
123 break;
124 }
125
126 ret = l3_write(&pd->l3,
127 addr, &data, 1);
128 if (ret != 1)
129 return -EIO;
130
131 return 0;
132 }
133
uda134x_reset(struct snd_soc_codec * codec)134 static inline void uda134x_reset(struct snd_soc_codec *codec)
135 {
136 u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
137 uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
138 msleep(1);
139 uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
140 }
141
uda134x_mute(struct snd_soc_dai * dai,int mute)142 static int uda134x_mute(struct snd_soc_dai *dai, int mute)
143 {
144 struct snd_soc_codec *codec = dai->codec;
145 u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
146
147 pr_debug("%s mute: %d\n", __func__, mute);
148
149 if (mute)
150 mute_reg |= (1<<2);
151 else
152 mute_reg &= ~(1<<2);
153
154 uda134x_write(codec, UDA134X_DATA010, mute_reg);
155
156 return 0;
157 }
158
uda134x_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)159 static int uda134x_startup(struct snd_pcm_substream *substream,
160 struct snd_soc_dai *dai)
161 {
162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
163 struct snd_soc_codec *codec =rtd->codec;
164 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
165 struct snd_pcm_runtime *master_runtime;
166
167 if (uda134x->master_substream) {
168 master_runtime = uda134x->master_substream->runtime;
169
170 pr_debug("%s constraining to %d bits at %d\n", __func__,
171 master_runtime->sample_bits,
172 master_runtime->rate);
173
174 snd_pcm_hw_constraint_minmax(substream->runtime,
175 SNDRV_PCM_HW_PARAM_RATE,
176 master_runtime->rate,
177 master_runtime->rate);
178
179 snd_pcm_hw_constraint_minmax(substream->runtime,
180 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
181 master_runtime->sample_bits,
182 master_runtime->sample_bits);
183
184 uda134x->slave_substream = substream;
185 } else
186 uda134x->master_substream = substream;
187
188 return 0;
189 }
190
uda134x_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)191 static void uda134x_shutdown(struct snd_pcm_substream *substream,
192 struct snd_soc_dai *dai)
193 {
194 struct snd_soc_pcm_runtime *rtd = substream->private_data;
195 struct snd_soc_codec *codec = rtd->codec;
196 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
197
198 if (uda134x->master_substream == substream)
199 uda134x->master_substream = uda134x->slave_substream;
200
201 uda134x->slave_substream = NULL;
202 }
203
uda134x_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)204 static int uda134x_hw_params(struct snd_pcm_substream *substream,
205 struct snd_pcm_hw_params *params,
206 struct snd_soc_dai *dai)
207 {
208 struct snd_soc_pcm_runtime *rtd = substream->private_data;
209 struct snd_soc_codec *codec = rtd->codec;
210 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
211 u8 hw_params;
212
213 if (substream == uda134x->slave_substream) {
214 pr_debug("%s ignoring hw_params for slave substream\n",
215 __func__);
216 return 0;
217 }
218
219 hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
220 hw_params &= STATUS0_SYSCLK_MASK;
221 hw_params &= STATUS0_DAIFMT_MASK;
222
223 pr_debug("%s sysclk: %d, rate:%d\n", __func__,
224 uda134x->sysclk, params_rate(params));
225
226 /* set SYSCLK / fs ratio */
227 switch (uda134x->sysclk / params_rate(params)) {
228 case 512:
229 break;
230 case 384:
231 hw_params |= (1<<4);
232 break;
233 case 256:
234 hw_params |= (1<<5);
235 break;
236 default:
237 printk(KERN_ERR "%s unsupported fs\n", __func__);
238 return -EINVAL;
239 }
240
241 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
242 uda134x->dai_fmt, params_format(params));
243
244 /* set DAI format and word length */
245 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
246 case SND_SOC_DAIFMT_I2S:
247 break;
248 case SND_SOC_DAIFMT_RIGHT_J:
249 switch (params_format(params)) {
250 case SNDRV_PCM_FORMAT_S16_LE:
251 hw_params |= (1<<1);
252 break;
253 case SNDRV_PCM_FORMAT_S18_3LE:
254 hw_params |= (1<<2);
255 break;
256 case SNDRV_PCM_FORMAT_S20_3LE:
257 hw_params |= ((1<<2) | (1<<1));
258 break;
259 default:
260 printk(KERN_ERR "%s unsupported format (right)\n",
261 __func__);
262 return -EINVAL;
263 }
264 break;
265 case SND_SOC_DAIFMT_LEFT_J:
266 hw_params |= (1<<3);
267 break;
268 default:
269 printk(KERN_ERR "%s unsupported format\n", __func__);
270 return -EINVAL;
271 }
272
273 uda134x_write(codec, UDA134X_STATUS0, hw_params);
274
275 return 0;
276 }
277
uda134x_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)278 static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
279 int clk_id, unsigned int freq, int dir)
280 {
281 struct snd_soc_codec *codec = codec_dai->codec;
282 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
283
284 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
285 clk_id, freq, dir);
286
287 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
288 because the codec is slave. Of course limitations of the clock
289 master (the IIS controller) apply.
290 We'll error out on set_hw_params if it's not OK */
291 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
292 uda134x->sysclk = freq;
293 return 0;
294 }
295
296 printk(KERN_ERR "%s unsupported sysclk\n", __func__);
297 return -EINVAL;
298 }
299
uda134x_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)300 static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
301 unsigned int fmt)
302 {
303 struct snd_soc_codec *codec = codec_dai->codec;
304 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
305
306 pr_debug("%s fmt: %08X\n", __func__, fmt);
307
308 /* codec supports only full slave mode */
309 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
310 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
311 return -EINVAL;
312 }
313
314 /* no support for clock inversion */
315 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
316 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
317 return -EINVAL;
318 }
319
320 /* We can't setup DAI format here as it depends on the word bit num */
321 /* so let's just store the value for later */
322 uda134x->dai_fmt = fmt;
323
324 return 0;
325 }
326
uda134x_set_bias_level(struct snd_soc_codec * codec,enum snd_soc_bias_level level)327 static int uda134x_set_bias_level(struct snd_soc_codec *codec,
328 enum snd_soc_bias_level level)
329 {
330 u8 reg;
331 struct uda134x_platform_data *pd = codec->control_data;
332 int i;
333 u8 *cache = codec->reg_cache;
334
335 pr_debug("%s bias level %d\n", __func__, level);
336
337 switch (level) {
338 case SND_SOC_BIAS_ON:
339 /* ADC, DAC on */
340 switch (pd->model) {
341 case UDA134X_UDA1340:
342 case UDA134X_UDA1344:
343 case UDA134X_UDA1345:
344 reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
345 uda134x_write(codec, UDA134X_DATA011, reg | 0x03);
346 break;
347 case UDA134X_UDA1341:
348 reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
349 uda134x_write(codec, UDA134X_STATUS1, reg | 0x03);
350 break;
351 default:
352 printk(KERN_ERR "UDA134X SoC codec: "
353 "unsupported model %d\n", pd->model);
354 return -EINVAL;
355 }
356 break;
357 case SND_SOC_BIAS_PREPARE:
358 /* power on */
359 if (pd->power) {
360 pd->power(1);
361 /* Sync reg_cache with the hardware */
362 for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
363 codec->driver->write(codec, i, *cache++);
364 }
365 break;
366 case SND_SOC_BIAS_STANDBY:
367 /* ADC, DAC power off */
368 switch (pd->model) {
369 case UDA134X_UDA1340:
370 case UDA134X_UDA1344:
371 case UDA134X_UDA1345:
372 reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
373 uda134x_write(codec, UDA134X_DATA011, reg & ~(0x03));
374 break;
375 case UDA134X_UDA1341:
376 reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
377 uda134x_write(codec, UDA134X_STATUS1, reg & ~(0x03));
378 break;
379 default:
380 printk(KERN_ERR "UDA134X SoC codec: "
381 "unsupported model %d\n", pd->model);
382 return -EINVAL;
383 }
384 break;
385 case SND_SOC_BIAS_OFF:
386 /* power off */
387 if (pd->power)
388 pd->power(0);
389 break;
390 }
391 codec->dapm.bias_level = level;
392 return 0;
393 }
394
395 static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
396 "Minimum2", "Maximum"};
397 static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
398 static const char *uda134x_mixmode[] = {"Differential", "Analog1",
399 "Analog2", "Both"};
400
401 static const struct soc_enum uda134x_mixer_enum[] = {
402 SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
403 SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
404 SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
405 };
406
407 static const struct snd_kcontrol_new uda1341_snd_controls[] = {
408 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
409 SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
410 SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
411 SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
412
413 SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
414 SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
415
416 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
417 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
418
419 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
420 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
421 SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
422
423 SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
424 SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
425 SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
426
427 SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
428 SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
429 SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
430 SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
431 SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
432 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
433 };
434
435 static const struct snd_kcontrol_new uda1340_snd_controls[] = {
436 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
437
438 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
439 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
440
441 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
442 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
443
444 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
445 };
446
447 static const struct snd_kcontrol_new uda1345_snd_controls[] = {
448 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
449
450 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
451
452 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
453 };
454
455 static const struct snd_soc_dai_ops uda134x_dai_ops = {
456 .startup = uda134x_startup,
457 .shutdown = uda134x_shutdown,
458 .hw_params = uda134x_hw_params,
459 .digital_mute = uda134x_mute,
460 .set_sysclk = uda134x_set_dai_sysclk,
461 .set_fmt = uda134x_set_dai_fmt,
462 };
463
464 static struct snd_soc_dai_driver uda134x_dai = {
465 .name = "uda134x-hifi",
466 /* playback capabilities */
467 .playback = {
468 .stream_name = "Playback",
469 .channels_min = 1,
470 .channels_max = 2,
471 .rates = UDA134X_RATES,
472 .formats = UDA134X_FORMATS,
473 },
474 /* capture capabilities */
475 .capture = {
476 .stream_name = "Capture",
477 .channels_min = 1,
478 .channels_max = 2,
479 .rates = UDA134X_RATES,
480 .formats = UDA134X_FORMATS,
481 },
482 /* pcm operations */
483 .ops = &uda134x_dai_ops,
484 };
485
uda134x_soc_probe(struct snd_soc_codec * codec)486 static int uda134x_soc_probe(struct snd_soc_codec *codec)
487 {
488 struct uda134x_priv *uda134x;
489 struct uda134x_platform_data *pd = codec->card->dev->platform_data;
490
491 int ret;
492
493 printk(KERN_INFO "UDA134X SoC Audio Codec\n");
494
495 if (!pd) {
496 printk(KERN_ERR "UDA134X SoC codec: "
497 "missing L3 bitbang function\n");
498 return -ENODEV;
499 }
500
501 switch (pd->model) {
502 case UDA134X_UDA1340:
503 case UDA134X_UDA1341:
504 case UDA134X_UDA1344:
505 case UDA134X_UDA1345:
506 break;
507 default:
508 printk(KERN_ERR "UDA134X SoC codec: "
509 "unsupported model %d\n",
510 pd->model);
511 return -EINVAL;
512 }
513
514 uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
515 if (uda134x == NULL)
516 return -ENOMEM;
517 snd_soc_codec_set_drvdata(codec, uda134x);
518
519 codec->control_data = pd;
520
521 if (pd->power)
522 pd->power(1);
523
524 uda134x_reset(codec);
525
526 if (pd->is_powered_on_standby)
527 uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
528 else
529 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
530
531 switch (pd->model) {
532 case UDA134X_UDA1340:
533 case UDA134X_UDA1344:
534 ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls,
535 ARRAY_SIZE(uda1340_snd_controls));
536 break;
537 case UDA134X_UDA1341:
538 ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls,
539 ARRAY_SIZE(uda1341_snd_controls));
540 break;
541 case UDA134X_UDA1345:
542 ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls,
543 ARRAY_SIZE(uda1345_snd_controls));
544 break;
545 default:
546 printk(KERN_ERR "%s unknown codec type: %d",
547 __func__, pd->model);
548 kfree(uda134x);
549 return -EINVAL;
550 }
551
552 if (ret < 0) {
553 printk(KERN_ERR "UDA134X: failed to register controls\n");
554 kfree(uda134x);
555 return ret;
556 }
557
558 return 0;
559 }
560
561 /* power down chip */
uda134x_soc_remove(struct snd_soc_codec * codec)562 static int uda134x_soc_remove(struct snd_soc_codec *codec)
563 {
564 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
565
566 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
567 uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
568
569 kfree(uda134x);
570 return 0;
571 }
572
573 #if defined(CONFIG_PM)
uda134x_soc_suspend(struct snd_soc_codec * codec)574 static int uda134x_soc_suspend(struct snd_soc_codec *codec)
575 {
576 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
577 uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
578 return 0;
579 }
580
uda134x_soc_resume(struct snd_soc_codec * codec)581 static int uda134x_soc_resume(struct snd_soc_codec *codec)
582 {
583 uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
584 uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
585 return 0;
586 }
587 #else
588 #define uda134x_soc_suspend NULL
589 #define uda134x_soc_resume NULL
590 #endif /* CONFIG_PM */
591
592 static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
593 .probe = uda134x_soc_probe,
594 .remove = uda134x_soc_remove,
595 .suspend = uda134x_soc_suspend,
596 .resume = uda134x_soc_resume,
597 .reg_cache_size = sizeof(uda134x_reg),
598 .reg_word_size = sizeof(u8),
599 .reg_cache_default = uda134x_reg,
600 .reg_cache_step = 1,
601 .read = uda134x_read_reg_cache,
602 .write = uda134x_write,
603 .set_bias_level = uda134x_set_bias_level,
604 };
605
uda134x_codec_probe(struct platform_device * pdev)606 static int __devinit uda134x_codec_probe(struct platform_device *pdev)
607 {
608 return snd_soc_register_codec(&pdev->dev,
609 &soc_codec_dev_uda134x, &uda134x_dai, 1);
610 }
611
uda134x_codec_remove(struct platform_device * pdev)612 static int __devexit uda134x_codec_remove(struct platform_device *pdev)
613 {
614 snd_soc_unregister_codec(&pdev->dev);
615 return 0;
616 }
617
618 static struct platform_driver uda134x_codec_driver = {
619 .driver = {
620 .name = "uda134x-codec",
621 .owner = THIS_MODULE,
622 },
623 .probe = uda134x_codec_probe,
624 .remove = __devexit_p(uda134x_codec_remove),
625 };
626
627 module_platform_driver(uda134x_codec_driver);
628
629 MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
630 MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
631 MODULE_LICENSE("GPL");
632