1 /* 2 * linux/drivers/video/omap2/dss/dss_features.h 3 * 4 * Copyright (C) 2010 Texas Instruments 5 * Author: Archit Taneja <archit@ti.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published by 9 * the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef __OMAP2_DSS_FEATURES_H 21 #define __OMAP2_DSS_FEATURES_H 22 23 #if defined(CONFIG_OMAP4_DSS_HDMI) 24 #include "ti_hdmi.h" 25 #endif 26 27 #define MAX_DSS_MANAGERS 3 28 #define MAX_DSS_OVERLAYS 4 29 #define MAX_DSS_LCD_MANAGERS 2 30 #define MAX_NUM_DSI 2 31 32 /* DSS has feature id */ 33 enum dss_feat_id { 34 FEAT_LCDENABLEPOL, 35 FEAT_LCDENABLESIGNAL, 36 FEAT_PCKFREEENABLE, 37 FEAT_FUNCGATED, 38 FEAT_MGR_LCD2, 39 FEAT_LINEBUFFERSPLIT, 40 FEAT_ROWREPEATENABLE, 41 FEAT_RESIZECONF, 42 /* Independent core clk divider */ 43 FEAT_CORE_CLK_DIV, 44 FEAT_LCD_CLK_SRC, 45 /* DSI-PLL power command 0x3 is not working */ 46 FEAT_DSI_PLL_PWR_BUG, 47 FEAT_DSI_PLL_FREQSEL, 48 FEAT_DSI_DCS_CMD_CONFIG_VC, 49 FEAT_DSI_VC_OCP_WIDTH, 50 FEAT_DSI_REVERSE_TXCLKESC, 51 FEAT_DSI_GNQ, 52 FEAT_HDMI_CTS_SWMODE, 53 FEAT_HDMI_AUDIO_USE_MCLK, 54 FEAT_HANDLE_UV_SEPARATE, 55 FEAT_ATTR2, 56 FEAT_VENC_REQUIRES_TV_DAC_CLK, 57 FEAT_CPR, 58 FEAT_PRELOAD, 59 FEAT_FIR_COEF_V, 60 FEAT_ALPHA_FIXED_ZORDER, 61 FEAT_ALPHA_FREE_ZORDER, 62 FEAT_FIFO_MERGE, 63 /* An unknown HW bug causing the normal FIFO thresholds not to work */ 64 FEAT_OMAP3_DSI_FIFO_BUG, 65 }; 66 67 /* DSS register field id */ 68 enum dss_feat_reg_field { 69 FEAT_REG_FIRHINC, 70 FEAT_REG_FIRVINC, 71 FEAT_REG_FIFOHIGHTHRESHOLD, 72 FEAT_REG_FIFOLOWTHRESHOLD, 73 FEAT_REG_FIFOSIZE, 74 FEAT_REG_HORIZONTALACCU, 75 FEAT_REG_VERTICALACCU, 76 FEAT_REG_DISPC_CLK_SWITCH, 77 FEAT_REG_DSIPLL_REGN, 78 FEAT_REG_DSIPLL_REGM, 79 FEAT_REG_DSIPLL_REGM_DISPC, 80 FEAT_REG_DSIPLL_REGM_DSI, 81 }; 82 83 enum dss_range_param { 84 FEAT_PARAM_DSS_FCK, 85 FEAT_PARAM_DSS_PCD, 86 FEAT_PARAM_DSIPLL_REGN, 87 FEAT_PARAM_DSIPLL_REGM, 88 FEAT_PARAM_DSIPLL_REGM_DISPC, 89 FEAT_PARAM_DSIPLL_REGM_DSI, 90 FEAT_PARAM_DSIPLL_FINT, 91 FEAT_PARAM_DSIPLL_LPDIV, 92 FEAT_PARAM_DOWNSCALE, 93 FEAT_PARAM_LINEWIDTH, 94 }; 95 96 /* DSS Feature Functions */ 97 int dss_feat_get_num_mgrs(void); 98 int dss_feat_get_num_ovls(void); 99 unsigned long dss_feat_get_param_min(enum dss_range_param param); 100 unsigned long dss_feat_get_param_max(enum dss_range_param param); 101 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); 102 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); 103 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); 104 bool dss_feat_color_mode_supported(enum omap_plane plane, 105 enum omap_color_mode color_mode); 106 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id); 107 108 u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ 109 u32 dss_feat_get_burst_size_unit(void); /* in bytes */ 110 111 bool dss_has_feature(enum dss_feat_id id); 112 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); 113 void dss_features_init(void); 114 #if defined(CONFIG_OMAP4_DSS_HDMI) 115 void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data); 116 #endif 117 #endif 118