1 /*
2  * linux/drivers/usb/gadget/s3c2410_udc.c
3  *
4  * Samsung S3C24xx series on-chip full speed USB device controllers
5  *
6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7  *	Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/timer.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/gpio.h>
29 #include <linux/prefetch.h>
30 
31 #include <linux/debugfs.h>
32 #include <linux/seq_file.h>
33 
34 #include <linux/usb.h>
35 #include <linux/usb/gadget.h>
36 
37 #include <asm/byteorder.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 #include <asm/unaligned.h>
41 #include <mach/irqs.h>
42 
43 #include <mach/hardware.h>
44 
45 #include <plat/regs-udc.h>
46 #include <plat/udc.h>
47 
48 
49 #include "s3c2410_udc.h"
50 
51 #define DRIVER_DESC	"S3C2410 USB Device Controller Gadget"
52 #define DRIVER_VERSION	"29 Apr 2007"
53 #define DRIVER_AUTHOR	"Herbert Pötzl <herbert@13thfloor.at>, " \
54 			"Arnaud Patard <arnaud.patard@rtp-net.org>"
55 
56 static const char		gadget_name[] = "s3c2410_udc";
57 static const char		driver_desc[] = DRIVER_DESC;
58 
59 static struct s3c2410_udc	*the_controller;
60 static struct clk		*udc_clock;
61 static struct clk		*usb_bus_clock;
62 static void __iomem		*base_addr;
63 static u64			rsrc_start;
64 static u64			rsrc_len;
65 static struct dentry		*s3c2410_udc_debugfs_root;
66 
udc_read(u32 reg)67 static inline u32 udc_read(u32 reg)
68 {
69 	return readb(base_addr + reg);
70 }
71 
udc_write(u32 value,u32 reg)72 static inline void udc_write(u32 value, u32 reg)
73 {
74 	writeb(value, base_addr + reg);
75 }
76 
udc_writeb(void __iomem * base,u32 value,u32 reg)77 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
78 {
79 	writeb(value, base + reg);
80 }
81 
82 static struct s3c2410_udc_mach_info *udc_info;
83 
84 /*************************** DEBUG FUNCTION ***************************/
85 #define DEBUG_NORMAL	1
86 #define DEBUG_VERBOSE	2
87 
88 #ifdef CONFIG_USB_S3C2410_DEBUG
89 #define USB_S3C2410_DEBUG_LEVEL 0
90 
91 static uint32_t s3c2410_ticks = 0;
92 
dprintk(int level,const char * fmt,...)93 static int dprintk(int level, const char *fmt, ...)
94 {
95 	static char printk_buf[1024];
96 	static long prevticks;
97 	static int invocation;
98 	va_list args;
99 	int len;
100 
101 	if (level > USB_S3C2410_DEBUG_LEVEL)
102 		return 0;
103 
104 	if (s3c2410_ticks != prevticks) {
105 		prevticks = s3c2410_ticks;
106 		invocation = 0;
107 	}
108 
109 	len = scnprintf(printk_buf,
110 			sizeof(printk_buf), "%1lu.%02d USB: ",
111 			prevticks, invocation++);
112 
113 	va_start(args, fmt);
114 	len = vscnprintf(printk_buf+len,
115 			sizeof(printk_buf)-len, fmt, args);
116 	va_end(args);
117 
118 	return printk(KERN_DEBUG "%s", printk_buf);
119 }
120 #else
dprintk(int level,const char * fmt,...)121 static int dprintk(int level, const char *fmt, ...)
122 {
123 	return 0;
124 }
125 #endif
s3c2410_udc_debugfs_seq_show(struct seq_file * m,void * p)126 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
127 {
128 	u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
129 	u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
130 	u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
131 	u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
132 
133 	addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
134 	pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
135 	ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
136 	usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
137 	ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
138 	usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
139 	udc_write(0, S3C2410_UDC_INDEX_REG);
140 	ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
141 	udc_write(1, S3C2410_UDC_INDEX_REG);
142 	ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
143 	ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
144 	ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
145 	ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
146 	udc_write(2, S3C2410_UDC_INDEX_REG);
147 	ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
148 	ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
149 	ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
150 	ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
151 
152 	seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
153 		 "PWR_REG        : 0x%04X\n"
154 		 "EP_INT_REG     : 0x%04X\n"
155 		 "USB_INT_REG    : 0x%04X\n"
156 		 "EP_INT_EN_REG  : 0x%04X\n"
157 		 "USB_INT_EN_REG : 0x%04X\n"
158 		 "EP0_CSR        : 0x%04X\n"
159 		 "EP1_I_CSR1     : 0x%04X\n"
160 		 "EP1_I_CSR2     : 0x%04X\n"
161 		 "EP1_O_CSR1     : 0x%04X\n"
162 		 "EP1_O_CSR2     : 0x%04X\n"
163 		 "EP2_I_CSR1     : 0x%04X\n"
164 		 "EP2_I_CSR2     : 0x%04X\n"
165 		 "EP2_O_CSR1     : 0x%04X\n"
166 		 "EP2_O_CSR2     : 0x%04X\n",
167 			addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
168 			ep_int_en_reg, usb_int_en_reg, ep0_csr,
169 			ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
170 			ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
171 		);
172 
173 	return 0;
174 }
175 
s3c2410_udc_debugfs_fops_open(struct inode * inode,struct file * file)176 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
177 					 struct file *file)
178 {
179 	return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
180 }
181 
182 static const struct file_operations s3c2410_udc_debugfs_fops = {
183 	.open		= s3c2410_udc_debugfs_fops_open,
184 	.read		= seq_read,
185 	.llseek		= seq_lseek,
186 	.release	= single_release,
187 	.owner		= THIS_MODULE,
188 };
189 
190 /* io macros */
191 
s3c2410_udc_clear_ep0_opr(void __iomem * base)192 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
193 {
194 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
195 	udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
196 			S3C2410_UDC_EP0_CSR_REG);
197 }
198 
s3c2410_udc_clear_ep0_sst(void __iomem * base)199 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
200 {
201 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
202 	writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
203 }
204 
s3c2410_udc_clear_ep0_se(void __iomem * base)205 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
206 {
207 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
208 	udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
209 }
210 
s3c2410_udc_set_ep0_ipr(void __iomem * base)211 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
212 {
213 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
214 	udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
215 }
216 
s3c2410_udc_set_ep0_de(void __iomem * base)217 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
218 {
219 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
220 	udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
221 }
222 
s3c2410_udc_set_ep0_ss(void __iomem * b)223 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
224 {
225 	udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
226 	udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
227 }
228 
s3c2410_udc_set_ep0_de_out(void __iomem * base)229 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
230 {
231 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
232 
233 	udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
234 				| S3C2410_UDC_EP0_CSR_DE),
235 			S3C2410_UDC_EP0_CSR_REG);
236 }
237 
s3c2410_udc_set_ep0_sse_out(void __iomem * base)238 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
239 {
240 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
241 	udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
242 				| S3C2410_UDC_EP0_CSR_SSE),
243 			S3C2410_UDC_EP0_CSR_REG);
244 }
245 
s3c2410_udc_set_ep0_de_in(void __iomem * base)246 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
247 {
248 	udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
249 	udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
250 			| S3C2410_UDC_EP0_CSR_DE),
251 		S3C2410_UDC_EP0_CSR_REG);
252 }
253 
254 /*------------------------- I/O ----------------------------------*/
255 
256 /*
257  *	s3c2410_udc_done
258  */
s3c2410_udc_done(struct s3c2410_ep * ep,struct s3c2410_request * req,int status)259 static void s3c2410_udc_done(struct s3c2410_ep *ep,
260 		struct s3c2410_request *req, int status)
261 {
262 	unsigned halted = ep->halted;
263 
264 	list_del_init(&req->queue);
265 
266 	if (likely (req->req.status == -EINPROGRESS))
267 		req->req.status = status;
268 	else
269 		status = req->req.status;
270 
271 	ep->halted = 1;
272 	req->req.complete(&ep->ep, &req->req);
273 	ep->halted = halted;
274 }
275 
s3c2410_udc_nuke(struct s3c2410_udc * udc,struct s3c2410_ep * ep,int status)276 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
277 		struct s3c2410_ep *ep, int status)
278 {
279 	/* Sanity check */
280 	if (&ep->queue == NULL)
281 		return;
282 
283 	while (!list_empty (&ep->queue)) {
284 		struct s3c2410_request *req;
285 		req = list_entry (ep->queue.next, struct s3c2410_request,
286 				queue);
287 		s3c2410_udc_done(ep, req, status);
288 	}
289 }
290 
s3c2410_udc_clear_ep_state(struct s3c2410_udc * dev)291 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
292 {
293 	unsigned i;
294 
295 	/* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
296 	 * fifos, and pending transactions mustn't be continued in any case.
297 	 */
298 
299 	for (i = 1; i < S3C2410_ENDPOINTS; i++)
300 		s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
301 }
302 
s3c2410_udc_fifo_count_out(void)303 static inline int s3c2410_udc_fifo_count_out(void)
304 {
305 	int tmp;
306 
307 	tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
308 	tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
309 	return tmp;
310 }
311 
312 /*
313  *	s3c2410_udc_write_packet
314  */
s3c2410_udc_write_packet(int fifo,struct s3c2410_request * req,unsigned max)315 static inline int s3c2410_udc_write_packet(int fifo,
316 		struct s3c2410_request *req,
317 		unsigned max)
318 {
319 	unsigned len = min(req->req.length - req->req.actual, max);
320 	u8 *buf = req->req.buf + req->req.actual;
321 
322 	prefetch(buf);
323 
324 	dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
325 		req->req.actual, req->req.length, len, req->req.actual + len);
326 
327 	req->req.actual += len;
328 
329 	udelay(5);
330 	writesb(base_addr + fifo, buf, len);
331 	return len;
332 }
333 
334 /*
335  *	s3c2410_udc_write_fifo
336  *
337  * return:  0 = still running, 1 = completed, negative = errno
338  */
s3c2410_udc_write_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)339 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
340 		struct s3c2410_request *req)
341 {
342 	unsigned	count;
343 	int		is_last;
344 	u32		idx;
345 	int		fifo_reg;
346 	u32		ep_csr;
347 
348 	idx = ep->bEndpointAddress & 0x7F;
349 	switch (idx) {
350 	default:
351 		idx = 0;
352 	case 0:
353 		fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
354 		break;
355 	case 1:
356 		fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
357 		break;
358 	case 2:
359 		fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
360 		break;
361 	case 3:
362 		fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
363 		break;
364 	case 4:
365 		fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
366 		break;
367 	}
368 
369 	count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
370 
371 	/* last packet is often short (sometimes a zlp) */
372 	if (count != ep->ep.maxpacket)
373 		is_last = 1;
374 	else if (req->req.length != req->req.actual || req->req.zero)
375 		is_last = 0;
376 	else
377 		is_last = 2;
378 
379 	/* Only ep0 debug messages are interesting */
380 	if (idx == 0)
381 		dprintk(DEBUG_NORMAL,
382 			"Written ep%d %d.%d of %d b [last %d,z %d]\n",
383 			idx, count, req->req.actual, req->req.length,
384 			is_last, req->req.zero);
385 
386 	if (is_last) {
387 		/* The order is important. It prevents sending 2 packets
388 		 * at the same time */
389 
390 		if (idx == 0) {
391 			/* Reset signal => no need to say 'data sent' */
392 			if (! (udc_read(S3C2410_UDC_USB_INT_REG)
393 					& S3C2410_UDC_USBINT_RESET))
394 				s3c2410_udc_set_ep0_de_in(base_addr);
395 			ep->dev->ep0state=EP0_IDLE;
396 		} else {
397 			udc_write(idx, S3C2410_UDC_INDEX_REG);
398 			ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
399 			udc_write(idx, S3C2410_UDC_INDEX_REG);
400 			udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
401 					S3C2410_UDC_IN_CSR1_REG);
402 		}
403 
404 		s3c2410_udc_done(ep, req, 0);
405 		is_last = 1;
406 	} else {
407 		if (idx == 0) {
408 			/* Reset signal => no need to say 'data sent' */
409 			if (! (udc_read(S3C2410_UDC_USB_INT_REG)
410 					& S3C2410_UDC_USBINT_RESET))
411 				s3c2410_udc_set_ep0_ipr(base_addr);
412 		} else {
413 			udc_write(idx, S3C2410_UDC_INDEX_REG);
414 			ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
415 			udc_write(idx, S3C2410_UDC_INDEX_REG);
416 			udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
417 					S3C2410_UDC_IN_CSR1_REG);
418 		}
419 	}
420 
421 	return is_last;
422 }
423 
s3c2410_udc_read_packet(int fifo,u8 * buf,struct s3c2410_request * req,unsigned avail)424 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
425 		struct s3c2410_request *req, unsigned avail)
426 {
427 	unsigned len;
428 
429 	len = min(req->req.length - req->req.actual, avail);
430 	req->req.actual += len;
431 
432 	readsb(fifo + base_addr, buf, len);
433 	return len;
434 }
435 
436 /*
437  * return:  0 = still running, 1 = queue empty, negative = errno
438  */
s3c2410_udc_read_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)439 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
440 				 struct s3c2410_request *req)
441 {
442 	u8		*buf;
443 	u32		ep_csr;
444 	unsigned	bufferspace;
445 	int		is_last=1;
446 	unsigned	avail;
447 	int		fifo_count = 0;
448 	u32		idx;
449 	int		fifo_reg;
450 
451 	idx = ep->bEndpointAddress & 0x7F;
452 
453 	switch (idx) {
454 	default:
455 		idx = 0;
456 	case 0:
457 		fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
458 		break;
459 	case 1:
460 		fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
461 		break;
462 	case 2:
463 		fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
464 		break;
465 	case 3:
466 		fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
467 		break;
468 	case 4:
469 		fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
470 		break;
471 	}
472 
473 	if (!req->req.length)
474 		return 1;
475 
476 	buf = req->req.buf + req->req.actual;
477 	bufferspace = req->req.length - req->req.actual;
478 	if (!bufferspace) {
479 		dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
480 		return -1;
481 	}
482 
483 	udc_write(idx, S3C2410_UDC_INDEX_REG);
484 
485 	fifo_count = s3c2410_udc_fifo_count_out();
486 	dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
487 
488 	if (fifo_count > ep->ep.maxpacket)
489 		avail = ep->ep.maxpacket;
490 	else
491 		avail = fifo_count;
492 
493 	fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
494 
495 	/* checking this with ep0 is not accurate as we already
496 	 * read a control request
497 	 **/
498 	if (idx != 0 && fifo_count < ep->ep.maxpacket) {
499 		is_last = 1;
500 		/* overflowed this request?  flush extra data */
501 		if (fifo_count != avail)
502 			req->req.status = -EOVERFLOW;
503 	} else {
504 		is_last = (req->req.length <= req->req.actual) ? 1 : 0;
505 	}
506 
507 	udc_write(idx, S3C2410_UDC_INDEX_REG);
508 	fifo_count = s3c2410_udc_fifo_count_out();
509 
510 	/* Only ep0 debug messages are interesting */
511 	if (idx == 0)
512 		dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
513 			__func__, fifo_count,is_last);
514 
515 	if (is_last) {
516 		if (idx == 0) {
517 			s3c2410_udc_set_ep0_de_out(base_addr);
518 			ep->dev->ep0state = EP0_IDLE;
519 		} else {
520 			udc_write(idx, S3C2410_UDC_INDEX_REG);
521 			ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
522 			udc_write(idx, S3C2410_UDC_INDEX_REG);
523 			udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
524 					S3C2410_UDC_OUT_CSR1_REG);
525 		}
526 
527 		s3c2410_udc_done(ep, req, 0);
528 	} else {
529 		if (idx == 0) {
530 			s3c2410_udc_clear_ep0_opr(base_addr);
531 		} else {
532 			udc_write(idx, S3C2410_UDC_INDEX_REG);
533 			ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
534 			udc_write(idx, S3C2410_UDC_INDEX_REG);
535 			udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
536 					S3C2410_UDC_OUT_CSR1_REG);
537 		}
538 	}
539 
540 	return is_last;
541 }
542 
s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest * crq)543 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
544 {
545 	unsigned char *outbuf = (unsigned char*)crq;
546 	int bytes_read = 0;
547 
548 	udc_write(0, S3C2410_UDC_INDEX_REG);
549 
550 	bytes_read = s3c2410_udc_fifo_count_out();
551 
552 	dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
553 
554 	if (bytes_read > sizeof(struct usb_ctrlrequest))
555 		bytes_read = sizeof(struct usb_ctrlrequest);
556 
557 	readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
558 
559 	dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
560 		bytes_read, crq->bRequest, crq->bRequestType,
561 		crq->wValue, crq->wIndex, crq->wLength);
562 
563 	return bytes_read;
564 }
565 
s3c2410_udc_get_status(struct s3c2410_udc * dev,struct usb_ctrlrequest * crq)566 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
567 		struct usb_ctrlrequest *crq)
568 {
569 	u16 status = 0;
570 	u8 ep_num = crq->wIndex & 0x7F;
571 	u8 is_in = crq->wIndex & USB_DIR_IN;
572 
573 	switch (crq->bRequestType & USB_RECIP_MASK) {
574 	case USB_RECIP_INTERFACE:
575 		break;
576 
577 	case USB_RECIP_DEVICE:
578 		status = dev->devstatus;
579 		break;
580 
581 	case USB_RECIP_ENDPOINT:
582 		if (ep_num > 4 || crq->wLength > 2)
583 			return 1;
584 
585 		if (ep_num == 0) {
586 			udc_write(0, S3C2410_UDC_INDEX_REG);
587 			status = udc_read(S3C2410_UDC_IN_CSR1_REG);
588 			status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
589 		} else {
590 			udc_write(ep_num, S3C2410_UDC_INDEX_REG);
591 			if (is_in) {
592 				status = udc_read(S3C2410_UDC_IN_CSR1_REG);
593 				status = status & S3C2410_UDC_ICSR1_SENDSTL;
594 			} else {
595 				status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
596 				status = status & S3C2410_UDC_OCSR1_SENDSTL;
597 			}
598 		}
599 
600 		status = status ? 1 : 0;
601 		break;
602 
603 	default:
604 		return 1;
605 	}
606 
607 	/* Seems to be needed to get it working. ouch :( */
608 	udelay(5);
609 	udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
610 	udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
611 	s3c2410_udc_set_ep0_de_in(base_addr);
612 
613 	return 0;
614 }
615 /*------------------------- usb state machine -------------------------------*/
616 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
617 
s3c2410_udc_handle_ep0_idle(struct s3c2410_udc * dev,struct s3c2410_ep * ep,struct usb_ctrlrequest * crq,u32 ep0csr)618 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
619 					struct s3c2410_ep *ep,
620 					struct usb_ctrlrequest *crq,
621 					u32 ep0csr)
622 {
623 	int len, ret, tmp;
624 
625 	/* start control request? */
626 	if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
627 		return;
628 
629 	s3c2410_udc_nuke(dev, ep, -EPROTO);
630 
631 	len = s3c2410_udc_read_fifo_crq(crq);
632 	if (len != sizeof(*crq)) {
633 		dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
634 			" wanted %d bytes got %d. Stalling out...\n",
635 			sizeof(*crq), len);
636 		s3c2410_udc_set_ep0_ss(base_addr);
637 		return;
638 	}
639 
640 	dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
641 		crq->bRequest, crq->bRequestType, crq->wLength);
642 
643 	/* cope with automagic for some standard requests. */
644 	dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
645 		== USB_TYPE_STANDARD;
646 	dev->req_config = 0;
647 	dev->req_pending = 1;
648 
649 	switch (crq->bRequest) {
650 	case USB_REQ_SET_CONFIGURATION:
651 		dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
652 
653 		if (crq->bRequestType == USB_RECIP_DEVICE) {
654 			dev->req_config = 1;
655 			s3c2410_udc_set_ep0_de_out(base_addr);
656 		}
657 		break;
658 
659 	case USB_REQ_SET_INTERFACE:
660 		dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
661 
662 		if (crq->bRequestType == USB_RECIP_INTERFACE) {
663 			dev->req_config = 1;
664 			s3c2410_udc_set_ep0_de_out(base_addr);
665 		}
666 		break;
667 
668 	case USB_REQ_SET_ADDRESS:
669 		dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
670 
671 		if (crq->bRequestType == USB_RECIP_DEVICE) {
672 			tmp = crq->wValue & 0x7F;
673 			dev->address = tmp;
674 			udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
675 					S3C2410_UDC_FUNC_ADDR_REG);
676 			s3c2410_udc_set_ep0_de_out(base_addr);
677 			return;
678 		}
679 		break;
680 
681 	case USB_REQ_GET_STATUS:
682 		dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
683 		s3c2410_udc_clear_ep0_opr(base_addr);
684 
685 		if (dev->req_std) {
686 			if (!s3c2410_udc_get_status(dev, crq)) {
687 				return;
688 			}
689 		}
690 		break;
691 
692 	case USB_REQ_CLEAR_FEATURE:
693 		s3c2410_udc_clear_ep0_opr(base_addr);
694 
695 		if (crq->bRequestType != USB_RECIP_ENDPOINT)
696 			break;
697 
698 		if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
699 			break;
700 
701 		s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
702 		s3c2410_udc_set_ep0_de_out(base_addr);
703 		return;
704 
705 	case USB_REQ_SET_FEATURE:
706 		s3c2410_udc_clear_ep0_opr(base_addr);
707 
708 		if (crq->bRequestType != USB_RECIP_ENDPOINT)
709 			break;
710 
711 		if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
712 			break;
713 
714 		s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
715 		s3c2410_udc_set_ep0_de_out(base_addr);
716 		return;
717 
718 	default:
719 		s3c2410_udc_clear_ep0_opr(base_addr);
720 		break;
721 	}
722 
723 	if (crq->bRequestType & USB_DIR_IN)
724 		dev->ep0state = EP0_IN_DATA_PHASE;
725 	else
726 		dev->ep0state = EP0_OUT_DATA_PHASE;
727 
728 	if (!dev->driver)
729 		return;
730 
731 	/* deliver the request to the gadget driver */
732 	ret = dev->driver->setup(&dev->gadget, crq);
733 	if (ret < 0) {
734 		if (dev->req_config) {
735 			dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
736 				crq->bRequest, ret);
737 			return;
738 		}
739 
740 		if (ret == -EOPNOTSUPP)
741 			dprintk(DEBUG_NORMAL, "Operation not supported\n");
742 		else
743 			dprintk(DEBUG_NORMAL,
744 				"dev->driver->setup failed. (%d)\n", ret);
745 
746 		udelay(5);
747 		s3c2410_udc_set_ep0_ss(base_addr);
748 		s3c2410_udc_set_ep0_de_out(base_addr);
749 		dev->ep0state = EP0_IDLE;
750 		/* deferred i/o == no response yet */
751 	} else if (dev->req_pending) {
752 		dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
753 		dev->req_pending=0;
754 	}
755 
756 	dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
757 }
758 
s3c2410_udc_handle_ep0(struct s3c2410_udc * dev)759 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
760 {
761 	u32			ep0csr;
762 	struct s3c2410_ep	*ep = &dev->ep[0];
763 	struct s3c2410_request	*req;
764 	struct usb_ctrlrequest	crq;
765 
766 	if (list_empty(&ep->queue))
767 		req = NULL;
768 	else
769 		req = list_entry(ep->queue.next, struct s3c2410_request, queue);
770 
771 	/* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
772 	 * S3C2410_UDC_EP0_CSR_REG when index is zero */
773 
774 	udc_write(0, S3C2410_UDC_INDEX_REG);
775 	ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
776 
777 	dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
778 		ep0csr, ep0states[dev->ep0state]);
779 
780 	/* clear stall status */
781 	if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
782 		s3c2410_udc_nuke(dev, ep, -EPIPE);
783 		dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
784 		s3c2410_udc_clear_ep0_sst(base_addr);
785 		dev->ep0state = EP0_IDLE;
786 		return;
787 	}
788 
789 	/* clear setup end */
790 	if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
791 		dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
792 		s3c2410_udc_nuke(dev, ep, 0);
793 		s3c2410_udc_clear_ep0_se(base_addr);
794 		dev->ep0state = EP0_IDLE;
795 	}
796 
797 	switch (dev->ep0state) {
798 	case EP0_IDLE:
799 		s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
800 		break;
801 
802 	case EP0_IN_DATA_PHASE:			/* GET_DESCRIPTOR etc */
803 		dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
804 		if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
805 			s3c2410_udc_write_fifo(ep, req);
806 		}
807 		break;
808 
809 	case EP0_OUT_DATA_PHASE:		/* SET_DESCRIPTOR etc */
810 		dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
811 		if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
812 			s3c2410_udc_read_fifo(ep,req);
813 		}
814 		break;
815 
816 	case EP0_END_XFER:
817 		dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
818 		dev->ep0state = EP0_IDLE;
819 		break;
820 
821 	case EP0_STALL:
822 		dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
823 		dev->ep0state = EP0_IDLE;
824 		break;
825 	}
826 }
827 
828 /*
829  *	handle_ep - Manage I/O endpoints
830  */
831 
s3c2410_udc_handle_ep(struct s3c2410_ep * ep)832 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
833 {
834 	struct s3c2410_request	*req;
835 	int			is_in = ep->bEndpointAddress & USB_DIR_IN;
836 	u32			ep_csr1;
837 	u32			idx;
838 
839 	if (likely (!list_empty(&ep->queue)))
840 		req = list_entry(ep->queue.next,
841 				struct s3c2410_request, queue);
842 	else
843 		req = NULL;
844 
845 	idx = ep->bEndpointAddress & 0x7F;
846 
847 	if (is_in) {
848 		udc_write(idx, S3C2410_UDC_INDEX_REG);
849 		ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
850 		dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
851 			idx, ep_csr1, req ? 1 : 0);
852 
853 		if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
854 			dprintk(DEBUG_VERBOSE, "st\n");
855 			udc_write(idx, S3C2410_UDC_INDEX_REG);
856 			udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
857 					S3C2410_UDC_IN_CSR1_REG);
858 			return;
859 		}
860 
861 		if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
862 			s3c2410_udc_write_fifo(ep,req);
863 		}
864 	} else {
865 		udc_write(idx, S3C2410_UDC_INDEX_REG);
866 		ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
867 		dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
868 
869 		if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
870 			udc_write(idx, S3C2410_UDC_INDEX_REG);
871 			udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
872 					S3C2410_UDC_OUT_CSR1_REG);
873 			return;
874 		}
875 
876 		if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
877 			s3c2410_udc_read_fifo(ep,req);
878 		}
879 	}
880 }
881 
882 #include <mach/regs-irq.h>
883 
884 /*
885  *	s3c2410_udc_irq - interrupt handler
886  */
s3c2410_udc_irq(int dummy,void * _dev)887 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
888 {
889 	struct s3c2410_udc *dev = _dev;
890 	int usb_status;
891 	int usbd_status;
892 	int pwr_reg;
893 	int ep0csr;
894 	int i;
895 	u32 idx, idx2;
896 	unsigned long flags;
897 
898 	spin_lock_irqsave(&dev->lock, flags);
899 
900 	/* Driver connected ? */
901 	if (!dev->driver) {
902 		/* Clear interrupts */
903 		udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
904 				S3C2410_UDC_USB_INT_REG);
905 		udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
906 				S3C2410_UDC_EP_INT_REG);
907 	}
908 
909 	/* Save index */
910 	idx = udc_read(S3C2410_UDC_INDEX_REG);
911 
912 	/* Read status registers */
913 	usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
914 	usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
915 	pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
916 
917 	udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
918 	ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
919 
920 	dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
921 		usb_status, usbd_status, pwr_reg, ep0csr);
922 
923 	/*
924 	 * Now, handle interrupts. There's two types :
925 	 * - Reset, Resume, Suspend coming -> usb_int_reg
926 	 * - EP -> ep_int_reg
927 	 */
928 
929 	/* RESET */
930 	if (usb_status & S3C2410_UDC_USBINT_RESET) {
931 		/* two kind of reset :
932 		 * - reset start -> pwr reg = 8
933 		 * - reset end   -> pwr reg = 0
934 		 **/
935 		dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
936 			ep0csr, pwr_reg);
937 
938 		dev->gadget.speed = USB_SPEED_UNKNOWN;
939 		udc_write(0x00, S3C2410_UDC_INDEX_REG);
940 		udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
941 				S3C2410_UDC_MAXP_REG);
942 		dev->address = 0;
943 
944 		dev->ep0state = EP0_IDLE;
945 		dev->gadget.speed = USB_SPEED_FULL;
946 
947 		/* clear interrupt */
948 		udc_write(S3C2410_UDC_USBINT_RESET,
949 				S3C2410_UDC_USB_INT_REG);
950 
951 		udc_write(idx, S3C2410_UDC_INDEX_REG);
952 		spin_unlock_irqrestore(&dev->lock, flags);
953 		return IRQ_HANDLED;
954 	}
955 
956 	/* RESUME */
957 	if (usb_status & S3C2410_UDC_USBINT_RESUME) {
958 		dprintk(DEBUG_NORMAL, "USB resume\n");
959 
960 		/* clear interrupt */
961 		udc_write(S3C2410_UDC_USBINT_RESUME,
962 				S3C2410_UDC_USB_INT_REG);
963 
964 		if (dev->gadget.speed != USB_SPEED_UNKNOWN
965 				&& dev->driver
966 				&& dev->driver->resume)
967 			dev->driver->resume(&dev->gadget);
968 	}
969 
970 	/* SUSPEND */
971 	if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
972 		dprintk(DEBUG_NORMAL, "USB suspend\n");
973 
974 		/* clear interrupt */
975 		udc_write(S3C2410_UDC_USBINT_SUSPEND,
976 				S3C2410_UDC_USB_INT_REG);
977 
978 		if (dev->gadget.speed != USB_SPEED_UNKNOWN
979 				&& dev->driver
980 				&& dev->driver->suspend)
981 			dev->driver->suspend(&dev->gadget);
982 
983 		dev->ep0state = EP0_IDLE;
984 	}
985 
986 	/* EP */
987 	/* control traffic */
988 	/* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
989 	 * generate an interrupt
990 	 */
991 	if (usbd_status & S3C2410_UDC_INT_EP0) {
992 		dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
993 		/* Clear the interrupt bit by setting it to 1 */
994 		udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
995 		s3c2410_udc_handle_ep0(dev);
996 	}
997 
998 	/* endpoint data transfers */
999 	for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1000 		u32 tmp = 1 << i;
1001 		if (usbd_status & tmp) {
1002 			dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1003 
1004 			/* Clear the interrupt bit by setting it to 1 */
1005 			udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1006 			s3c2410_udc_handle_ep(&dev->ep[i]);
1007 		}
1008 	}
1009 
1010 	/* what else causes this interrupt? a receive! who is it? */
1011 	if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1012 		for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1013 			idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1014 			udc_write(i, S3C2410_UDC_INDEX_REG);
1015 
1016 			if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1017 				s3c2410_udc_handle_ep(&dev->ep[i]);
1018 
1019 			/* restore index */
1020 			udc_write(idx2, S3C2410_UDC_INDEX_REG);
1021 		}
1022 	}
1023 
1024 	dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1025 
1026 	/* Restore old index */
1027 	udc_write(idx, S3C2410_UDC_INDEX_REG);
1028 
1029 	spin_unlock_irqrestore(&dev->lock, flags);
1030 
1031 	return IRQ_HANDLED;
1032 }
1033 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1034 
to_s3c2410_ep(struct usb_ep * ep)1035 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1036 {
1037 	return container_of(ep, struct s3c2410_ep, ep);
1038 }
1039 
to_s3c2410_udc(struct usb_gadget * gadget)1040 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1041 {
1042 	return container_of(gadget, struct s3c2410_udc, gadget);
1043 }
1044 
to_s3c2410_req(struct usb_request * req)1045 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1046 {
1047 	return container_of(req, struct s3c2410_request, req);
1048 }
1049 
1050 /*
1051  *	s3c2410_udc_ep_enable
1052  */
s3c2410_udc_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)1053 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1054 				 const struct usb_endpoint_descriptor *desc)
1055 {
1056 	struct s3c2410_udc	*dev;
1057 	struct s3c2410_ep	*ep;
1058 	u32			max, tmp;
1059 	unsigned long		flags;
1060 	u32			csr1,csr2;
1061 	u32			int_en_reg;
1062 
1063 	ep = to_s3c2410_ep(_ep);
1064 
1065 	if (!_ep || !desc || ep->desc
1066 			|| _ep->name == ep0name
1067 			|| desc->bDescriptorType != USB_DT_ENDPOINT)
1068 		return -EINVAL;
1069 
1070 	dev = ep->dev;
1071 	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1072 		return -ESHUTDOWN;
1073 
1074 	max = usb_endpoint_maxp(desc) & 0x1fff;
1075 
1076 	local_irq_save (flags);
1077 	_ep->maxpacket = max & 0x7ff;
1078 	ep->desc = desc;
1079 	ep->halted = 0;
1080 	ep->bEndpointAddress = desc->bEndpointAddress;
1081 
1082 	/* set max packet */
1083 	udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1084 	udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1085 
1086 	/* set type, direction, address; reset fifo counters */
1087 	if (desc->bEndpointAddress & USB_DIR_IN) {
1088 		csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1089 		csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1090 
1091 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1092 		udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1093 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1094 		udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1095 	} else {
1096 		/* don't flush in fifo or it will cause endpoint interrupt */
1097 		csr1 = S3C2410_UDC_ICSR1_CLRDT;
1098 		csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1099 
1100 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1101 		udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1102 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1103 		udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1104 
1105 		csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1106 		csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1107 
1108 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1109 		udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1110 		udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1111 		udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1112 	}
1113 
1114 	/* enable irqs */
1115 	int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1116 	udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1117 
1118 	/* print some debug message */
1119 	tmp = desc->bEndpointAddress;
1120 	dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1121 		 _ep->name,ep->num, tmp,
1122 		 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1123 
1124 	local_irq_restore (flags);
1125 	s3c2410_udc_set_halt(_ep, 0);
1126 
1127 	return 0;
1128 }
1129 
1130 /*
1131  * s3c2410_udc_ep_disable
1132  */
s3c2410_udc_ep_disable(struct usb_ep * _ep)1133 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1134 {
1135 	struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1136 	unsigned long flags;
1137 	u32 int_en_reg;
1138 
1139 	if (!_ep || !ep->desc) {
1140 		dprintk(DEBUG_NORMAL, "%s not enabled\n",
1141 			_ep ? ep->ep.name : NULL);
1142 		return -EINVAL;
1143 	}
1144 
1145 	local_irq_save(flags);
1146 
1147 	dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1148 
1149 	ep->desc = NULL;
1150 	ep->ep.desc = NULL;
1151 	ep->halted = 1;
1152 
1153 	s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1154 
1155 	/* disable irqs */
1156 	int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1157 	udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1158 
1159 	local_irq_restore(flags);
1160 
1161 	dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1162 
1163 	return 0;
1164 }
1165 
1166 /*
1167  * s3c2410_udc_alloc_request
1168  */
1169 static struct usb_request *
s3c2410_udc_alloc_request(struct usb_ep * _ep,gfp_t mem_flags)1170 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1171 {
1172 	struct s3c2410_request *req;
1173 
1174 	dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1175 
1176 	if (!_ep)
1177 		return NULL;
1178 
1179 	req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1180 	if (!req)
1181 		return NULL;
1182 
1183 	INIT_LIST_HEAD (&req->queue);
1184 	return &req->req;
1185 }
1186 
1187 /*
1188  * s3c2410_udc_free_request
1189  */
1190 static void
s3c2410_udc_free_request(struct usb_ep * _ep,struct usb_request * _req)1191 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1192 {
1193 	struct s3c2410_ep	*ep = to_s3c2410_ep(_ep);
1194 	struct s3c2410_request	*req = to_s3c2410_req(_req);
1195 
1196 	dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1197 
1198 	if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1199 		return;
1200 
1201 	WARN_ON (!list_empty (&req->queue));
1202 	kfree(req);
1203 }
1204 
1205 /*
1206  *	s3c2410_udc_queue
1207  */
s3c2410_udc_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)1208 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1209 		gfp_t gfp_flags)
1210 {
1211 	struct s3c2410_request	*req = to_s3c2410_req(_req);
1212 	struct s3c2410_ep	*ep = to_s3c2410_ep(_ep);
1213 	struct s3c2410_udc	*dev;
1214 	u32			ep_csr = 0;
1215 	int			fifo_count = 0;
1216 	unsigned long		flags;
1217 
1218 	if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1219 		dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1220 		return -EINVAL;
1221 	}
1222 
1223 	dev = ep->dev;
1224 	if (unlikely (!dev->driver
1225 			|| dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1226 		return -ESHUTDOWN;
1227 	}
1228 
1229 	local_irq_save (flags);
1230 
1231 	if (unlikely(!_req || !_req->complete
1232 			|| !_req->buf || !list_empty(&req->queue))) {
1233 		if (!_req)
1234 			dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1235 		else {
1236 			dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1237 				__func__, !_req->complete,!_req->buf,
1238 				!list_empty(&req->queue));
1239 		}
1240 
1241 		local_irq_restore(flags);
1242 		return -EINVAL;
1243 	}
1244 
1245 	_req->status = -EINPROGRESS;
1246 	_req->actual = 0;
1247 
1248 	dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1249 		 __func__, ep->bEndpointAddress, _req->length);
1250 
1251 	if (ep->bEndpointAddress) {
1252 		udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1253 
1254 		ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1255 				? S3C2410_UDC_IN_CSR1_REG
1256 				: S3C2410_UDC_OUT_CSR1_REG);
1257 		fifo_count = s3c2410_udc_fifo_count_out();
1258 	} else {
1259 		udc_write(0, S3C2410_UDC_INDEX_REG);
1260 		ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1261 		fifo_count = s3c2410_udc_fifo_count_out();
1262 	}
1263 
1264 	/* kickstart this i/o queue? */
1265 	if (list_empty(&ep->queue) && !ep->halted) {
1266 		if (ep->bEndpointAddress == 0 /* ep0 */) {
1267 			switch (dev->ep0state) {
1268 			case EP0_IN_DATA_PHASE:
1269 				if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1270 						&& s3c2410_udc_write_fifo(ep,
1271 							req)) {
1272 					dev->ep0state = EP0_IDLE;
1273 					req = NULL;
1274 				}
1275 				break;
1276 
1277 			case EP0_OUT_DATA_PHASE:
1278 				if ((!_req->length)
1279 					|| ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1280 						&& s3c2410_udc_read_fifo(ep,
1281 							req))) {
1282 					dev->ep0state = EP0_IDLE;
1283 					req = NULL;
1284 				}
1285 				break;
1286 
1287 			default:
1288 				local_irq_restore(flags);
1289 				return -EL2HLT;
1290 			}
1291 		} else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1292 				&& (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1293 				&& s3c2410_udc_write_fifo(ep, req)) {
1294 			req = NULL;
1295 		} else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1296 				&& fifo_count
1297 				&& s3c2410_udc_read_fifo(ep, req)) {
1298 			req = NULL;
1299 		}
1300 	}
1301 
1302 	/* pio or dma irq handler advances the queue. */
1303 	if (likely (req != 0))
1304 		list_add_tail(&req->queue, &ep->queue);
1305 
1306 	local_irq_restore(flags);
1307 
1308 	dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1309 	return 0;
1310 }
1311 
1312 /*
1313  *	s3c2410_udc_dequeue
1314  */
s3c2410_udc_dequeue(struct usb_ep * _ep,struct usb_request * _req)1315 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1316 {
1317 	struct s3c2410_ep	*ep = to_s3c2410_ep(_ep);
1318 	struct s3c2410_udc	*udc;
1319 	int			retval = -EINVAL;
1320 	unsigned long		flags;
1321 	struct s3c2410_request	*req = NULL;
1322 
1323 	dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1324 
1325 	if (!the_controller->driver)
1326 		return -ESHUTDOWN;
1327 
1328 	if (!_ep || !_req)
1329 		return retval;
1330 
1331 	udc = to_s3c2410_udc(ep->gadget);
1332 
1333 	local_irq_save (flags);
1334 
1335 	list_for_each_entry (req, &ep->queue, queue) {
1336 		if (&req->req == _req) {
1337 			list_del_init (&req->queue);
1338 			_req->status = -ECONNRESET;
1339 			retval = 0;
1340 			break;
1341 		}
1342 	}
1343 
1344 	if (retval == 0) {
1345 		dprintk(DEBUG_VERBOSE,
1346 			"dequeued req %p from %s, len %d buf %p\n",
1347 			req, _ep->name, _req->length, _req->buf);
1348 
1349 		s3c2410_udc_done(ep, req, -ECONNRESET);
1350 	}
1351 
1352 	local_irq_restore (flags);
1353 	return retval;
1354 }
1355 
1356 /*
1357  * s3c2410_udc_set_halt
1358  */
s3c2410_udc_set_halt(struct usb_ep * _ep,int value)1359 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1360 {
1361 	struct s3c2410_ep	*ep = to_s3c2410_ep(_ep);
1362 	u32			ep_csr = 0;
1363 	unsigned long		flags;
1364 	u32			idx;
1365 
1366 	if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1367 		dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1368 		return -EINVAL;
1369 	}
1370 
1371 	local_irq_save (flags);
1372 
1373 	idx = ep->bEndpointAddress & 0x7F;
1374 
1375 	if (idx == 0) {
1376 		s3c2410_udc_set_ep0_ss(base_addr);
1377 		s3c2410_udc_set_ep0_de_out(base_addr);
1378 	} else {
1379 		udc_write(idx, S3C2410_UDC_INDEX_REG);
1380 		ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1381 				? S3C2410_UDC_IN_CSR1_REG
1382 				: S3C2410_UDC_OUT_CSR1_REG);
1383 
1384 		if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1385 			if (value)
1386 				udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1387 					S3C2410_UDC_IN_CSR1_REG);
1388 			else {
1389 				ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1390 				udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1391 				ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1392 				udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1393 			}
1394 		} else {
1395 			if (value)
1396 				udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1397 					S3C2410_UDC_OUT_CSR1_REG);
1398 			else {
1399 				ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1400 				udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1401 				ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1402 				udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1403 			}
1404 		}
1405 	}
1406 
1407 	ep->halted = value ? 1 : 0;
1408 	local_irq_restore (flags);
1409 
1410 	return 0;
1411 }
1412 
1413 static const struct usb_ep_ops s3c2410_ep_ops = {
1414 	.enable		= s3c2410_udc_ep_enable,
1415 	.disable	= s3c2410_udc_ep_disable,
1416 
1417 	.alloc_request	= s3c2410_udc_alloc_request,
1418 	.free_request	= s3c2410_udc_free_request,
1419 
1420 	.queue		= s3c2410_udc_queue,
1421 	.dequeue	= s3c2410_udc_dequeue,
1422 
1423 	.set_halt	= s3c2410_udc_set_halt,
1424 };
1425 
1426 /*------------------------- usb_gadget_ops ----------------------------------*/
1427 
1428 /*
1429  *	s3c2410_udc_get_frame
1430  */
s3c2410_udc_get_frame(struct usb_gadget * _gadget)1431 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1432 {
1433 	int tmp;
1434 
1435 	dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1436 
1437 	tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1438 	tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1439 	return tmp;
1440 }
1441 
1442 /*
1443  *	s3c2410_udc_wakeup
1444  */
s3c2410_udc_wakeup(struct usb_gadget * _gadget)1445 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1446 {
1447 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1448 	return 0;
1449 }
1450 
1451 /*
1452  *	s3c2410_udc_set_selfpowered
1453  */
s3c2410_udc_set_selfpowered(struct usb_gadget * gadget,int value)1454 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1455 {
1456 	struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1457 
1458 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1459 
1460 	if (value)
1461 		udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1462 	else
1463 		udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1464 
1465 	return 0;
1466 }
1467 
1468 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1469 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1470 
s3c2410_udc_set_pullup(struct s3c2410_udc * udc,int is_on)1471 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1472 {
1473 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1474 
1475 	if (udc_info && (udc_info->udc_command ||
1476 		gpio_is_valid(udc_info->pullup_pin))) {
1477 
1478 		if (is_on)
1479 			s3c2410_udc_enable(udc);
1480 		else {
1481 			if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1482 				if (udc->driver && udc->driver->disconnect)
1483 					udc->driver->disconnect(&udc->gadget);
1484 
1485 			}
1486 			s3c2410_udc_disable(udc);
1487 		}
1488 	}
1489 	else
1490 		return -EOPNOTSUPP;
1491 
1492 	return 0;
1493 }
1494 
s3c2410_udc_vbus_session(struct usb_gadget * gadget,int is_active)1495 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1496 {
1497 	struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1498 
1499 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1500 
1501 	udc->vbus = (is_active != 0);
1502 	s3c2410_udc_set_pullup(udc, is_active);
1503 	return 0;
1504 }
1505 
s3c2410_udc_pullup(struct usb_gadget * gadget,int is_on)1506 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1507 {
1508 	struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1509 
1510 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1511 
1512 	s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1513 	return 0;
1514 }
1515 
s3c2410_udc_vbus_irq(int irq,void * _dev)1516 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1517 {
1518 	struct s3c2410_udc	*dev = _dev;
1519 	unsigned int		value;
1520 
1521 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1522 
1523 	value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1524 	if (udc_info->vbus_pin_inverted)
1525 		value = !value;
1526 
1527 	if (value != dev->vbus)
1528 		s3c2410_udc_vbus_session(&dev->gadget, value);
1529 
1530 	return IRQ_HANDLED;
1531 }
1532 
s3c2410_vbus_draw(struct usb_gadget * _gadget,unsigned ma)1533 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1534 {
1535 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1536 
1537 	if (udc_info && udc_info->vbus_draw) {
1538 		udc_info->vbus_draw(ma);
1539 		return 0;
1540 	}
1541 
1542 	return -ENOTSUPP;
1543 }
1544 
1545 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1546 		int (*bind)(struct usb_gadget *));
1547 static int s3c2410_udc_stop(struct usb_gadget_driver *driver);
1548 
1549 static const struct usb_gadget_ops s3c2410_ops = {
1550 	.get_frame		= s3c2410_udc_get_frame,
1551 	.wakeup			= s3c2410_udc_wakeup,
1552 	.set_selfpowered	= s3c2410_udc_set_selfpowered,
1553 	.pullup			= s3c2410_udc_pullup,
1554 	.vbus_session		= s3c2410_udc_vbus_session,
1555 	.vbus_draw		= s3c2410_vbus_draw,
1556 	.start			= s3c2410_udc_start,
1557 	.stop			= s3c2410_udc_stop,
1558 };
1559 
s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)1560 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1561 {
1562 	if (!udc_info)
1563 		return;
1564 
1565 	if (udc_info->udc_command) {
1566 		udc_info->udc_command(cmd);
1567 	} else if (gpio_is_valid(udc_info->pullup_pin)) {
1568 		int value;
1569 
1570 		switch (cmd) {
1571 		case S3C2410_UDC_P_ENABLE:
1572 			value = 1;
1573 			break;
1574 		case S3C2410_UDC_P_DISABLE:
1575 			value = 0;
1576 			break;
1577 		default:
1578 			return;
1579 		}
1580 		value ^= udc_info->pullup_pin_inverted;
1581 
1582 		gpio_set_value(udc_info->pullup_pin, value);
1583 	}
1584 }
1585 
1586 /*------------------------- gadget driver handling---------------------------*/
1587 /*
1588  * s3c2410_udc_disable
1589  */
s3c2410_udc_disable(struct s3c2410_udc * dev)1590 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1591 {
1592 	dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1593 
1594 	/* Disable all interrupts */
1595 	udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1596 	udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1597 
1598 	/* Clear the interrupt registers */
1599 	udc_write(S3C2410_UDC_USBINT_RESET
1600 				| S3C2410_UDC_USBINT_RESUME
1601 				| S3C2410_UDC_USBINT_SUSPEND,
1602 			S3C2410_UDC_USB_INT_REG);
1603 
1604 	udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1605 
1606 	/* Good bye, cruel world */
1607 	s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1608 
1609 	/* Set speed to unknown */
1610 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1611 }
1612 
1613 /*
1614  * s3c2410_udc_reinit
1615  */
s3c2410_udc_reinit(struct s3c2410_udc * dev)1616 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1617 {
1618 	u32 i;
1619 
1620 	/* device/ep0 records init */
1621 	INIT_LIST_HEAD (&dev->gadget.ep_list);
1622 	INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1623 	dev->ep0state = EP0_IDLE;
1624 
1625 	for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1626 		struct s3c2410_ep *ep = &dev->ep[i];
1627 
1628 		if (i != 0)
1629 			list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1630 
1631 		ep->dev = dev;
1632 		ep->desc = NULL;
1633 		ep->ep.desc = NULL;
1634 		ep->halted = 0;
1635 		INIT_LIST_HEAD (&ep->queue);
1636 	}
1637 }
1638 
1639 /*
1640  * s3c2410_udc_enable
1641  */
s3c2410_udc_enable(struct s3c2410_udc * dev)1642 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1643 {
1644 	int i;
1645 
1646 	dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1647 
1648 	/* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1649 	dev->gadget.speed = USB_SPEED_FULL;
1650 
1651 	/* Set MAXP for all endpoints */
1652 	for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1653 		udc_write(i, S3C2410_UDC_INDEX_REG);
1654 		udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1655 				S3C2410_UDC_MAXP_REG);
1656 	}
1657 
1658 	/* Set default power state */
1659 	udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1660 
1661 	/* Enable reset and suspend interrupt interrupts */
1662 	udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1663 			S3C2410_UDC_USB_INT_EN_REG);
1664 
1665 	/* Enable ep0 interrupt */
1666 	udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1667 
1668 	/* time to say "hello, world" */
1669 	s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1670 }
1671 
s3c2410_udc_start(struct usb_gadget_driver * driver,int (* bind)(struct usb_gadget *))1672 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1673 		int (*bind)(struct usb_gadget *))
1674 {
1675 	struct s3c2410_udc *udc = the_controller;
1676 	int		retval;
1677 
1678 	dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1679 
1680 	/* Sanity checks */
1681 	if (!udc)
1682 		return -ENODEV;
1683 
1684 	if (udc->driver)
1685 		return -EBUSY;
1686 
1687 	if (!bind || !driver->setup || driver->max_speed < USB_SPEED_FULL) {
1688 		printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1689 			bind, driver->setup, driver->max_speed);
1690 		return -EINVAL;
1691 	}
1692 #if defined(MODULE)
1693 	if (!driver->unbind) {
1694 		printk(KERN_ERR "Invalid driver: no unbind method\n");
1695 		return -EINVAL;
1696 	}
1697 #endif
1698 
1699 	/* Hook the driver */
1700 	udc->driver = driver;
1701 	udc->gadget.dev.driver = &driver->driver;
1702 
1703 	/* Bind the driver */
1704 	if ((retval = device_add(&udc->gadget.dev)) != 0) {
1705 		printk(KERN_ERR "Error in device_add() : %d\n",retval);
1706 		goto register_error;
1707 	}
1708 
1709 	dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1710 		driver->driver.name);
1711 
1712 	if ((retval = bind(&udc->gadget)) != 0) {
1713 		device_del(&udc->gadget.dev);
1714 		goto register_error;
1715 	}
1716 
1717 	/* Enable udc */
1718 	s3c2410_udc_enable(udc);
1719 
1720 	return 0;
1721 
1722 register_error:
1723 	udc->driver = NULL;
1724 	udc->gadget.dev.driver = NULL;
1725 	return retval;
1726 }
1727 
s3c2410_udc_stop(struct usb_gadget_driver * driver)1728 static int s3c2410_udc_stop(struct usb_gadget_driver *driver)
1729 {
1730 	struct s3c2410_udc *udc = the_controller;
1731 
1732 	if (!udc)
1733 		return -ENODEV;
1734 
1735 	if (!driver || driver != udc->driver || !driver->unbind)
1736 		return -EINVAL;
1737 
1738 	dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n",
1739 		driver->driver.name);
1740 
1741 	/* report disconnect */
1742 	if (driver->disconnect)
1743 		driver->disconnect(&udc->gadget);
1744 
1745 	driver->unbind(&udc->gadget);
1746 
1747 	device_del(&udc->gadget.dev);
1748 	udc->driver = NULL;
1749 
1750 	/* Disable udc */
1751 	s3c2410_udc_disable(udc);
1752 
1753 	return 0;
1754 }
1755 
1756 /*---------------------------------------------------------------------------*/
1757 static struct s3c2410_udc memory = {
1758 	.gadget = {
1759 		.ops		= &s3c2410_ops,
1760 		.ep0		= &memory.ep[0].ep,
1761 		.name		= gadget_name,
1762 		.dev = {
1763 			.init_name	= "gadget",
1764 		},
1765 	},
1766 
1767 	/* control endpoint */
1768 	.ep[0] = {
1769 		.num		= 0,
1770 		.ep = {
1771 			.name		= ep0name,
1772 			.ops		= &s3c2410_ep_ops,
1773 			.maxpacket	= EP0_FIFO_SIZE,
1774 		},
1775 		.dev		= &memory,
1776 	},
1777 
1778 	/* first group of endpoints */
1779 	.ep[1] = {
1780 		.num		= 1,
1781 		.ep = {
1782 			.name		= "ep1-bulk",
1783 			.ops		= &s3c2410_ep_ops,
1784 			.maxpacket	= EP_FIFO_SIZE,
1785 		},
1786 		.dev		= &memory,
1787 		.fifo_size	= EP_FIFO_SIZE,
1788 		.bEndpointAddress = 1,
1789 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1790 	},
1791 	.ep[2] = {
1792 		.num		= 2,
1793 		.ep = {
1794 			.name		= "ep2-bulk",
1795 			.ops		= &s3c2410_ep_ops,
1796 			.maxpacket	= EP_FIFO_SIZE,
1797 		},
1798 		.dev		= &memory,
1799 		.fifo_size	= EP_FIFO_SIZE,
1800 		.bEndpointAddress = 2,
1801 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1802 	},
1803 	.ep[3] = {
1804 		.num		= 3,
1805 		.ep = {
1806 			.name		= "ep3-bulk",
1807 			.ops		= &s3c2410_ep_ops,
1808 			.maxpacket	= EP_FIFO_SIZE,
1809 		},
1810 		.dev		= &memory,
1811 		.fifo_size	= EP_FIFO_SIZE,
1812 		.bEndpointAddress = 3,
1813 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1814 	},
1815 	.ep[4] = {
1816 		.num		= 4,
1817 		.ep = {
1818 			.name		= "ep4-bulk",
1819 			.ops		= &s3c2410_ep_ops,
1820 			.maxpacket	= EP_FIFO_SIZE,
1821 		},
1822 		.dev		= &memory,
1823 		.fifo_size	= EP_FIFO_SIZE,
1824 		.bEndpointAddress = 4,
1825 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
1826 	}
1827 
1828 };
1829 
1830 /*
1831  *	probe - binds to the platform device
1832  */
s3c2410_udc_probe(struct platform_device * pdev)1833 static int s3c2410_udc_probe(struct platform_device *pdev)
1834 {
1835 	struct s3c2410_udc *udc = &memory;
1836 	struct device *dev = &pdev->dev;
1837 	int retval;
1838 	int irq;
1839 
1840 	dev_dbg(dev, "%s()\n", __func__);
1841 
1842 	usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1843 	if (IS_ERR(usb_bus_clock)) {
1844 		dev_err(dev, "failed to get usb bus clock source\n");
1845 		return PTR_ERR(usb_bus_clock);
1846 	}
1847 
1848 	clk_enable(usb_bus_clock);
1849 
1850 	udc_clock = clk_get(NULL, "usb-device");
1851 	if (IS_ERR(udc_clock)) {
1852 		dev_err(dev, "failed to get udc clock source\n");
1853 		return PTR_ERR(udc_clock);
1854 	}
1855 
1856 	clk_enable(udc_clock);
1857 
1858 	mdelay(10);
1859 
1860 	dev_dbg(dev, "got and enabled clocks\n");
1861 
1862 	if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1863 		dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1864 		memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1865 		memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1866 		memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1867 		memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1868 	}
1869 
1870 	spin_lock_init (&udc->lock);
1871 	udc_info = pdev->dev.platform_data;
1872 
1873 	rsrc_start = S3C2410_PA_USBDEV;
1874 	rsrc_len   = S3C24XX_SZ_USBDEV;
1875 
1876 	if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1877 		return -EBUSY;
1878 
1879 	base_addr = ioremap(rsrc_start, rsrc_len);
1880 	if (!base_addr) {
1881 		retval = -ENOMEM;
1882 		goto err_mem;
1883 	}
1884 
1885 	device_initialize(&udc->gadget.dev);
1886 	udc->gadget.dev.parent = &pdev->dev;
1887 	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1888 
1889 	the_controller = udc;
1890 	platform_set_drvdata(pdev, udc);
1891 
1892 	s3c2410_udc_disable(udc);
1893 	s3c2410_udc_reinit(udc);
1894 
1895 	/* irq setup after old hardware state is cleaned up */
1896 	retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1897 			     0, gadget_name, udc);
1898 
1899 	if (retval != 0) {
1900 		dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1901 		retval = -EBUSY;
1902 		goto err_map;
1903 	}
1904 
1905 	dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1906 
1907 	if (udc_info && udc_info->vbus_pin > 0) {
1908 		retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1909 		if (retval < 0) {
1910 			dev_err(dev, "cannot claim vbus pin\n");
1911 			goto err_int;
1912 		}
1913 
1914 		irq = gpio_to_irq(udc_info->vbus_pin);
1915 		if (irq < 0) {
1916 			dev_err(dev, "no irq for gpio vbus pin\n");
1917 			goto err_gpio_claim;
1918 		}
1919 
1920 		retval = request_irq(irq, s3c2410_udc_vbus_irq,
1921 				     IRQF_TRIGGER_RISING
1922 				     | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1923 				     gadget_name, udc);
1924 
1925 		if (retval != 0) {
1926 			dev_err(dev, "can't get vbus irq %d, err %d\n",
1927 				irq, retval);
1928 			retval = -EBUSY;
1929 			goto err_gpio_claim;
1930 		}
1931 
1932 		dev_dbg(dev, "got irq %i\n", irq);
1933 	} else {
1934 		udc->vbus = 1;
1935 	}
1936 
1937 	if (udc_info && !udc_info->udc_command &&
1938 		gpio_is_valid(udc_info->pullup_pin)) {
1939 
1940 		retval = gpio_request_one(udc_info->pullup_pin,
1941 				udc_info->vbus_pin_inverted ?
1942 				GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1943 				"udc pullup");
1944 		if (retval)
1945 			goto err_vbus_irq;
1946 	}
1947 
1948 	retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1949 	if (retval)
1950 		goto err_add_udc;
1951 
1952 	if (s3c2410_udc_debugfs_root) {
1953 		udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1954 				s3c2410_udc_debugfs_root,
1955 				udc, &s3c2410_udc_debugfs_fops);
1956 		if (!udc->regs_info)
1957 			dev_warn(dev, "debugfs file creation failed\n");
1958 	}
1959 
1960 	dev_dbg(dev, "probe ok\n");
1961 
1962 	return 0;
1963 
1964 err_add_udc:
1965 	if (udc_info && !udc_info->udc_command &&
1966 			gpio_is_valid(udc_info->pullup_pin))
1967 		gpio_free(udc_info->pullup_pin);
1968 err_vbus_irq:
1969 	if (udc_info && udc_info->vbus_pin > 0)
1970 		free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1971 err_gpio_claim:
1972 	if (udc_info && udc_info->vbus_pin > 0)
1973 		gpio_free(udc_info->vbus_pin);
1974 err_int:
1975 	free_irq(IRQ_USBD, udc);
1976 err_map:
1977 	iounmap(base_addr);
1978 err_mem:
1979 	release_mem_region(rsrc_start, rsrc_len);
1980 
1981 	return retval;
1982 }
1983 
1984 /*
1985  *	s3c2410_udc_remove
1986  */
s3c2410_udc_remove(struct platform_device * pdev)1987 static int s3c2410_udc_remove(struct platform_device *pdev)
1988 {
1989 	struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1990 	unsigned int irq;
1991 
1992 	dev_dbg(&pdev->dev, "%s()\n", __func__);
1993 
1994 	usb_del_gadget_udc(&udc->gadget);
1995 	if (udc->driver)
1996 		return -EBUSY;
1997 
1998 	debugfs_remove(udc->regs_info);
1999 
2000 	if (udc_info && !udc_info->udc_command &&
2001 		gpio_is_valid(udc_info->pullup_pin))
2002 		gpio_free(udc_info->pullup_pin);
2003 
2004 	if (udc_info && udc_info->vbus_pin > 0) {
2005 		irq = gpio_to_irq(udc_info->vbus_pin);
2006 		free_irq(irq, udc);
2007 	}
2008 
2009 	free_irq(IRQ_USBD, udc);
2010 
2011 	iounmap(base_addr);
2012 	release_mem_region(rsrc_start, rsrc_len);
2013 
2014 	platform_set_drvdata(pdev, NULL);
2015 
2016 	if (!IS_ERR(udc_clock) && udc_clock != NULL) {
2017 		clk_disable(udc_clock);
2018 		clk_put(udc_clock);
2019 		udc_clock = NULL;
2020 	}
2021 
2022 	if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
2023 		clk_disable(usb_bus_clock);
2024 		clk_put(usb_bus_clock);
2025 		usb_bus_clock = NULL;
2026 	}
2027 
2028 	dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
2029 	return 0;
2030 }
2031 
2032 #ifdef CONFIG_PM
s3c2410_udc_suspend(struct platform_device * pdev,pm_message_t message)2033 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
2034 {
2035 	s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
2036 
2037 	return 0;
2038 }
2039 
s3c2410_udc_resume(struct platform_device * pdev)2040 static int s3c2410_udc_resume(struct platform_device *pdev)
2041 {
2042 	s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
2043 
2044 	return 0;
2045 }
2046 #else
2047 #define s3c2410_udc_suspend	NULL
2048 #define s3c2410_udc_resume	NULL
2049 #endif
2050 
2051 static const struct platform_device_id s3c_udc_ids[] = {
2052 	{ "s3c2410-usbgadget", },
2053 	{ "s3c2440-usbgadget", },
2054 	{ }
2055 };
2056 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
2057 
2058 static struct platform_driver udc_driver_24x0 = {
2059 	.driver		= {
2060 		.name	= "s3c24x0-usbgadget",
2061 		.owner	= THIS_MODULE,
2062 	},
2063 	.probe		= s3c2410_udc_probe,
2064 	.remove		= s3c2410_udc_remove,
2065 	.suspend	= s3c2410_udc_suspend,
2066 	.resume		= s3c2410_udc_resume,
2067 	.id_table	= s3c_udc_ids,
2068 };
2069 
udc_init(void)2070 static int __init udc_init(void)
2071 {
2072 	int retval;
2073 
2074 	dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2075 
2076 	s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2077 	if (IS_ERR(s3c2410_udc_debugfs_root)) {
2078 		printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2079 			gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2080 		s3c2410_udc_debugfs_root = NULL;
2081 	}
2082 
2083 	retval = platform_driver_register(&udc_driver_24x0);
2084 	if (retval)
2085 		goto err;
2086 
2087 	return 0;
2088 
2089 err:
2090 	debugfs_remove(s3c2410_udc_debugfs_root);
2091 	return retval;
2092 }
2093 
udc_exit(void)2094 static void __exit udc_exit(void)
2095 {
2096 	platform_driver_unregister(&udc_driver_24x0);
2097 	debugfs_remove(s3c2410_udc_debugfs_root);
2098 }
2099 
2100 module_init(udc_init);
2101 module_exit(udc_exit);
2102 
2103 MODULE_AUTHOR(DRIVER_AUTHOR);
2104 MODULE_DESCRIPTION(DRIVER_DESC);
2105 MODULE_VERSION(DRIVER_VERSION);
2106 MODULE_LICENSE("GPL");
2107