1 /*
2 * Adaptec AIC7xxx device driver for Linux.
3 *
4 * Copyright (c) 1994 John Aycock
5 * The University of Calgary Department of Computer Science.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Copyright (c) 2000-2003 Adaptec Inc.
22 * All rights reserved.
23 *
24 * Redistribution and use in source and binary forms, with or without
25 * modification, are permitted provided that the following conditions
26 * are met:
27 * 1. Redistributions of source code must retain the above copyright
28 * notice, this list of conditions, and the following disclaimer,
29 * without modification.
30 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
31 * substantially similar to the "NO WARRANTY" disclaimer below
32 * ("Disclaimer") and any redistribution must be conditioned upon
33 * including a substantially similar Disclaimer requirement for further
34 * binary redistribution.
35 * 3. Neither the names of the above-listed copyright holders nor the names
36 * of any contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * Alternatively, this software may be distributed under the terms of the
40 * GNU General Public License ("GPL") version 2 as published by the Free
41 * Software Foundation.
42 *
43 * NO WARRANTY
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
47 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
52 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
53 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
54 * POSSIBILITY OF SUCH DAMAGES.
55 *
56 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $
57 *
58 */
59 #ifndef _AIC7XXX_LINUX_H_
60 #define _AIC7XXX_LINUX_H_
61
62 #include <linux/types.h>
63 #include <linux/blkdev.h>
64 #include <linux/delay.h>
65 #include <linux/ioport.h>
66 #include <linux/pci.h>
67 #include <linux/interrupt.h>
68 #include <linux/module.h>
69 #include <linux/slab.h>
70 #include <asm/byteorder.h>
71 #include <asm/io.h>
72
73 #include <scsi/scsi.h>
74 #include <scsi/scsi_cmnd.h>
75 #include <scsi/scsi_eh.h>
76 #include <scsi/scsi_device.h>
77 #include <scsi/scsi_host.h>
78 #include <scsi/scsi_tcq.h>
79 #include <scsi/scsi_transport.h>
80 #include <scsi/scsi_transport_spi.h>
81
82 /* Core SCSI definitions */
83 #define AIC_LIB_PREFIX ahc
84
85 /* Name space conflict with BSD queue macros */
86 #ifdef LIST_HEAD
87 #undef LIST_HEAD
88 #endif
89
90 #include "cam.h"
91 #include "queue.h"
92 #include "scsi_message.h"
93 #include "aiclib.h"
94
95 /*********************************** Debugging ********************************/
96 #ifdef CONFIG_AIC7XXX_DEBUG_ENABLE
97 #ifdef CONFIG_AIC7XXX_DEBUG_MASK
98 #define AHC_DEBUG 1
99 #define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK
100 #else
101 /*
102 * Compile in debugging code, but do not enable any printfs.
103 */
104 #define AHC_DEBUG 1
105 #endif
106 /* No debugging code. */
107 #endif
108
109 /************************* Forward Declarations *******************************/
110 struct ahc_softc;
111 typedef struct pci_dev *ahc_dev_softc_t;
112 typedef struct scsi_cmnd *ahc_io_ctx_t;
113
114 /******************************* Byte Order ***********************************/
115 #define ahc_htobe16(x) cpu_to_be16(x)
116 #define ahc_htobe32(x) cpu_to_be32(x)
117 #define ahc_htobe64(x) cpu_to_be64(x)
118 #define ahc_htole16(x) cpu_to_le16(x)
119 #define ahc_htole32(x) cpu_to_le32(x)
120 #define ahc_htole64(x) cpu_to_le64(x)
121
122 #define ahc_be16toh(x) be16_to_cpu(x)
123 #define ahc_be32toh(x) be32_to_cpu(x)
124 #define ahc_be64toh(x) be64_to_cpu(x)
125 #define ahc_le16toh(x) le16_to_cpu(x)
126 #define ahc_le32toh(x) le32_to_cpu(x)
127 #define ahc_le64toh(x) le64_to_cpu(x)
128
129 /************************* Configuration Data *********************************/
130 extern u_int aic7xxx_no_probe;
131 extern u_int aic7xxx_allow_memio;
132 extern struct scsi_host_template aic7xxx_driver_template;
133
134 /***************************** Bus Space/DMA **********************************/
135
136 typedef uint32_t bus_size_t;
137
138 typedef enum {
139 BUS_SPACE_MEMIO,
140 BUS_SPACE_PIO
141 } bus_space_tag_t;
142
143 typedef union {
144 u_long ioport;
145 volatile uint8_t __iomem *maddr;
146 } bus_space_handle_t;
147
148 typedef struct bus_dma_segment
149 {
150 dma_addr_t ds_addr;
151 bus_size_t ds_len;
152 } bus_dma_segment_t;
153
154 struct ahc_linux_dma_tag
155 {
156 bus_size_t alignment;
157 bus_size_t boundary;
158 bus_size_t maxsize;
159 };
160 typedef struct ahc_linux_dma_tag* bus_dma_tag_t;
161
162 typedef dma_addr_t bus_dmamap_t;
163
164 typedef int bus_dma_filter_t(void*, dma_addr_t);
165 typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
166
167 #define BUS_DMA_WAITOK 0x0
168 #define BUS_DMA_NOWAIT 0x1
169 #define BUS_DMA_ALLOCNOW 0x2
170 #define BUS_DMA_LOAD_SEGS 0x4 /*
171 * Argument is an S/G list not
172 * a single buffer.
173 */
174
175 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
176 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
177 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
178
179 int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/,
180 bus_size_t /*alignment*/, bus_size_t /*boundary*/,
181 dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
182 bus_dma_filter_t*/*filter*/, void */*filterarg*/,
183 bus_size_t /*maxsize*/, int /*nsegments*/,
184 bus_size_t /*maxsegsz*/, int /*flags*/,
185 bus_dma_tag_t */*dma_tagp*/);
186
187 void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/);
188
189 int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
190 void** /*vaddr*/, int /*flags*/,
191 bus_dmamap_t* /*mapp*/);
192
193 void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/,
194 void* /*vaddr*/, bus_dmamap_t /*map*/);
195
196 void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/,
197 bus_dmamap_t /*map*/);
198
199 int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/,
200 bus_dmamap_t /*map*/, void * /*buf*/,
201 bus_size_t /*buflen*/, bus_dmamap_callback_t *,
202 void */*callback_arg*/, int /*flags*/);
203
204 int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t);
205
206 /*
207 * Operations performed by ahc_dmamap_sync().
208 */
209 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
210 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
211 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
212 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
213
214 /*
215 * XXX
216 * ahc_dmamap_sync is only used on buffers allocated with
217 * the pci_alloc_consistent() API. Although I'm not sure how
218 * this works on architectures with a write buffer, Linux does
219 * not have an API to sync "coherent" memory. Perhaps we need
220 * to do an mb()?
221 */
222 #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op)
223
224 /********************************** Includes **********************************/
225 #ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT
226 #define AIC_DEBUG_REGISTERS 1
227 #else
228 #define AIC_DEBUG_REGISTERS 0
229 #endif
230 #include "aic7xxx.h"
231
232 /***************************** Timer Facilities *******************************/
233 static inline void
ahc_scb_timer_reset(struct scb * scb,u_int usec)234 ahc_scb_timer_reset(struct scb *scb, u_int usec)
235 {
236 }
237
238 /***************************** SMP support ************************************/
239 #include <linux/spinlock.h>
240
241 #define AIC7XXX_DRIVER_VERSION "7.0"
242
243 /*************************** Device Data Structures ***************************/
244 /*
245 * A per probed device structure used to deal with some error recovery
246 * scenarios that the Linux mid-layer code just doesn't know how to
247 * handle. The structure allocated for a device only becomes persistent
248 * after a successfully completed inquiry command to the target when
249 * that inquiry data indicates a lun is present.
250 */
251 typedef enum {
252 AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
253 AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
254 AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
255 AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
256 } ahc_linux_dev_flags;
257
258 struct ahc_linux_device {
259 /*
260 * The number of transactions currently
261 * queued to the device.
262 */
263 int active;
264
265 /*
266 * The currently allowed number of
267 * transactions that can be queued to
268 * the device. Must be signed for
269 * conversion from tagged to untagged
270 * mode where the device may have more
271 * than one outstanding active transaction.
272 */
273 int openings;
274
275 /*
276 * A positive count indicates that this
277 * device's queue is halted.
278 */
279 u_int qfrozen;
280
281 /*
282 * Cumulative command counter.
283 */
284 u_long commands_issued;
285
286 /*
287 * The number of tagged transactions when
288 * running at our current opening level
289 * that have been successfully received by
290 * this device since the last QUEUE FULL.
291 */
292 u_int tag_success_count;
293 #define AHC_TAG_SUCCESS_INTERVAL 50
294
295 ahc_linux_dev_flags flags;
296
297 /*
298 * The high limit for the tags variable.
299 */
300 u_int maxtags;
301
302 /*
303 * The computed number of tags outstanding
304 * at the time of the last QUEUE FULL event.
305 */
306 u_int tags_on_last_queuefull;
307
308 /*
309 * How many times we have seen a queue full
310 * with the same number of tags. This is used
311 * to stop our adaptive queue depth algorithm
312 * on devices with a fixed number of tags.
313 */
314 u_int last_queuefull_same_count;
315 #define AHC_LOCK_TAGS_COUNT 50
316
317 /*
318 * How many transactions have been queued
319 * without the device going idle. We use
320 * this statistic to determine when to issue
321 * an ordered tag to prevent transaction
322 * starvation. This statistic is only updated
323 * if the AHC_DEV_PERIODIC_OTAG flag is set
324 * on this device.
325 */
326 u_int commands_since_idle_or_otag;
327 #define AHC_OTAG_THRESH 500
328 };
329
330 /********************* Definitions Required by the Core ***********************/
331 /*
332 * Number of SG segments we require. So long as the S/G segments for
333 * a particular transaction are allocated in a physically contiguous
334 * manner and are allocated below 4GB, the number of S/G segments is
335 * unrestricted.
336 */
337 #define AHC_NSEG 128
338
339 /*
340 * Per-SCB OSM storage.
341 */
342 struct scb_platform_data {
343 struct ahc_linux_device *dev;
344 dma_addr_t buf_busaddr;
345 uint32_t xfer_len;
346 uint32_t sense_resid; /* Auto-Sense residual */
347 };
348
349 /*
350 * Define a structure used for each host adapter. All members are
351 * aligned on a boundary >= the size of the member to honor the
352 * alignment restrictions of the various platforms supported by
353 * this driver.
354 */
355 struct ahc_platform_data {
356 /*
357 * Fields accessed from interrupt context.
358 */
359 struct scsi_target *starget[AHC_NUM_TARGETS];
360
361 spinlock_t spin_lock;
362 u_int qfrozen;
363 struct completion *eh_done;
364 struct Scsi_Host *host; /* pointer to scsi host */
365 #define AHC_LINUX_NOIRQ ((uint32_t)~0)
366 uint32_t irq; /* IRQ for this adapter */
367 uint32_t bios_address;
368 resource_size_t mem_busaddr; /* Mem Base Addr */
369 };
370
371 void ahc_delay(long);
372
373
374 /***************************** Low Level I/O **********************************/
375 uint8_t ahc_inb(struct ahc_softc * ahc, long port);
376 void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
377 void ahc_outsb(struct ahc_softc * ahc, long port,
378 uint8_t *, int count);
379 void ahc_insb(struct ahc_softc * ahc, long port,
380 uint8_t *, int count);
381
382 /**************************** Initialization **********************************/
383 int ahc_linux_register_host(struct ahc_softc *,
384 struct scsi_host_template *);
385
386 /*************************** Pretty Printing **********************************/
387 struct info_str {
388 char *buffer;
389 int length;
390 off_t offset;
391 int pos;
392 };
393
394 /******************************** Locking *************************************/
395 /* Lock protecting internal data structures */
396
397 static inline void
ahc_lockinit(struct ahc_softc * ahc)398 ahc_lockinit(struct ahc_softc *ahc)
399 {
400 spin_lock_init(&ahc->platform_data->spin_lock);
401 }
402
403 static inline void
ahc_lock(struct ahc_softc * ahc,unsigned long * flags)404 ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
405 {
406 spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags);
407 }
408
409 static inline void
ahc_unlock(struct ahc_softc * ahc,unsigned long * flags)410 ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
411 {
412 spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags);
413 }
414
415 /******************************* PCI Definitions ******************************/
416 /*
417 * PCIM_xxx: mask to locate subfield in register
418 * PCIR_xxx: config register offset
419 * PCIC_xxx: device class
420 * PCIS_xxx: device subclass
421 * PCIP_xxx: device programming interface
422 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
423 * PCID_xxx: device ID
424 */
425 #define PCIR_DEVVENDOR 0x00
426 #define PCIR_VENDOR 0x00
427 #define PCIR_DEVICE 0x02
428 #define PCIR_COMMAND 0x04
429 #define PCIM_CMD_PORTEN 0x0001
430 #define PCIM_CMD_MEMEN 0x0002
431 #define PCIM_CMD_BUSMASTEREN 0x0004
432 #define PCIM_CMD_MWRICEN 0x0010
433 #define PCIM_CMD_PERRESPEN 0x0040
434 #define PCIM_CMD_SERRESPEN 0x0100
435 #define PCIR_STATUS 0x06
436 #define PCIR_REVID 0x08
437 #define PCIR_PROGIF 0x09
438 #define PCIR_SUBCLASS 0x0a
439 #define PCIR_CLASS 0x0b
440 #define PCIR_CACHELNSZ 0x0c
441 #define PCIR_LATTIMER 0x0d
442 #define PCIR_HEADERTYPE 0x0e
443 #define PCIM_MFDEV 0x80
444 #define PCIR_BIST 0x0f
445 #define PCIR_CAP_PTR 0x34
446
447 /* config registers for header type 0 devices */
448 #define PCIR_MAPS 0x10
449 #define PCIR_SUBVEND_0 0x2c
450 #define PCIR_SUBDEV_0 0x2e
451
452 typedef enum
453 {
454 AHC_POWER_STATE_D0,
455 AHC_POWER_STATE_D1,
456 AHC_POWER_STATE_D2,
457 AHC_POWER_STATE_D3
458 } ahc_power_state;
459
460 /**************************** VL/EISA Routines ********************************/
461 #ifdef CONFIG_EISA
462 int ahc_linux_eisa_init(void);
463 void ahc_linux_eisa_exit(void);
464 int aic7770_map_registers(struct ahc_softc *ahc,
465 u_int port);
466 int aic7770_map_int(struct ahc_softc *ahc, u_int irq);
467 #else
ahc_linux_eisa_init(void)468 static inline int ahc_linux_eisa_init(void) {
469 return -ENODEV;
470 }
ahc_linux_eisa_exit(void)471 static inline void ahc_linux_eisa_exit(void) {
472 }
473 #endif
474
475 /******************************* PCI Routines *********************************/
476 #ifdef CONFIG_PCI
477 int ahc_linux_pci_init(void);
478 void ahc_linux_pci_exit(void);
479 int ahc_pci_map_registers(struct ahc_softc *ahc);
480 int ahc_pci_map_int(struct ahc_softc *ahc);
481
482 uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
483 int reg, int width);
484
485 void ahc_pci_write_config(ahc_dev_softc_t pci,
486 int reg, uint32_t value,
487 int width);
488
489 static inline int ahc_get_pci_function(ahc_dev_softc_t);
490 static inline int
ahc_get_pci_function(ahc_dev_softc_t pci)491 ahc_get_pci_function(ahc_dev_softc_t pci)
492 {
493 return (PCI_FUNC(pci->devfn));
494 }
495
496 static inline int ahc_get_pci_slot(ahc_dev_softc_t);
497 static inline int
ahc_get_pci_slot(ahc_dev_softc_t pci)498 ahc_get_pci_slot(ahc_dev_softc_t pci)
499 {
500 return (PCI_SLOT(pci->devfn));
501 }
502
503 static inline int ahc_get_pci_bus(ahc_dev_softc_t);
504 static inline int
ahc_get_pci_bus(ahc_dev_softc_t pci)505 ahc_get_pci_bus(ahc_dev_softc_t pci)
506 {
507 return (pci->bus->number);
508 }
509 #else
ahc_linux_pci_init(void)510 static inline int ahc_linux_pci_init(void) {
511 return 0;
512 }
ahc_linux_pci_exit(void)513 static inline void ahc_linux_pci_exit(void) {
514 }
515 #endif
516
517 static inline void ahc_flush_device_writes(struct ahc_softc *);
518 static inline void
ahc_flush_device_writes(struct ahc_softc * ahc)519 ahc_flush_device_writes(struct ahc_softc *ahc)
520 {
521 /* XXX Is this sufficient for all architectures??? */
522 ahc_inb(ahc, INTSTAT);
523 }
524
525 /**************************** Proc FS Support *********************************/
526 int ahc_linux_proc_info(struct Scsi_Host *, char *, char **,
527 off_t, int, int);
528
529 /*************************** Domain Validation ********************************/
530 /*********************** Transaction Access Wrappers *************************/
531 static inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
532 static inline void ahc_set_transaction_status(struct scb *, uint32_t);
533 static inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
534 static inline void ahc_set_scsi_status(struct scb *, uint32_t);
535 static inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd);
536 static inline uint32_t ahc_get_transaction_status(struct scb *);
537 static inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd);
538 static inline uint32_t ahc_get_scsi_status(struct scb *);
539 static inline void ahc_set_transaction_tag(struct scb *, int, u_int);
540 static inline u_long ahc_get_transfer_length(struct scb *);
541 static inline int ahc_get_transfer_dir(struct scb *);
542 static inline void ahc_set_residual(struct scb *, u_long);
543 static inline void ahc_set_sense_residual(struct scb *scb, u_long resid);
544 static inline u_long ahc_get_residual(struct scb *);
545 static inline u_long ahc_get_sense_residual(struct scb *);
546 static inline int ahc_perform_autosense(struct scb *);
547 static inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *,
548 struct scb *);
549 static inline void ahc_notify_xfer_settings_change(struct ahc_softc *,
550 struct ahc_devinfo *);
551 static inline void ahc_platform_scb_free(struct ahc_softc *ahc,
552 struct scb *scb);
553 static inline void ahc_freeze_scb(struct scb *scb);
554
555 static inline
ahc_cmd_set_transaction_status(struct scsi_cmnd * cmd,uint32_t status)556 void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
557 {
558 cmd->result &= ~(CAM_STATUS_MASK << 16);
559 cmd->result |= status << 16;
560 }
561
562 static inline
ahc_set_transaction_status(struct scb * scb,uint32_t status)563 void ahc_set_transaction_status(struct scb *scb, uint32_t status)
564 {
565 ahc_cmd_set_transaction_status(scb->io_ctx,status);
566 }
567
568 static inline
ahc_cmd_set_scsi_status(struct scsi_cmnd * cmd,uint32_t status)569 void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
570 {
571 cmd->result &= ~0xFFFF;
572 cmd->result |= status;
573 }
574
575 static inline
ahc_set_scsi_status(struct scb * scb,uint32_t status)576 void ahc_set_scsi_status(struct scb *scb, uint32_t status)
577 {
578 ahc_cmd_set_scsi_status(scb->io_ctx, status);
579 }
580
581 static inline
ahc_cmd_get_transaction_status(struct scsi_cmnd * cmd)582 uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd)
583 {
584 return ((cmd->result >> 16) & CAM_STATUS_MASK);
585 }
586
587 static inline
ahc_get_transaction_status(struct scb * scb)588 uint32_t ahc_get_transaction_status(struct scb *scb)
589 {
590 return (ahc_cmd_get_transaction_status(scb->io_ctx));
591 }
592
593 static inline
ahc_cmd_get_scsi_status(struct scsi_cmnd * cmd)594 uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd)
595 {
596 return (cmd->result & 0xFFFF);
597 }
598
599 static inline
ahc_get_scsi_status(struct scb * scb)600 uint32_t ahc_get_scsi_status(struct scb *scb)
601 {
602 return (ahc_cmd_get_scsi_status(scb->io_ctx));
603 }
604
605 static inline
ahc_set_transaction_tag(struct scb * scb,int enabled,u_int type)606 void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
607 {
608 /*
609 * Nothing to do for linux as the incoming transaction
610 * has no concept of tag/non tagged, etc.
611 */
612 }
613
614 static inline
ahc_get_transfer_length(struct scb * scb)615 u_long ahc_get_transfer_length(struct scb *scb)
616 {
617 return (scb->platform_data->xfer_len);
618 }
619
620 static inline
ahc_get_transfer_dir(struct scb * scb)621 int ahc_get_transfer_dir(struct scb *scb)
622 {
623 return (scb->io_ctx->sc_data_direction);
624 }
625
626 static inline
ahc_set_residual(struct scb * scb,u_long resid)627 void ahc_set_residual(struct scb *scb, u_long resid)
628 {
629 scsi_set_resid(scb->io_ctx, resid);
630 }
631
632 static inline
ahc_set_sense_residual(struct scb * scb,u_long resid)633 void ahc_set_sense_residual(struct scb *scb, u_long resid)
634 {
635 scb->platform_data->sense_resid = resid;
636 }
637
638 static inline
ahc_get_residual(struct scb * scb)639 u_long ahc_get_residual(struct scb *scb)
640 {
641 return scsi_get_resid(scb->io_ctx);
642 }
643
644 static inline
ahc_get_sense_residual(struct scb * scb)645 u_long ahc_get_sense_residual(struct scb *scb)
646 {
647 return (scb->platform_data->sense_resid);
648 }
649
650 static inline
ahc_perform_autosense(struct scb * scb)651 int ahc_perform_autosense(struct scb *scb)
652 {
653 /*
654 * We always perform autosense in Linux.
655 * On other platforms this is set on a
656 * per-transaction basis.
657 */
658 return (1);
659 }
660
661 static inline uint32_t
ahc_get_sense_bufsize(struct ahc_softc * ahc,struct scb * scb)662 ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
663 {
664 return (sizeof(struct scsi_sense_data));
665 }
666
667 static inline void
ahc_notify_xfer_settings_change(struct ahc_softc * ahc,struct ahc_devinfo * devinfo)668 ahc_notify_xfer_settings_change(struct ahc_softc *ahc,
669 struct ahc_devinfo *devinfo)
670 {
671 /* Nothing to do here for linux */
672 }
673
674 static inline void
ahc_platform_scb_free(struct ahc_softc * ahc,struct scb * scb)675 ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
676 {
677 }
678
679 int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
680 void ahc_platform_free(struct ahc_softc *ahc);
681 void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
682
683 static inline void
ahc_freeze_scb(struct scb * scb)684 ahc_freeze_scb(struct scb *scb)
685 {
686 if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
687 scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
688 scb->platform_data->dev->qfrozen++;
689 }
690 }
691
692 void ahc_platform_set_tags(struct ahc_softc *ahc, struct scsi_device *sdev,
693 struct ahc_devinfo *devinfo, ahc_queue_alg);
694 int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
695 char channel, int lun, u_int tag,
696 role_t role, uint32_t status);
697 irqreturn_t
698 ahc_linux_isr(int irq, void *dev_id);
699 void ahc_platform_flushwork(struct ahc_softc *ahc);
700 void ahc_done(struct ahc_softc*, struct scb*);
701 void ahc_send_async(struct ahc_softc *, char channel,
702 u_int target, u_int lun, ac_code);
703 void ahc_print_path(struct ahc_softc *, struct scb *);
704 void ahc_platform_dump_card_state(struct ahc_softc *ahc);
705
706 #ifdef CONFIG_PCI
707 #define AHC_PCI_CONFIG 1
708 #else
709 #define AHC_PCI_CONFIG 0
710 #endif
711 #define bootverbose aic7xxx_verbose
712 extern u_int aic7xxx_verbose;
713 #endif /* _AIC7XXX_LINUX_H_ */
714