1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * Tmis program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * Tmis program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * tmis program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * Tme full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *****************************************************************************/
28
29 #ifndef __RTL_DEBUG_H__
30 #define __RTL_DEBUG_H__
31
32 /*--------------------------------------------------------------
33 Debug level
34 --------------------------------------------------------------*/
35 /*
36 *Fatal bug.
37 *For example, Tx/Rx/IO locked up,
38 *memory access violation,
39 *resource allocation failed,
40 *unexpected HW behavior, HW BUG
41 *and so on.
42 */
43 #define DBG_EMERG 0
44
45 /*
46 *Abnormal, rare, or unexpeted cases.
47 *For example, Packet/IO Ctl canceled,
48 *device suprisely unremoved and so on.
49 */
50 #define DBG_WARNING 2
51
52 /*
53 *Normal case driver developer should
54 *open, we can see link status like
55 *assoc/AddBA/DHCP/adapter start and
56 *so on basic and useful infromations.
57 */
58 #define DBG_DMESG 3
59
60 /*
61 *Normal case with useful information
62 *about current SW or HW state.
63 *For example, Tx/Rx descriptor to fill,
64 *Tx/Rx descriptor completed status,
65 *SW protocol state change, dynamic
66 *mechanism state change and so on.
67 */
68 #define DBG_LOUD 4
69
70 /*
71 *Normal case with detail execution
72 *flow or information.
73 */
74 #define DBG_TRACE 5
75
76 /*--------------------------------------------------------------
77 Define the rt_trace components
78 --------------------------------------------------------------*/
79 #define COMP_ERR BIT(0)
80 #define COMP_FW BIT(1)
81 #define COMP_INIT BIT(2) /*For init/deinit */
82 #define COMP_RECV BIT(3) /*For Rx. */
83 #define COMP_SEND BIT(4) /*For Tx. */
84 #define COMP_MLME BIT(5) /*For MLME. */
85 #define COMP_SCAN BIT(6) /*For Scan. */
86 #define COMP_INTR BIT(7) /*For interrupt Related. */
87 #define COMP_LED BIT(8) /*For LED. */
88 #define COMP_SEC BIT(9) /*For sec. */
89 #define COMP_BEACON BIT(10) /*For beacon. */
90 #define COMP_RATE BIT(11) /*For rate. */
91 #define COMP_RXDESC BIT(12) /*For rx desc. */
92 #define COMP_DIG BIT(13) /*For DIG */
93 #define COMP_TXAGC BIT(14) /*For Tx power */
94 #define COMP_HIPWR BIT(15) /*For High Power Mechanism */
95 #define COMP_POWER BIT(16) /*For lps/ips/aspm. */
96 #define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */
97 #define COMP_BB_POWERSAVING BIT(18)
98 #define COMP_SWAS BIT(19) /*For SW Antenna Switch */
99 #define COMP_RF BIT(20) /*For RF. */
100 #define COMP_TURBO BIT(21) /*For EDCA TURBO. */
101 #define COMP_RATR BIT(22)
102 #define COMP_CMD BIT(23)
103 #define COMP_EFUSE BIT(24)
104 #define COMP_QOS BIT(25)
105 #define COMP_MAC80211 BIT(26)
106 #define COMP_REGD BIT(27)
107 #define COMP_CHAN BIT(28)
108 #define COMP_USB BIT(29)
109
110 /*--------------------------------------------------------------
111 Define the rt_print components
112 --------------------------------------------------------------*/
113 /* Define EEPROM and EFUSE check module bit*/
114 #define EEPROM_W BIT(0)
115 #define EFUSE_PG BIT(1)
116 #define EFUSE_READ_ALL BIT(2)
117
118 /* Define init check for module bit*/
119 #define INIT_EEPROM BIT(0)
120 #define INIT_TxPower BIT(1)
121 #define INIT_IQK BIT(2)
122 #define INIT_RF BIT(3)
123
124 /* Define PHY-BB/RF/MAC check module bit */
125 #define PHY_BBR BIT(0)
126 #define PHY_BBW BIT(1)
127 #define PHY_RFR BIT(2)
128 #define PHY_RFW BIT(3)
129 #define PHY_MACR BIT(4)
130 #define PHY_MACW BIT(5)
131 #define PHY_ALLR BIT(6)
132 #define PHY_ALLW BIT(7)
133 #define PHY_TXPWR BIT(8)
134 #define PHY_PWRDIFF BIT(9)
135
136 enum dbgp_flag_e {
137 FQOS = 0,
138 FTX = 1,
139 FRX = 2,
140 FSEC = 3,
141 FMGNT = 4,
142 FMLME = 5,
143 FRESOURCE = 6,
144 FBEACON = 7,
145 FISR = 8,
146 FPHY = 9,
147 FMP = 10,
148 FEEPROM = 11,
149 FPWR = 12,
150 FDM = 13,
151 FDBGCtrl = 14,
152 FC2H = 15,
153 FBT = 16,
154 FINIT = 17,
155 FIOCTL = 18,
156 DBGP_TYPE_MAX
157 };
158
159 #ifdef CONFIG_RTLWIFI_DEBUG
160
161 #define RT_ASSERT(_exp, fmt, ...) \
162 do { \
163 if (!(_exp)) { \
164 printk(KERN_DEBUG KBUILD_MODNAME ":%s(): " fmt, \
165 __func__, ##__VA_ARGS__); \
166 } \
167 } while (0)
168
169 #define RT_TRACE(rtlpriv, comp, level, fmt, ...) \
170 do { \
171 if (unlikely(((comp) & rtlpriv->dbg.global_debugcomponents) && \
172 ((level) <= rtlpriv->dbg.global_debuglevel))) { \
173 printk(KERN_DEBUG KBUILD_MODNAME ":%s():<%lx-%x> " fmt, \
174 __func__, in_interrupt(), in_atomic(), \
175 ##__VA_ARGS__); \
176 } \
177 } while (0)
178
179 #define RTPRINT(rtlpriv, dbgtype, dbgflag, fmt, ...) \
180 do { \
181 if (unlikely(rtlpriv->dbg.dbgp_type[dbgtype] & dbgflag)) { \
182 printk(KERN_DEBUG KBUILD_MODNAME ": " fmt, \
183 ##__VA_ARGS__); \
184 } \
185 } while (0)
186
187 #define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata, \
188 _hexdatalen) \
189 do { \
190 if (unlikely(((_comp) & rtlpriv->dbg.global_debugcomponents) && \
191 (_level <= rtlpriv->dbg.global_debuglevel))) { \
192 printk(KERN_DEBUG "%s: In process \"%s\" (pid %i): %s\n", \
193 KBUILD_MODNAME, current->comm, current->pid, \
194 _titlestring); \
195 print_hex_dump_bytes("", DUMP_PREFIX_NONE, \
196 _hexdata, _hexdatalen); \
197 } \
198 } while (0)
199
200 #else
201
202 struct rtl_priv;
203
204 __printf(2, 3)
RT_ASSERT(int exp,const char * fmt,...)205 static inline void RT_ASSERT(int exp, const char *fmt, ...)
206 {
207 }
208
209 __printf(4, 5)
RT_TRACE(struct rtl_priv * rtlpriv,int comp,int level,const char * fmt,...)210 static inline void RT_TRACE(struct rtl_priv *rtlpriv,
211 int comp, int level,
212 const char *fmt, ...)
213 {
214 }
215
216 __printf(4, 5)
RTPRINT(struct rtl_priv * rtlpriv,int dbgtype,int dbgflag,const char * fmt,...)217 static inline void RTPRINT(struct rtl_priv *rtlpriv,
218 int dbgtype, int dbgflag,
219 const char *fmt, ...)
220 {
221 }
222
RT_PRINT_DATA(struct rtl_priv * rtlpriv,int comp,int level,const char * titlestring,const void * hexdata,size_t hexdatalen)223 static inline void RT_PRINT_DATA(struct rtl_priv *rtlpriv,
224 int comp, int level,
225 const char *titlestring,
226 const void *hexdata, size_t hexdatalen)
227 {
228 }
229
230 #endif
231
232 void rtl_dbgp_flag_init(struct ieee80211_hw *hw);
233 #endif
234