1 /**
2 *
3 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4 *
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the in kernel v4l1 w9968cf driver:
8 *
9 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27 /* Note this is not a stand alone driver, it gets included in ov519.c, this
28 is a bit of a hack, but it needs the driver code for a lot of different
29 ov sensors which is already present in ov519.c (the old v4l1 driver used
30 the ovchipcam framework). When we have the time we really should move
31 the sensor drivers to v4l2 sub drivers, and properly split of this
32 driver from ov519.c */
33
34 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35
36 #define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
37
38 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
39 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
40
41 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
42 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
43 .bytesperline = 160 * 2,
44 .sizeimage = 160 * 120 * 2,
45 .colorspace = V4L2_COLORSPACE_JPEG},
46 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
47 .bytesperline = 176 * 2,
48 .sizeimage = 176 * 144 * 2,
49 .colorspace = V4L2_COLORSPACE_JPEG},
50 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
51 .bytesperline = 320 * 2,
52 .sizeimage = 320 * 240 * 2,
53 .colorspace = V4L2_COLORSPACE_JPEG},
54 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
55 .bytesperline = 352 * 2,
56 .sizeimage = 352 * 288 * 2,
57 .colorspace = V4L2_COLORSPACE_JPEG},
58 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
59 .bytesperline = 640 * 2,
60 .sizeimage = 640 * 480 * 2,
61 .colorspace = V4L2_COLORSPACE_JPEG},
62 };
63
64 static void reg_w(struct sd *sd, u16 index, u16 value);
65
66 /*--------------------------------------------------------------------------
67 Write 64-bit data to the fast serial bus registers.
68 Return 0 on success, -1 otherwise.
69 --------------------------------------------------------------------------*/
w9968cf_write_fsb(struct sd * sd,u16 * data)70 static void w9968cf_write_fsb(struct sd *sd, u16* data)
71 {
72 struct usb_device *udev = sd->gspca_dev.dev;
73 u16 value;
74 int ret;
75
76 if (sd->gspca_dev.usb_err < 0)
77 return;
78
79 value = *data++;
80 memcpy(sd->gspca_dev.usb_buf, data, 6);
81
82 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
83 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
84 value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
85 if (ret < 0) {
86 pr_err("Write FSB registers failed (%d)\n", ret);
87 sd->gspca_dev.usb_err = ret;
88 }
89 }
90
91 /*--------------------------------------------------------------------------
92 Write data to the serial bus control register.
93 Return 0 on success, a negative number otherwise.
94 --------------------------------------------------------------------------*/
w9968cf_write_sb(struct sd * sd,u16 value)95 static void w9968cf_write_sb(struct sd *sd, u16 value)
96 {
97 int ret;
98
99 if (sd->gspca_dev.usb_err < 0)
100 return;
101
102 /* We don't use reg_w here, as that would cause all writes when
103 bitbanging i2c to be logged, making the logs impossible to read */
104 ret = usb_control_msg(sd->gspca_dev.dev,
105 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
106 0,
107 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
108 value, 0x01, NULL, 0, 500);
109
110 udelay(W9968CF_I2C_BUS_DELAY);
111
112 if (ret < 0) {
113 pr_err("Write SB reg [01] %04x failed\n", value);
114 sd->gspca_dev.usb_err = ret;
115 }
116 }
117
118 /*--------------------------------------------------------------------------
119 Read data from the serial bus control register.
120 Return 0 on success, a negative number otherwise.
121 --------------------------------------------------------------------------*/
w9968cf_read_sb(struct sd * sd)122 static int w9968cf_read_sb(struct sd *sd)
123 {
124 int ret;
125
126 if (sd->gspca_dev.usb_err < 0)
127 return -1;
128
129 /* We don't use reg_r here, as the w9968cf is special and has 16
130 bit registers instead of 8 bit */
131 ret = usb_control_msg(sd->gspca_dev.dev,
132 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
133 1,
134 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
135 0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
136 if (ret >= 0) {
137 ret = sd->gspca_dev.usb_buf[0] |
138 (sd->gspca_dev.usb_buf[1] << 8);
139 } else {
140 pr_err("Read SB reg [01] failed\n");
141 sd->gspca_dev.usb_err = ret;
142 }
143
144 udelay(W9968CF_I2C_BUS_DELAY);
145
146 return ret;
147 }
148
149 /*--------------------------------------------------------------------------
150 Upload quantization tables for the JPEG compression.
151 This function is called by w9968cf_start_transfer().
152 Return 0 on success, a negative number otherwise.
153 --------------------------------------------------------------------------*/
w9968cf_upload_quantizationtables(struct sd * sd)154 static void w9968cf_upload_quantizationtables(struct sd *sd)
155 {
156 u16 a, b;
157 int i, j;
158
159 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
160
161 for (i = 0, j = 0; i < 32; i++, j += 2) {
162 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8);
163 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8);
164 reg_w(sd, 0x40 + i, a);
165 reg_w(sd, 0x60 + i, b);
166 }
167 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
168 }
169
170 /****************************************************************************
171 * Low-level I2C I/O functions. *
172 * The adapter supports the following I2C transfer functions: *
173 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
174 * i2c_adap_read_byte_data() *
175 * i2c_adap_read_byte() *
176 ****************************************************************************/
177
w9968cf_smbus_start(struct sd * sd)178 static void w9968cf_smbus_start(struct sd *sd)
179 {
180 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
181 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
182 }
183
w9968cf_smbus_stop(struct sd * sd)184 static void w9968cf_smbus_stop(struct sd *sd)
185 {
186 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
187 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
188 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
189 }
190
w9968cf_smbus_write_byte(struct sd * sd,u8 v)191 static void w9968cf_smbus_write_byte(struct sd *sd, u8 v)
192 {
193 u8 bit;
194 int sda;
195
196 for (bit = 0 ; bit < 8 ; bit++) {
197 sda = (v & 0x80) ? 2 : 0;
198 v <<= 1;
199 /* SDE=1, SDA=sda, SCL=0 */
200 w9968cf_write_sb(sd, 0x10 | sda);
201 /* SDE=1, SDA=sda, SCL=1 */
202 w9968cf_write_sb(sd, 0x11 | sda);
203 /* SDE=1, SDA=sda, SCL=0 */
204 w9968cf_write_sb(sd, 0x10 | sda);
205 }
206 }
207
w9968cf_smbus_read_byte(struct sd * sd,u8 * v)208 static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v)
209 {
210 u8 bit;
211
212 /* No need to ensure SDA is high as we are always called after
213 read_ack which ends with SDA high */
214 *v = 0;
215 for (bit = 0 ; bit < 8 ; bit++) {
216 *v <<= 1;
217 /* SDE=1, SDA=1, SCL=1 */
218 w9968cf_write_sb(sd, 0x0013);
219 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
220 /* SDE=1, SDA=1, SCL=0 */
221 w9968cf_write_sb(sd, 0x0012);
222 }
223 }
224
w9968cf_smbus_write_nack(struct sd * sd)225 static void w9968cf_smbus_write_nack(struct sd *sd)
226 {
227 /* No need to ensure SDA is high as we are always called after
228 read_byte which ends with SDA high */
229 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
230 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
231 }
232
w9968cf_smbus_read_ack(struct sd * sd)233 static void w9968cf_smbus_read_ack(struct sd *sd)
234 {
235 int sda;
236
237 /* Ensure SDA is high before raising clock to avoid a spurious stop */
238 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
239 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
240 sda = w9968cf_read_sb(sd);
241 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
242 if (sda >= 0 && (sda & 0x08)) {
243 PDEBUG(D_USBI, "Did not receive i2c ACK");
244 sd->gspca_dev.usb_err = -EIO;
245 }
246 }
247
248 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
w9968cf_i2c_w(struct sd * sd,u8 reg,u8 value)249 static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
250 {
251 u16* data = (u16 *)sd->gspca_dev.usb_buf;
252
253 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
254 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
255 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
256 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
257 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
258 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
259 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
260 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
261 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
262 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
263
264 w9968cf_write_fsb(sd, data);
265
266 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
267 data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
268 data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
269 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
270 data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
271 data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
272 data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
273 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
274 data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
275 data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
276 data[3] = 0x001d;
277
278 w9968cf_write_fsb(sd, data);
279
280 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
281 data[0] |= (value & 0x40) ? 0x0540 : 0x0;
282 data[0] |= (value & 0x20) ? 0x5000 : 0x0;
283 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
284 data[1] |= (value & 0x10) ? 0x0054 : 0x0;
285 data[1] |= (value & 0x08) ? 0x1500 : 0x0;
286 data[1] |= (value & 0x04) ? 0x4000 : 0x0;
287 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
288 data[2] |= (value & 0x02) ? 0x0150 : 0x0;
289 data[2] |= (value & 0x01) ? 0x5400 : 0x0;
290 data[3] = 0xfe1d;
291
292 w9968cf_write_fsb(sd, data);
293
294 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
295 }
296
297 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
w9968cf_i2c_r(struct sd * sd,u8 reg)298 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
299 {
300 int ret = 0;
301 u8 value;
302
303 /* Fast serial bus data control disable */
304 w9968cf_write_sb(sd, 0x0013); /* don't change ! */
305
306 w9968cf_smbus_start(sd);
307 w9968cf_smbus_write_byte(sd, sd->sensor_addr);
308 w9968cf_smbus_read_ack(sd);
309 w9968cf_smbus_write_byte(sd, reg);
310 w9968cf_smbus_read_ack(sd);
311 w9968cf_smbus_stop(sd);
312 w9968cf_smbus_start(sd);
313 w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
314 w9968cf_smbus_read_ack(sd);
315 w9968cf_smbus_read_byte(sd, &value);
316 /* signal we don't want to read anymore, the v4l1 driver used to
317 send an ack here which is very wrong! (and then fixed
318 the issues this gave by retrying reads) */
319 w9968cf_smbus_write_nack(sd);
320 w9968cf_smbus_stop(sd);
321
322 /* Fast serial bus data control re-enable */
323 w9968cf_write_sb(sd, 0x0030);
324
325 if (sd->gspca_dev.usb_err >= 0) {
326 ret = value;
327 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
328 } else
329 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
330
331 return ret;
332 }
333
334 /*--------------------------------------------------------------------------
335 Turn on the LED on some webcams. A beep should be heard too.
336 Return 0 on success, a negative number otherwise.
337 --------------------------------------------------------------------------*/
w9968cf_configure(struct sd * sd)338 static void w9968cf_configure(struct sd *sd)
339 {
340 reg_w(sd, 0x00, 0xff00); /* power-down */
341 reg_w(sd, 0x00, 0xbf17); /* reset everything */
342 reg_w(sd, 0x00, 0xbf10); /* normal operation */
343 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
344 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
345 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
346 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
347
348 sd->stopped = 1;
349 }
350
w9968cf_init(struct sd * sd)351 static void w9968cf_init(struct sd *sd)
352 {
353 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
354 y0 = 0x0000,
355 u0 = y0 + hw_bufsize / 2,
356 v0 = u0 + hw_bufsize / 4,
357 y1 = v0 + hw_bufsize / 4,
358 u1 = y1 + hw_bufsize / 2,
359 v1 = u1 + hw_bufsize / 4;
360
361 reg_w(sd, 0x00, 0xff00); /* power off */
362 reg_w(sd, 0x00, 0xbf10); /* power on */
363
364 reg_w(sd, 0x03, 0x405d); /* DRAM timings */
365 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
366
367 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
368 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
369 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
370 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
371 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
372 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
373
374 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
375 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
376 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
377 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
378 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
379 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
380
381 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
382 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
383
384 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
385 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
386
387 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
388 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
389 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
390 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
391 }
392
w9968cf_set_crop_window(struct sd * sd)393 static void w9968cf_set_crop_window(struct sd *sd)
394 {
395 int start_cropx, start_cropy, x, y, fw, fh, cw, ch,
396 max_width, max_height;
397
398 if (sd->sif) {
399 max_width = 352;
400 max_height = 288;
401 } else {
402 max_width = 640;
403 max_height = 480;
404 }
405
406 if (sd->sensor == SEN_OV7620) {
407 /* Sigh, this is dependend on the clock / framerate changes
408 made by the frequency control, sick. */
409 if (sd->ctrls[FREQ].val == 1) {
410 start_cropx = 277;
411 start_cropy = 37;
412 } else {
413 start_cropx = 105;
414 start_cropy = 37;
415 }
416 } else {
417 start_cropx = 320;
418 start_cropy = 35;
419 }
420
421 /* Work around to avoid FP arithmetics */
422 #define SC(x) ((x) << 10)
423
424 /* Scaling factors */
425 fw = SC(sd->gspca_dev.width) / max_width;
426 fh = SC(sd->gspca_dev.height) / max_height;
427
428 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.width) / fh;
429 ch = (fw >= fh) ? SC(sd->gspca_dev.height) / fw : max_height;
430
431 sd->sensor_width = max_width;
432 sd->sensor_height = max_height;
433
434 x = (max_width - cw) / 2;
435 y = (max_height - ch) / 2;
436
437 reg_w(sd, 0x10, start_cropx + x);
438 reg_w(sd, 0x11, start_cropy + y);
439 reg_w(sd, 0x12, start_cropx + x + cw);
440 reg_w(sd, 0x13, start_cropy + y + ch);
441 }
442
w9968cf_mode_init_regs(struct sd * sd)443 static void w9968cf_mode_init_regs(struct sd *sd)
444 {
445 int val, vs_polarity, hs_polarity;
446
447 w9968cf_set_crop_window(sd);
448
449 reg_w(sd, 0x14, sd->gspca_dev.width);
450 reg_w(sd, 0x15, sd->gspca_dev.height);
451
452 /* JPEG width & height */
453 reg_w(sd, 0x30, sd->gspca_dev.width);
454 reg_w(sd, 0x31, sd->gspca_dev.height);
455
456 /* Y & UV frame buffer strides (in WORD) */
457 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
458 V4L2_PIX_FMT_JPEG) {
459 reg_w(sd, 0x2c, sd->gspca_dev.width / 2);
460 reg_w(sd, 0x2d, sd->gspca_dev.width / 4);
461 } else
462 reg_w(sd, 0x2c, sd->gspca_dev.width);
463
464 reg_w(sd, 0x00, 0xbf17); /* reset everything */
465 reg_w(sd, 0x00, 0xbf10); /* normal operation */
466
467 /* Transfer size in WORDS (for UYVY format only) */
468 val = sd->gspca_dev.width * sd->gspca_dev.height;
469 reg_w(sd, 0x3d, val & 0xffff); /* low bits */
470 reg_w(sd, 0x3e, val >> 16); /* high bits */
471
472 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
473 V4L2_PIX_FMT_JPEG) {
474 /* We may get called multiple times (usb isoc bw negotiat.) */
475 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.height,
476 sd->gspca_dev.width, 0x22); /* JPEG 420 */
477 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
478 w9968cf_upload_quantizationtables(sd);
479 }
480
481 /* Video Capture Control Register */
482 if (sd->sensor == SEN_OV7620) {
483 /* Seems to work around a bug in the image sensor */
484 vs_polarity = 1;
485 hs_polarity = 1;
486 } else {
487 vs_polarity = 1;
488 hs_polarity = 0;
489 }
490
491 val = (vs_polarity << 12) | (hs_polarity << 11);
492
493 /* NOTE: We may not have enough memory to do double buffering while
494 doing compression (amount of memory differs per model cam).
495 So we use the second image buffer also as jpeg stream buffer
496 (see w9968cf_init), and disable double buffering. */
497 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
498 V4L2_PIX_FMT_JPEG) {
499 /* val |= 0x0002; YUV422P */
500 val |= 0x0003; /* YUV420P */
501 } else
502 val |= 0x0080; /* Enable HW double buffering */
503
504 /* val |= 0x0020; enable clamping */
505 /* val |= 0x0008; enable (1-2-1) filter */
506 /* val |= 0x000c; enable (2-3-6-3-2) filter */
507
508 val |= 0x8000; /* capt. enable */
509
510 reg_w(sd, 0x16, val);
511
512 sd->gspca_dev.empty_packet = 0;
513 }
514
w9968cf_stop0(struct sd * sd)515 static void w9968cf_stop0(struct sd *sd)
516 {
517 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
518 reg_w(sd, 0x16, 0x0000); /* stop video capture */
519 }
520
521 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
522 for the next frame). This seems to simply not be true when operating
523 in JPEG mode, in this case there may be empty packets within the
524 frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
525
526 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
527 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
528 V-data, EOI. */
w9968cf_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)529 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
530 u8 *data, /* isoc packet */
531 int len) /* iso packet length */
532 {
533 struct sd *sd = (struct sd *) gspca_dev;
534
535 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
536 V4L2_PIX_FMT_JPEG) {
537 if (len >= 2 &&
538 data[0] == 0xff &&
539 data[1] == 0xd8) {
540 gspca_frame_add(gspca_dev, LAST_PACKET,
541 NULL, 0);
542 gspca_frame_add(gspca_dev, FIRST_PACKET,
543 sd->jpeg_hdr, JPEG_HDR_SZ);
544 /* Strip the ff d8, our own header (which adds
545 huffman and quantization tables) already has this */
546 len -= 2;
547 data += 2;
548 }
549 } else {
550 /* In UYVY mode an empty packet signals EOF */
551 if (gspca_dev->empty_packet) {
552 gspca_frame_add(gspca_dev, LAST_PACKET,
553 NULL, 0);
554 gspca_frame_add(gspca_dev, FIRST_PACKET,
555 NULL, 0);
556 gspca_dev->empty_packet = 0;
557 }
558 }
559 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
560 }
561