1 /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
2 */
3 /*
4 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
5 *
6 * The Weather Channel (TM) funded Tungsten Graphics to develop the
7 * initial release of the Radeon 8500 driver under the XFree86 license.
8 * This notice must be preserved.
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice (including the next
18 * paragraph) shall be included in all copies or substantial portions of the
19 * Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
28 *
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Eric Anholt <anholt@FreeBSD.org>
32 */
33
34 #include "drmP.h"
35 #include "drm.h"
36 #include "mga_drm.h"
37 #include "mga_drv.h"
38
mga_get_vblank_counter(struct drm_device * dev,int crtc)39 u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
40 {
41 const drm_mga_private_t *const dev_priv =
42 (drm_mga_private_t *) dev->dev_private;
43
44 if (crtc != 0)
45 return 0;
46
47 return atomic_read(&dev_priv->vbl_received);
48 }
49
50
mga_driver_irq_handler(DRM_IRQ_ARGS)51 irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
52 {
53 struct drm_device *dev = (struct drm_device *) arg;
54 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
55 int status;
56 int handled = 0;
57
58 status = MGA_READ(MGA_STATUS);
59
60 /* VBLANK interrupt */
61 if (status & MGA_VLINEPEN) {
62 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
63 atomic_inc(&dev_priv->vbl_received);
64 drm_handle_vblank(dev, 0);
65 handled = 1;
66 }
67
68 /* SOFTRAP interrupt */
69 if (status & MGA_SOFTRAPEN) {
70 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
71 const u32 prim_end = MGA_READ(MGA_PRIMEND);
72
73
74 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
75
76 /* In addition to clearing the interrupt-pending bit, we
77 * have to write to MGA_PRIMEND to re-start the DMA operation.
78 */
79 if ((prim_start & ~0x03) != (prim_end & ~0x03))
80 MGA_WRITE(MGA_PRIMEND, prim_end);
81
82 atomic_inc(&dev_priv->last_fence_retired);
83 DRM_WAKEUP(&dev_priv->fence_queue);
84 handled = 1;
85 }
86
87 if (handled)
88 return IRQ_HANDLED;
89 return IRQ_NONE;
90 }
91
mga_enable_vblank(struct drm_device * dev,int crtc)92 int mga_enable_vblank(struct drm_device *dev, int crtc)
93 {
94 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
95
96 if (crtc != 0) {
97 DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
98 crtc);
99 return 0;
100 }
101
102 MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
103 return 0;
104 }
105
106
mga_disable_vblank(struct drm_device * dev,int crtc)107 void mga_disable_vblank(struct drm_device *dev, int crtc)
108 {
109 if (crtc != 0) {
110 DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
111 crtc);
112 }
113
114 /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
115 * a nice hardware counter that tracks the number of refreshes when
116 * the interrupt is disabled, and the kernel doesn't know the refresh
117 * rate to calculate an estimate.
118 */
119 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
120 }
121
mga_driver_fence_wait(struct drm_device * dev,unsigned int * sequence)122 int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
123 {
124 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
125 unsigned int cur_fence;
126 int ret = 0;
127
128 /* Assume that the user has missed the current sequence number
129 * by about a day rather than she wants to wait for years
130 * using fences.
131 */
132 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
133 (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
134 - *sequence) <= (1 << 23)));
135
136 *sequence = cur_fence;
137
138 return ret;
139 }
140
mga_driver_irq_preinstall(struct drm_device * dev)141 void mga_driver_irq_preinstall(struct drm_device *dev)
142 {
143 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
144
145 /* Disable *all* interrupts */
146 MGA_WRITE(MGA_IEN, 0);
147 /* Clear bits if they're already high */
148 MGA_WRITE(MGA_ICLEAR, ~0);
149 }
150
mga_driver_irq_postinstall(struct drm_device * dev)151 int mga_driver_irq_postinstall(struct drm_device *dev)
152 {
153 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
154
155 DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
156
157 /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
158 * in mga_enable_vblank.
159 */
160 MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
161 return 0;
162 }
163
mga_driver_irq_uninstall(struct drm_device * dev)164 void mga_driver_irq_uninstall(struct drm_device *dev)
165 {
166 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
167 if (!dev_priv)
168 return;
169
170 /* Disable *all* interrupts */
171 MGA_WRITE(MGA_IEN, 0);
172
173 dev->irq_enabled = 0;
174 }
175