1 /*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Gated clock implementation
10 */
11
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/io.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
18
19 /**
20 * DOC: basic gatable clock which can gate and ungate it's ouput
21 *
22 * Traits of this clock:
23 * prepare - clk_(un)prepare only ensures parent is (un)prepared
24 * enable - clk_enable and clk_disable are functional & control gating
25 * rate - inherits rate from parent. No clk_set_rate support
26 * parent - fixed parent. No clk_set_parent support
27 */
28
29 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
30
clk_gate_set_bit(struct clk_gate * gate)31 static void clk_gate_set_bit(struct clk_gate *gate)
32 {
33 u32 reg;
34 unsigned long flags = 0;
35
36 if (gate->lock)
37 spin_lock_irqsave(gate->lock, flags);
38
39 reg = readl(gate->reg);
40 reg |= BIT(gate->bit_idx);
41 writel(reg, gate->reg);
42
43 if (gate->lock)
44 spin_unlock_irqrestore(gate->lock, flags);
45 }
46
clk_gate_clear_bit(struct clk_gate * gate)47 static void clk_gate_clear_bit(struct clk_gate *gate)
48 {
49 u32 reg;
50 unsigned long flags = 0;
51
52 if (gate->lock)
53 spin_lock_irqsave(gate->lock, flags);
54
55 reg = readl(gate->reg);
56 reg &= ~BIT(gate->bit_idx);
57 writel(reg, gate->reg);
58
59 if (gate->lock)
60 spin_unlock_irqrestore(gate->lock, flags);
61 }
62
clk_gate_enable(struct clk_hw * hw)63 static int clk_gate_enable(struct clk_hw *hw)
64 {
65 struct clk_gate *gate = to_clk_gate(hw);
66
67 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
68 clk_gate_clear_bit(gate);
69 else
70 clk_gate_set_bit(gate);
71
72 return 0;
73 }
74 EXPORT_SYMBOL_GPL(clk_gate_enable);
75
clk_gate_disable(struct clk_hw * hw)76 static void clk_gate_disable(struct clk_hw *hw)
77 {
78 struct clk_gate *gate = to_clk_gate(hw);
79
80 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
81 clk_gate_set_bit(gate);
82 else
83 clk_gate_clear_bit(gate);
84 }
85 EXPORT_SYMBOL_GPL(clk_gate_disable);
86
clk_gate_is_enabled(struct clk_hw * hw)87 static int clk_gate_is_enabled(struct clk_hw *hw)
88 {
89 u32 reg;
90 struct clk_gate *gate = to_clk_gate(hw);
91
92 reg = readl(gate->reg);
93
94 /* if a set bit disables this clk, flip it before masking */
95 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
96 reg ^= BIT(gate->bit_idx);
97
98 reg &= BIT(gate->bit_idx);
99
100 return reg ? 1 : 0;
101 }
102 EXPORT_SYMBOL_GPL(clk_gate_is_enabled);
103
104 struct clk_ops clk_gate_ops = {
105 .enable = clk_gate_enable,
106 .disable = clk_gate_disable,
107 .is_enabled = clk_gate_is_enabled,
108 };
109 EXPORT_SYMBOL_GPL(clk_gate_ops);
110
clk_register_gate(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 clk_gate_flags,spinlock_t * lock)111 struct clk *clk_register_gate(struct device *dev, const char *name,
112 const char *parent_name, unsigned long flags,
113 void __iomem *reg, u8 bit_idx,
114 u8 clk_gate_flags, spinlock_t *lock)
115 {
116 struct clk_gate *gate;
117 struct clk *clk;
118
119 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
120
121 if (!gate) {
122 pr_err("%s: could not allocate gated clk\n", __func__);
123 return NULL;
124 }
125
126 /* struct clk_gate assignments */
127 gate->reg = reg;
128 gate->bit_idx = bit_idx;
129 gate->flags = clk_gate_flags;
130 gate->lock = lock;
131
132 if (parent_name) {
133 gate->parent[0] = kstrdup(parent_name, GFP_KERNEL);
134 if (!gate->parent[0])
135 goto out;
136 }
137
138 clk = clk_register(dev, name,
139 &clk_gate_ops, &gate->hw,
140 gate->parent,
141 (parent_name ? 1 : 0),
142 flags);
143 if (clk)
144 return clk;
145 out:
146 kfree(gate->parent[0]);
147 kfree(gate);
148
149 return NULL;
150 }
151