1 /*
2 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
3 *
4 * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
5 * Mingkai Hu from Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 */
13
14 #include <linux/list.h>
15 #include <linux/of_platform.h>
16 #include <linux/errno.h>
17 #include <asm/prom.h>
18 #include <asm/hw_irq.h>
19 #include <asm/ppc-pci.h>
20 #include <asm/mpic_msgr.h>
21
22 #define MPIC_MSGR_REGISTERS_PER_BLOCK 4
23 #define MPIC_MSGR_STRIDE 0x10
24 #define MPIC_MSGR_MER_OFFSET 0x100
25 #define MSGR_INUSE 0
26 #define MSGR_FREE 1
27
28 static struct mpic_msgr **mpic_msgrs;
29 static unsigned int mpic_msgr_count;
30 static DEFINE_RAW_SPINLOCK(msgrs_lock);
31
_mpic_msgr_mer_write(struct mpic_msgr * msgr,u32 value)32 static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
33 {
34 out_be32(msgr->mer, value);
35 }
36
_mpic_msgr_mer_read(struct mpic_msgr * msgr)37 static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
38 {
39 return in_be32(msgr->mer);
40 }
41
_mpic_msgr_disable(struct mpic_msgr * msgr)42 static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
43 {
44 u32 mer = _mpic_msgr_mer_read(msgr);
45
46 _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
47 }
48
mpic_msgr_get(unsigned int reg_num)49 struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
50 {
51 unsigned long flags;
52 struct mpic_msgr *msgr;
53
54 /* Assume busy until proven otherwise. */
55 msgr = ERR_PTR(-EBUSY);
56
57 if (reg_num >= mpic_msgr_count)
58 return ERR_PTR(-ENODEV);
59
60 raw_spin_lock_irqsave(&msgrs_lock, flags);
61 msgr = mpic_msgrs[reg_num];
62 if (msgr->in_use == MSGR_FREE)
63 msgr->in_use = MSGR_INUSE;
64 raw_spin_unlock_irqrestore(&msgrs_lock, flags);
65
66 return msgr;
67 }
68 EXPORT_SYMBOL_GPL(mpic_msgr_get);
69
mpic_msgr_put(struct mpic_msgr * msgr)70 void mpic_msgr_put(struct mpic_msgr *msgr)
71 {
72 unsigned long flags;
73
74 raw_spin_lock_irqsave(&msgr->lock, flags);
75 msgr->in_use = MSGR_FREE;
76 _mpic_msgr_disable(msgr);
77 raw_spin_unlock_irqrestore(&msgr->lock, flags);
78 }
79 EXPORT_SYMBOL_GPL(mpic_msgr_put);
80
mpic_msgr_enable(struct mpic_msgr * msgr)81 void mpic_msgr_enable(struct mpic_msgr *msgr)
82 {
83 unsigned long flags;
84 u32 mer;
85
86 raw_spin_lock_irqsave(&msgr->lock, flags);
87 mer = _mpic_msgr_mer_read(msgr);
88 _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
89 raw_spin_unlock_irqrestore(&msgr->lock, flags);
90 }
91 EXPORT_SYMBOL_GPL(mpic_msgr_enable);
92
mpic_msgr_disable(struct mpic_msgr * msgr)93 void mpic_msgr_disable(struct mpic_msgr *msgr)
94 {
95 unsigned long flags;
96
97 raw_spin_lock_irqsave(&msgr->lock, flags);
98 _mpic_msgr_disable(msgr);
99 raw_spin_unlock_irqrestore(&msgr->lock, flags);
100 }
101 EXPORT_SYMBOL_GPL(mpic_msgr_disable);
102
103 /* The following three functions are used to compute the order and number of
104 * the message register blocks. They are clearly very inefficent. However,
105 * they are called *only* a few times during device initialization.
106 */
mpic_msgr_number_of_blocks(void)107 static unsigned int mpic_msgr_number_of_blocks(void)
108 {
109 unsigned int count;
110 struct device_node *aliases;
111
112 count = 0;
113 aliases = of_find_node_by_name(NULL, "aliases");
114
115 if (aliases) {
116 char buf[32];
117
118 for (;;) {
119 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
120 if (!of_find_property(aliases, buf, NULL))
121 break;
122
123 count += 1;
124 }
125 }
126
127 return count;
128 }
129
mpic_msgr_number_of_registers(void)130 static unsigned int mpic_msgr_number_of_registers(void)
131 {
132 return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
133 }
134
mpic_msgr_block_number(struct device_node * node)135 static int mpic_msgr_block_number(struct device_node *node)
136 {
137 struct device_node *aliases;
138 unsigned int index, number_of_blocks;
139 char buf[64];
140
141 number_of_blocks = mpic_msgr_number_of_blocks();
142 aliases = of_find_node_by_name(NULL, "aliases");
143 if (!aliases)
144 return -1;
145
146 for (index = 0; index < number_of_blocks; ++index) {
147 struct property *prop;
148
149 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
150 prop = of_find_property(aliases, buf, NULL);
151 if (node == of_find_node_by_path(prop->value))
152 break;
153 }
154
155 return index == number_of_blocks ? -1 : index;
156 }
157
158 /* The probe function for a single message register block.
159 */
mpic_msgr_probe(struct platform_device * dev)160 static __devinit int mpic_msgr_probe(struct platform_device *dev)
161 {
162 void __iomem *msgr_block_addr;
163 int block_number;
164 struct resource rsrc;
165 unsigned int i;
166 unsigned int irq_index;
167 struct device_node *np = dev->dev.of_node;
168 unsigned int receive_mask;
169 const unsigned int *prop;
170
171 if (!np) {
172 dev_err(&dev->dev, "Device OF-Node is NULL");
173 return -EFAULT;
174 }
175
176 /* Allocate the message register array upon the first device
177 * registered.
178 */
179 if (!mpic_msgrs) {
180 mpic_msgr_count = mpic_msgr_number_of_registers();
181 dev_info(&dev->dev, "Found %d message registers\n",
182 mpic_msgr_count);
183
184 mpic_msgrs = kzalloc(sizeof(struct mpic_msgr) * mpic_msgr_count,
185 GFP_KERNEL);
186 if (!mpic_msgrs) {
187 dev_err(&dev->dev,
188 "No memory for message register blocks\n");
189 return -ENOMEM;
190 }
191 }
192 dev_info(&dev->dev, "Of-device full name %s\n", np->full_name);
193
194 /* IO map the message register block. */
195 of_address_to_resource(np, 0, &rsrc);
196 msgr_block_addr = ioremap(rsrc.start, rsrc.end - rsrc.start);
197 if (!msgr_block_addr) {
198 dev_err(&dev->dev, "Failed to iomap MPIC message registers");
199 return -EFAULT;
200 }
201
202 /* Ensure the block has a defined order. */
203 block_number = mpic_msgr_block_number(np);
204 if (block_number < 0) {
205 dev_err(&dev->dev,
206 "Failed to find message register block alias\n");
207 return -ENODEV;
208 }
209 dev_info(&dev->dev, "Setting up message register block %d\n",
210 block_number);
211
212 /* Grab the receive mask which specifies what registers can receive
213 * interrupts.
214 */
215 prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
216 receive_mask = (prop) ? *prop : 0xF;
217
218 /* Build up the appropriate message register data structures. */
219 for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
220 struct mpic_msgr *msgr;
221 unsigned int reg_number;
222
223 msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
224 if (!msgr) {
225 dev_err(&dev->dev, "No memory for message register\n");
226 return -ENOMEM;
227 }
228
229 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
230 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
231 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
232 msgr->in_use = MSGR_FREE;
233 msgr->num = i;
234 raw_spin_lock_init(&msgr->lock);
235
236 if (receive_mask & (1 << i)) {
237 struct resource irq;
238
239 if (of_irq_to_resource(np, irq_index, &irq) == NO_IRQ) {
240 dev_err(&dev->dev,
241 "Missing interrupt specifier");
242 kfree(msgr);
243 return -EFAULT;
244 }
245 msgr->irq = irq.start;
246 irq_index += 1;
247 } else {
248 msgr->irq = NO_IRQ;
249 }
250
251 mpic_msgrs[reg_number] = msgr;
252 mpic_msgr_disable(msgr);
253 dev_info(&dev->dev, "Register %d initialized: irq %d\n",
254 reg_number, msgr->irq);
255
256 }
257
258 return 0;
259 }
260
261 static const struct of_device_id mpic_msgr_ids[] = {
262 {
263 .compatible = "fsl,mpic-v3.1-msgr",
264 .data = NULL,
265 },
266 {}
267 };
268
269 static struct platform_driver mpic_msgr_driver = {
270 .driver = {
271 .name = "mpic-msgr",
272 .owner = THIS_MODULE,
273 .of_match_table = mpic_msgr_ids,
274 },
275 .probe = mpic_msgr_probe,
276 };
277
mpic_msgr_init(void)278 static __init int mpic_msgr_init(void)
279 {
280 return platform_driver_register(&mpic_msgr_driver);
281 }
282 subsys_initcall(mpic_msgr_init);
283