1 /*
2 * GE SBC610 board support
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 *
6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/kdev_t.h>
23 #include <linux/delay.h>
24 #include <linux/seq_file.h>
25 #include <linux/of_platform.h>
26
27 #include <asm/time.h>
28 #include <asm/machdep.h>
29 #include <asm/pci-bridge.h>
30 #include <asm/prom.h>
31 #include <mm/mmu_decl.h>
32 #include <asm/udbg.h>
33
34 #include <asm/mpic.h>
35 #include <asm/nvram.h>
36
37 #include <sysdev/fsl_pci.h>
38 #include <sysdev/fsl_soc.h>
39 #include <sysdev/ge/ge_pic.h>
40
41 #include "mpc86xx.h"
42
43 #undef DEBUG
44
45 #ifdef DEBUG
46 #define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
47 #else
48 #define DBG (fmt...) do { } while (0)
49 #endif
50
51 void __iomem *sbc610_regs;
52
gef_sbc610_init_irq(void)53 static void __init gef_sbc610_init_irq(void)
54 {
55 struct device_node *cascade_node = NULL;
56
57 mpc86xx_init_irq();
58
59 /*
60 * There is a simple interrupt handler in the main FPGA, this needs
61 * to be cascaded into the MPIC
62 */
63 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
64 if (!cascade_node) {
65 printk(KERN_WARNING "SBC610: No FPGA PIC\n");
66 return;
67 }
68
69 gef_pic_init(cascade_node);
70 of_node_put(cascade_node);
71 }
72
gef_sbc610_setup_arch(void)73 static void __init gef_sbc610_setup_arch(void)
74 {
75 struct device_node *regs;
76 #ifdef CONFIG_PCI
77 struct device_node *np;
78
79 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
80 fsl_add_bridge(np, 1);
81 }
82 #endif
83
84 printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
85
86 #ifdef CONFIG_SMP
87 mpc86xx_smp_init();
88 #endif
89
90 /* Remap basic board registers */
91 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
92 if (regs) {
93 sbc610_regs = of_iomap(regs, 0);
94 if (sbc610_regs == NULL)
95 printk(KERN_WARNING "Unable to map board registers\n");
96 of_node_put(regs);
97 }
98
99 #if defined(CONFIG_MMIO_NVRAM)
100 mmio_nvram_init();
101 #endif
102 }
103
104 /* Return the PCB revision */
gef_sbc610_get_pcb_rev(void)105 static unsigned int gef_sbc610_get_pcb_rev(void)
106 {
107 unsigned int reg;
108
109 reg = ioread32(sbc610_regs);
110 return (reg >> 8) & 0xff;
111 }
112
113 /* Return the board (software) revision */
gef_sbc610_get_board_rev(void)114 static unsigned int gef_sbc610_get_board_rev(void)
115 {
116 unsigned int reg;
117
118 reg = ioread32(sbc610_regs);
119 return (reg >> 16) & 0xff;
120 }
121
122 /* Return the FPGA revision */
gef_sbc610_get_fpga_rev(void)123 static unsigned int gef_sbc610_get_fpga_rev(void)
124 {
125 unsigned int reg;
126
127 reg = ioread32(sbc610_regs);
128 return (reg >> 24) & 0xf;
129 }
130
gef_sbc610_show_cpuinfo(struct seq_file * m)131 static void gef_sbc610_show_cpuinfo(struct seq_file *m)
132 {
133 uint svid = mfspr(SPRN_SVR);
134
135 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
136
137 seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
138 ('A' + gef_sbc610_get_board_rev() - 1));
139 seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
140
141 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
142 }
143
gef_sbc610_nec_fixup(struct pci_dev * pdev)144 static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
145 {
146 unsigned int val;
147
148 /* Do not do the fixup on other platforms! */
149 if (!machine_is(gef_sbc610))
150 return;
151
152 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
153
154 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
155 pci_read_config_dword(pdev, 0xe0, &val);
156 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
157
158 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
159 pci_write_config_dword(pdev, 0xe4, 1 << 5);
160 }
161 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
162 gef_sbc610_nec_fixup);
163
164 /*
165 * Called very early, device-tree isn't unflattened
166 *
167 * This function is called to determine whether the BSP is compatible with the
168 * supplied device-tree, which is assumed to be the correct one for the actual
169 * board. It is expected thati, in the future, a kernel may support multiple
170 * boards.
171 */
gef_sbc610_probe(void)172 static int __init gef_sbc610_probe(void)
173 {
174 unsigned long root = of_get_flat_dt_root();
175
176 if (of_flat_dt_is_compatible(root, "gef,sbc610"))
177 return 1;
178
179 return 0;
180 }
181
mpc86xx_time_init(void)182 static long __init mpc86xx_time_init(void)
183 {
184 unsigned int temp;
185
186 /* Set the time base to zero */
187 mtspr(SPRN_TBWL, 0);
188 mtspr(SPRN_TBWU, 0);
189
190 temp = mfspr(SPRN_HID0);
191 temp |= HID0_TBEN;
192 mtspr(SPRN_HID0, temp);
193 asm volatile("isync");
194
195 return 0;
196 }
197
198 static __initdata struct of_device_id of_bus_ids[] = {
199 { .compatible = "simple-bus", },
200 { .compatible = "gianfar", },
201 {},
202 };
203
declare_of_platform_devices(void)204 static int __init declare_of_platform_devices(void)
205 {
206 printk(KERN_DEBUG "Probe platform devices\n");
207 of_platform_bus_probe(NULL, of_bus_ids, NULL);
208
209 return 0;
210 }
211 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
212
define_machine(gef_sbc610)213 define_machine(gef_sbc610) {
214 .name = "GE SBC610",
215 .probe = gef_sbc610_probe,
216 .setup_arch = gef_sbc610_setup_arch,
217 .init_IRQ = gef_sbc610_init_irq,
218 .show_cpuinfo = gef_sbc610_show_cpuinfo,
219 .get_irq = mpic_get_irq,
220 .restart = fsl_rstcr_restart,
221 .time_init = mpc86xx_time_init,
222 .calibrate_decr = generic_calibrate_decr,
223 .progress = udbg_progress,
224 #ifdef CONFIG_PCI
225 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
226 #endif
227 };
228