1 /*
2  *  Derived from "arch/i386/kernel/process.c"
3  *    Copyright (C) 1995  Linus Torvalds
4  *
5  *  Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6  *  Paul Mackerras (paulus@cs.anu.edu.au)
7  *
8  *  PowerPC version
9  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10  *
11  *  This program is free software; you can redistribute it and/or
12  *  modify it under the terms of the GNU General Public License
13  *  as published by the Free Software Foundation; either version
14  *  2 of the License, or (at your option) any later version.
15  */
16 
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/export.h>
32 #include <linux/kallsyms.h>
33 #include <linux/mqueue.h>
34 #include <linux/hardirq.h>
35 #include <linux/utsname.h>
36 #include <linux/ftrace.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/personality.h>
39 #include <linux/random.h>
40 #include <linux/hw_breakpoint.h>
41 
42 #include <asm/pgtable.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
45 #include <asm/processor.h>
46 #include <asm/mmu.h>
47 #include <asm/prom.h>
48 #include <asm/machdep.h>
49 #include <asm/time.h>
50 #include <asm/runlatch.h>
51 #include <asm/syscalls.h>
52 #include <asm/switch_to.h>
53 #include <asm/debug.h>
54 #ifdef CONFIG_PPC64
55 #include <asm/firmware.h>
56 #endif
57 #include <linux/kprobes.h>
58 #include <linux/kdebug.h>
59 
60 extern unsigned long _get_SP(void);
61 
62 #ifndef CONFIG_SMP
63 struct task_struct *last_task_used_math = NULL;
64 struct task_struct *last_task_used_altivec = NULL;
65 struct task_struct *last_task_used_vsx = NULL;
66 struct task_struct *last_task_used_spe = NULL;
67 #endif
68 
69 /*
70  * Make sure the floating-point register state in the
71  * the thread_struct is up to date for task tsk.
72  */
flush_fp_to_thread(struct task_struct * tsk)73 void flush_fp_to_thread(struct task_struct *tsk)
74 {
75 	if (tsk->thread.regs) {
76 		/*
77 		 * We need to disable preemption here because if we didn't,
78 		 * another process could get scheduled after the regs->msr
79 		 * test but before we have finished saving the FP registers
80 		 * to the thread_struct.  That process could take over the
81 		 * FPU, and then when we get scheduled again we would store
82 		 * bogus values for the remaining FP registers.
83 		 */
84 		preempt_disable();
85 		if (tsk->thread.regs->msr & MSR_FP) {
86 #ifdef CONFIG_SMP
87 			/*
88 			 * This should only ever be called for current or
89 			 * for a stopped child process.  Since we save away
90 			 * the FP register state on context switch on SMP,
91 			 * there is something wrong if a stopped child appears
92 			 * to still have its FP state in the CPU registers.
93 			 */
94 			BUG_ON(tsk != current);
95 #endif
96 			giveup_fpu(tsk);
97 		}
98 		preempt_enable();
99 	}
100 }
101 EXPORT_SYMBOL_GPL(flush_fp_to_thread);
102 
enable_kernel_fp(void)103 void enable_kernel_fp(void)
104 {
105 	WARN_ON(preemptible());
106 
107 #ifdef CONFIG_SMP
108 	if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
109 		giveup_fpu(current);
110 	else
111 		giveup_fpu(NULL);	/* just enables FP for kernel */
112 #else
113 	giveup_fpu(last_task_used_math);
114 #endif /* CONFIG_SMP */
115 }
116 EXPORT_SYMBOL(enable_kernel_fp);
117 
118 #ifdef CONFIG_ALTIVEC
enable_kernel_altivec(void)119 void enable_kernel_altivec(void)
120 {
121 	WARN_ON(preemptible());
122 
123 #ifdef CONFIG_SMP
124 	if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
125 		giveup_altivec(current);
126 	else
127 		giveup_altivec(NULL);	/* just enable AltiVec for kernel - force */
128 #else
129 	giveup_altivec(last_task_used_altivec);
130 #endif /* CONFIG_SMP */
131 }
132 EXPORT_SYMBOL(enable_kernel_altivec);
133 
134 /*
135  * Make sure the VMX/Altivec register state in the
136  * the thread_struct is up to date for task tsk.
137  */
flush_altivec_to_thread(struct task_struct * tsk)138 void flush_altivec_to_thread(struct task_struct *tsk)
139 {
140 	if (tsk->thread.regs) {
141 		preempt_disable();
142 		if (tsk->thread.regs->msr & MSR_VEC) {
143 #ifdef CONFIG_SMP
144 			BUG_ON(tsk != current);
145 #endif
146 			giveup_altivec(tsk);
147 		}
148 		preempt_enable();
149 	}
150 }
151 EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
152 #endif /* CONFIG_ALTIVEC */
153 
154 #ifdef CONFIG_VSX
155 #if 0
156 /* not currently used, but some crazy RAID module might want to later */
157 void enable_kernel_vsx(void)
158 {
159 	WARN_ON(preemptible());
160 
161 #ifdef CONFIG_SMP
162 	if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
163 		giveup_vsx(current);
164 	else
165 		giveup_vsx(NULL);	/* just enable vsx for kernel - force */
166 #else
167 	giveup_vsx(last_task_used_vsx);
168 #endif /* CONFIG_SMP */
169 }
170 EXPORT_SYMBOL(enable_kernel_vsx);
171 #endif
172 
giveup_vsx(struct task_struct * tsk)173 void giveup_vsx(struct task_struct *tsk)
174 {
175 	giveup_fpu(tsk);
176 	giveup_altivec(tsk);
177 	__giveup_vsx(tsk);
178 }
179 
flush_vsx_to_thread(struct task_struct * tsk)180 void flush_vsx_to_thread(struct task_struct *tsk)
181 {
182 	if (tsk->thread.regs) {
183 		preempt_disable();
184 		if (tsk->thread.regs->msr & MSR_VSX) {
185 #ifdef CONFIG_SMP
186 			BUG_ON(tsk != current);
187 #endif
188 			giveup_vsx(tsk);
189 		}
190 		preempt_enable();
191 	}
192 }
193 EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
194 #endif /* CONFIG_VSX */
195 
196 #ifdef CONFIG_SPE
197 
enable_kernel_spe(void)198 void enable_kernel_spe(void)
199 {
200 	WARN_ON(preemptible());
201 
202 #ifdef CONFIG_SMP
203 	if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
204 		giveup_spe(current);
205 	else
206 		giveup_spe(NULL);	/* just enable SPE for kernel - force */
207 #else
208 	giveup_spe(last_task_used_spe);
209 #endif /* __SMP __ */
210 }
211 EXPORT_SYMBOL(enable_kernel_spe);
212 
flush_spe_to_thread(struct task_struct * tsk)213 void flush_spe_to_thread(struct task_struct *tsk)
214 {
215 	if (tsk->thread.regs) {
216 		preempt_disable();
217 		if (tsk->thread.regs->msr & MSR_SPE) {
218 #ifdef CONFIG_SMP
219 			BUG_ON(tsk != current);
220 #endif
221 			tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
222 			giveup_spe(tsk);
223 		}
224 		preempt_enable();
225 	}
226 }
227 #endif /* CONFIG_SPE */
228 
229 #ifndef CONFIG_SMP
230 /*
231  * If we are doing lazy switching of CPU state (FP, altivec or SPE),
232  * and the current task has some state, discard it.
233  */
discard_lazy_cpu_state(void)234 void discard_lazy_cpu_state(void)
235 {
236 	preempt_disable();
237 	if (last_task_used_math == current)
238 		last_task_used_math = NULL;
239 #ifdef CONFIG_ALTIVEC
240 	if (last_task_used_altivec == current)
241 		last_task_used_altivec = NULL;
242 #endif /* CONFIG_ALTIVEC */
243 #ifdef CONFIG_VSX
244 	if (last_task_used_vsx == current)
245 		last_task_used_vsx = NULL;
246 #endif /* CONFIG_VSX */
247 #ifdef CONFIG_SPE
248 	if (last_task_used_spe == current)
249 		last_task_used_spe = NULL;
250 #endif
251 	preempt_enable();
252 }
253 #endif /* CONFIG_SMP */
254 
255 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
do_send_trap(struct pt_regs * regs,unsigned long address,unsigned long error_code,int signal_code,int breakpt)256 void do_send_trap(struct pt_regs *regs, unsigned long address,
257 		  unsigned long error_code, int signal_code, int breakpt)
258 {
259 	siginfo_t info;
260 
261 	if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
262 			11, SIGSEGV) == NOTIFY_STOP)
263 		return;
264 
265 	/* Deliver the signal to userspace */
266 	info.si_signo = SIGTRAP;
267 	info.si_errno = breakpt;	/* breakpoint or watchpoint id */
268 	info.si_code = signal_code;
269 	info.si_addr = (void __user *)address;
270 	force_sig_info(SIGTRAP, &info, current);
271 }
272 #else	/* !CONFIG_PPC_ADV_DEBUG_REGS */
do_dabr(struct pt_regs * regs,unsigned long address,unsigned long error_code)273 void do_dabr(struct pt_regs *regs, unsigned long address,
274 		    unsigned long error_code)
275 {
276 	siginfo_t info;
277 
278 	if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
279 			11, SIGSEGV) == NOTIFY_STOP)
280 		return;
281 
282 	if (debugger_dabr_match(regs))
283 		return;
284 
285 	/* Clear the DABR */
286 	set_dabr(0);
287 
288 	/* Deliver the signal to userspace */
289 	info.si_signo = SIGTRAP;
290 	info.si_errno = 0;
291 	info.si_code = TRAP_HWBKPT;
292 	info.si_addr = (void __user *)address;
293 	force_sig_info(SIGTRAP, &info, current);
294 }
295 #endif	/* CONFIG_PPC_ADV_DEBUG_REGS */
296 
297 static DEFINE_PER_CPU(unsigned long, current_dabr);
298 
299 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
300 /*
301  * Set the debug registers back to their default "safe" values.
302  */
set_debug_reg_defaults(struct thread_struct * thread)303 static void set_debug_reg_defaults(struct thread_struct *thread)
304 {
305 	thread->iac1 = thread->iac2 = 0;
306 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
307 	thread->iac3 = thread->iac4 = 0;
308 #endif
309 	thread->dac1 = thread->dac2 = 0;
310 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
311 	thread->dvc1 = thread->dvc2 = 0;
312 #endif
313 	thread->dbcr0 = 0;
314 #ifdef CONFIG_BOOKE
315 	/*
316 	 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
317 	 */
318 	thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |	\
319 			DBCR1_IAC3US | DBCR1_IAC4US;
320 	/*
321 	 * Force Data Address Compare User/Supervisor bits to be User-only
322 	 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
323 	 */
324 	thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
325 #else
326 	thread->dbcr1 = 0;
327 #endif
328 }
329 
prime_debug_regs(struct thread_struct * thread)330 static void prime_debug_regs(struct thread_struct *thread)
331 {
332 	mtspr(SPRN_IAC1, thread->iac1);
333 	mtspr(SPRN_IAC2, thread->iac2);
334 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
335 	mtspr(SPRN_IAC3, thread->iac3);
336 	mtspr(SPRN_IAC4, thread->iac4);
337 #endif
338 	mtspr(SPRN_DAC1, thread->dac1);
339 	mtspr(SPRN_DAC2, thread->dac2);
340 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
341 	mtspr(SPRN_DVC1, thread->dvc1);
342 	mtspr(SPRN_DVC2, thread->dvc2);
343 #endif
344 	mtspr(SPRN_DBCR0, thread->dbcr0);
345 	mtspr(SPRN_DBCR1, thread->dbcr1);
346 #ifdef CONFIG_BOOKE
347 	mtspr(SPRN_DBCR2, thread->dbcr2);
348 #endif
349 }
350 /*
351  * Unless neither the old or new thread are making use of the
352  * debug registers, set the debug registers from the values
353  * stored in the new thread.
354  */
switch_booke_debug_regs(struct thread_struct * new_thread)355 static void switch_booke_debug_regs(struct thread_struct *new_thread)
356 {
357 	if ((current->thread.dbcr0 & DBCR0_IDM)
358 		|| (new_thread->dbcr0 & DBCR0_IDM))
359 			prime_debug_regs(new_thread);
360 }
361 #else	/* !CONFIG_PPC_ADV_DEBUG_REGS */
362 #ifndef CONFIG_HAVE_HW_BREAKPOINT
set_debug_reg_defaults(struct thread_struct * thread)363 static void set_debug_reg_defaults(struct thread_struct *thread)
364 {
365 	if (thread->dabr) {
366 		thread->dabr = 0;
367 		set_dabr(0);
368 	}
369 }
370 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
371 #endif	/* CONFIG_PPC_ADV_DEBUG_REGS */
372 
set_dabr(unsigned long dabr)373 int set_dabr(unsigned long dabr)
374 {
375 	__get_cpu_var(current_dabr) = dabr;
376 
377 	if (ppc_md.set_dabr)
378 		return ppc_md.set_dabr(dabr);
379 
380 	/* XXX should we have a CPU_FTR_HAS_DABR ? */
381 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
382 	mtspr(SPRN_DAC1, dabr);
383 #ifdef CONFIG_PPC_47x
384 	isync();
385 #endif
386 #elif defined(CONFIG_PPC_BOOK3S)
387 	mtspr(SPRN_DABR, dabr);
388 #endif
389 
390 
391 	return 0;
392 }
393 
394 #ifdef CONFIG_PPC64
395 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
396 #endif
397 
__switch_to(struct task_struct * prev,struct task_struct * new)398 struct task_struct *__switch_to(struct task_struct *prev,
399 	struct task_struct *new)
400 {
401 	struct thread_struct *new_thread, *old_thread;
402 	unsigned long flags;
403 	struct task_struct *last;
404 #ifdef CONFIG_PPC_BOOK3S_64
405 	struct ppc64_tlb_batch *batch;
406 #endif
407 
408 #ifdef CONFIG_SMP
409 	/* avoid complexity of lazy save/restore of fpu
410 	 * by just saving it every time we switch out if
411 	 * this task used the fpu during the last quantum.
412 	 *
413 	 * If it tries to use the fpu again, it'll trap and
414 	 * reload its fp regs.  So we don't have to do a restore
415 	 * every switch, just a save.
416 	 *  -- Cort
417 	 */
418 	if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
419 		giveup_fpu(prev);
420 #ifdef CONFIG_ALTIVEC
421 	/*
422 	 * If the previous thread used altivec in the last quantum
423 	 * (thus changing altivec regs) then save them.
424 	 * We used to check the VRSAVE register but not all apps
425 	 * set it, so we don't rely on it now (and in fact we need
426 	 * to save & restore VSCR even if VRSAVE == 0).  -- paulus
427 	 *
428 	 * On SMP we always save/restore altivec regs just to avoid the
429 	 * complexity of changing processors.
430 	 *  -- Cort
431 	 */
432 	if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
433 		giveup_altivec(prev);
434 #endif /* CONFIG_ALTIVEC */
435 #ifdef CONFIG_VSX
436 	if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
437 		/* VMX and FPU registers are already save here */
438 		__giveup_vsx(prev);
439 #endif /* CONFIG_VSX */
440 #ifdef CONFIG_SPE
441 	/*
442 	 * If the previous thread used spe in the last quantum
443 	 * (thus changing spe regs) then save them.
444 	 *
445 	 * On SMP we always save/restore spe regs just to avoid the
446 	 * complexity of changing processors.
447 	 */
448 	if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
449 		giveup_spe(prev);
450 #endif /* CONFIG_SPE */
451 
452 #else  /* CONFIG_SMP */
453 #ifdef CONFIG_ALTIVEC
454 	/* Avoid the trap.  On smp this this never happens since
455 	 * we don't set last_task_used_altivec -- Cort
456 	 */
457 	if (new->thread.regs && last_task_used_altivec == new)
458 		new->thread.regs->msr |= MSR_VEC;
459 #endif /* CONFIG_ALTIVEC */
460 #ifdef CONFIG_VSX
461 	if (new->thread.regs && last_task_used_vsx == new)
462 		new->thread.regs->msr |= MSR_VSX;
463 #endif /* CONFIG_VSX */
464 #ifdef CONFIG_SPE
465 	/* Avoid the trap.  On smp this this never happens since
466 	 * we don't set last_task_used_spe
467 	 */
468 	if (new->thread.regs && last_task_used_spe == new)
469 		new->thread.regs->msr |= MSR_SPE;
470 #endif /* CONFIG_SPE */
471 
472 #endif /* CONFIG_SMP */
473 
474 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
475 	switch_booke_debug_regs(&new->thread);
476 #else
477 /*
478  * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
479  * schedule DABR
480  */
481 #ifndef CONFIG_HAVE_HW_BREAKPOINT
482 	if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
483 		set_dabr(new->thread.dabr);
484 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
485 #endif
486 
487 
488 	new_thread = &new->thread;
489 	old_thread = &current->thread;
490 
491 #ifdef CONFIG_PPC64
492 	/*
493 	 * Collect processor utilization data per process
494 	 */
495 	if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
496 		struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
497 		long unsigned start_tb, current_tb;
498 		start_tb = old_thread->start_tb;
499 		cu->current_tb = current_tb = mfspr(SPRN_PURR);
500 		old_thread->accum_tb += (current_tb - start_tb);
501 		new_thread->start_tb = current_tb;
502 	}
503 #endif /* CONFIG_PPC64 */
504 
505 #ifdef CONFIG_PPC_BOOK3S_64
506 	batch = &__get_cpu_var(ppc64_tlb_batch);
507 	if (batch->active) {
508 		current_thread_info()->local_flags |= _TLF_LAZY_MMU;
509 		if (batch->index)
510 			__flush_tlb_pending(batch);
511 		batch->active = 0;
512 	}
513 #endif /* CONFIG_PPC_BOOK3S_64 */
514 
515 	local_irq_save(flags);
516 
517 	account_system_vtime(current);
518 	account_process_vtime(current);
519 
520 	/*
521 	 * We can't take a PMU exception inside _switch() since there is a
522 	 * window where the kernel stack SLB and the kernel stack are out
523 	 * of sync. Hard disable here.
524 	 */
525 	hard_irq_disable();
526 	last = _switch(old_thread, new_thread);
527 
528 #ifdef CONFIG_PPC_BOOK3S_64
529 	if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
530 		current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
531 		batch = &__get_cpu_var(ppc64_tlb_batch);
532 		batch->active = 1;
533 	}
534 #endif /* CONFIG_PPC_BOOK3S_64 */
535 
536 	local_irq_restore(flags);
537 
538 	return last;
539 }
540 
541 static int instructions_to_print = 16;
542 
show_instructions(struct pt_regs * regs)543 static void show_instructions(struct pt_regs *regs)
544 {
545 	int i;
546 	unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
547 			sizeof(int));
548 
549 	printk("Instruction dump:");
550 
551 	for (i = 0; i < instructions_to_print; i++) {
552 		int instr;
553 
554 		if (!(i % 8))
555 			printk("\n");
556 
557 #if !defined(CONFIG_BOOKE)
558 		/* If executing with the IMMU off, adjust pc rather
559 		 * than print XXXXXXXX.
560 		 */
561 		if (!(regs->msr & MSR_IR))
562 			pc = (unsigned long)phys_to_virt(pc);
563 #endif
564 
565 		/* We use __get_user here *only* to avoid an OOPS on a
566 		 * bad address because the pc *should* only be a
567 		 * kernel address.
568 		 */
569 		if (!__kernel_text_address(pc) ||
570 		     __get_user(instr, (unsigned int __user *)pc)) {
571 			printk(KERN_CONT "XXXXXXXX ");
572 		} else {
573 			if (regs->nip == pc)
574 				printk(KERN_CONT "<%08x> ", instr);
575 			else
576 				printk(KERN_CONT "%08x ", instr);
577 		}
578 
579 		pc += sizeof(int);
580 	}
581 
582 	printk("\n");
583 }
584 
585 static struct regbit {
586 	unsigned long bit;
587 	const char *name;
588 } msr_bits[] = {
589 #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
590 	{MSR_SF,	"SF"},
591 	{MSR_HV,	"HV"},
592 #endif
593 	{MSR_VEC,	"VEC"},
594 	{MSR_VSX,	"VSX"},
595 #ifdef CONFIG_BOOKE
596 	{MSR_CE,	"CE"},
597 #endif
598 	{MSR_EE,	"EE"},
599 	{MSR_PR,	"PR"},
600 	{MSR_FP,	"FP"},
601 	{MSR_ME,	"ME"},
602 #ifdef CONFIG_BOOKE
603 	{MSR_DE,	"DE"},
604 #else
605 	{MSR_SE,	"SE"},
606 	{MSR_BE,	"BE"},
607 #endif
608 	{MSR_IR,	"IR"},
609 	{MSR_DR,	"DR"},
610 	{MSR_PMM,	"PMM"},
611 #ifndef CONFIG_BOOKE
612 	{MSR_RI,	"RI"},
613 	{MSR_LE,	"LE"},
614 #endif
615 	{0,		NULL}
616 };
617 
printbits(unsigned long val,struct regbit * bits)618 static void printbits(unsigned long val, struct regbit *bits)
619 {
620 	const char *sep = "";
621 
622 	printk("<");
623 	for (; bits->bit; ++bits)
624 		if (val & bits->bit) {
625 			printk("%s%s", sep, bits->name);
626 			sep = ",";
627 		}
628 	printk(">");
629 }
630 
631 #ifdef CONFIG_PPC64
632 #define REG		"%016lx"
633 #define REGS_PER_LINE	4
634 #define LAST_VOLATILE	13
635 #else
636 #define REG		"%08lx"
637 #define REGS_PER_LINE	8
638 #define LAST_VOLATILE	12
639 #endif
640 
show_regs(struct pt_regs * regs)641 void show_regs(struct pt_regs * regs)
642 {
643 	int i, trap;
644 
645 	printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
646 	       regs->nip, regs->link, regs->ctr);
647 	printk("REGS: %p TRAP: %04lx   %s  (%s)\n",
648 	       regs, regs->trap, print_tainted(), init_utsname()->release);
649 	printk("MSR: "REG" ", regs->msr);
650 	printbits(regs->msr, msr_bits);
651 	printk("  CR: %08lx  XER: %08lx\n", regs->ccr, regs->xer);
652 #ifdef CONFIG_PPC64
653 	printk("SOFTE: %ld\n", regs->softe);
654 #endif
655 	trap = TRAP(regs);
656 	if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
657 		printk("CFAR: "REG"\n", regs->orig_gpr3);
658 	if (trap == 0x300 || trap == 0x600)
659 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
660 		printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
661 #else
662 		printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
663 #endif
664 	printk("TASK = %p[%d] '%s' THREAD: %p",
665 	       current, task_pid_nr(current), current->comm, task_thread_info(current));
666 
667 #ifdef CONFIG_SMP
668 	printk(" CPU: %d", raw_smp_processor_id());
669 #endif /* CONFIG_SMP */
670 
671 	for (i = 0;  i < 32;  i++) {
672 		if ((i % REGS_PER_LINE) == 0)
673 			printk("\nGPR%02d: ", i);
674 		printk(REG " ", regs->gpr[i]);
675 		if (i == LAST_VOLATILE && !FULL_REGS(regs))
676 			break;
677 	}
678 	printk("\n");
679 #ifdef CONFIG_KALLSYMS
680 	/*
681 	 * Lookup NIP late so we have the best change of getting the
682 	 * above info out without failing
683 	 */
684 	printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
685 	printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
686 #endif
687 	show_stack(current, (unsigned long *) regs->gpr[1]);
688 	if (!user_mode(regs))
689 		show_instructions(regs);
690 }
691 
exit_thread(void)692 void exit_thread(void)
693 {
694 	discard_lazy_cpu_state();
695 }
696 
flush_thread(void)697 void flush_thread(void)
698 {
699 	discard_lazy_cpu_state();
700 
701 #ifdef CONFIG_HAVE_HW_BREAKPOINT
702 	flush_ptrace_hw_breakpoint(current);
703 #else /* CONFIG_HAVE_HW_BREAKPOINT */
704 	set_debug_reg_defaults(&current->thread);
705 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
706 }
707 
708 void
release_thread(struct task_struct * t)709 release_thread(struct task_struct *t)
710 {
711 }
712 
713 /*
714  * This gets called before we allocate a new thread and copy
715  * the current task into it.
716  */
prepare_to_copy(struct task_struct * tsk)717 void prepare_to_copy(struct task_struct *tsk)
718 {
719 	flush_fp_to_thread(current);
720 	flush_altivec_to_thread(current);
721 	flush_vsx_to_thread(current);
722 	flush_spe_to_thread(current);
723 #ifdef CONFIG_HAVE_HW_BREAKPOINT
724 	flush_ptrace_hw_breakpoint(tsk);
725 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
726 }
727 
728 /*
729  * Copy a thread..
730  */
731 extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
732 
copy_thread(unsigned long clone_flags,unsigned long usp,unsigned long unused,struct task_struct * p,struct pt_regs * regs)733 int copy_thread(unsigned long clone_flags, unsigned long usp,
734 		unsigned long unused, struct task_struct *p,
735 		struct pt_regs *regs)
736 {
737 	struct pt_regs *childregs, *kregs;
738 	extern void ret_from_fork(void);
739 	unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
740 
741 	CHECK_FULL_REGS(regs);
742 	/* Copy registers */
743 	sp -= sizeof(struct pt_regs);
744 	childregs = (struct pt_regs *) sp;
745 	*childregs = *regs;
746 	if ((childregs->msr & MSR_PR) == 0) {
747 		/* for kernel thread, set `current' and stackptr in new task */
748 		childregs->gpr[1] = sp + sizeof(struct pt_regs);
749 #ifdef CONFIG_PPC32
750 		childregs->gpr[2] = (unsigned long) p;
751 #else
752 		clear_tsk_thread_flag(p, TIF_32BIT);
753 #endif
754 		p->thread.regs = NULL;	/* no user register state */
755 	} else {
756 		childregs->gpr[1] = usp;
757 		p->thread.regs = childregs;
758 		if (clone_flags & CLONE_SETTLS) {
759 #ifdef CONFIG_PPC64
760 			if (!is_32bit_task())
761 				childregs->gpr[13] = childregs->gpr[6];
762 			else
763 #endif
764 				childregs->gpr[2] = childregs->gpr[6];
765 		}
766 	}
767 	childregs->gpr[3] = 0;  /* Result from fork() */
768 	sp -= STACK_FRAME_OVERHEAD;
769 
770 	/*
771 	 * The way this works is that at some point in the future
772 	 * some task will call _switch to switch to the new task.
773 	 * That will pop off the stack frame created below and start
774 	 * the new task running at ret_from_fork.  The new task will
775 	 * do some house keeping and then return from the fork or clone
776 	 * system call, using the stack frame created above.
777 	 */
778 	sp -= sizeof(struct pt_regs);
779 	kregs = (struct pt_regs *) sp;
780 	sp -= STACK_FRAME_OVERHEAD;
781 	p->thread.ksp = sp;
782 	p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
783 				_ALIGN_UP(sizeof(struct thread_info), 16);
784 
785 #ifdef CONFIG_PPC_STD_MMU_64
786 	if (mmu_has_feature(MMU_FTR_SLB)) {
787 		unsigned long sp_vsid;
788 		unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
789 
790 		if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
791 			sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
792 				<< SLB_VSID_SHIFT_1T;
793 		else
794 			sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
795 				<< SLB_VSID_SHIFT;
796 		sp_vsid |= SLB_VSID_KERNEL | llp;
797 		p->thread.ksp_vsid = sp_vsid;
798 	}
799 #endif /* CONFIG_PPC_STD_MMU_64 */
800 #ifdef CONFIG_PPC64
801 	if (cpu_has_feature(CPU_FTR_DSCR)) {
802 		p->thread.dscr_inherit = current->thread.dscr_inherit;
803 		p->thread.dscr = current->thread.dscr;
804 	}
805 #endif
806 
807 	/*
808 	 * The PPC64 ABI makes use of a TOC to contain function
809 	 * pointers.  The function (ret_from_except) is actually a pointer
810 	 * to the TOC entry.  The first entry is a pointer to the actual
811 	 * function.
812  	 */
813 #ifdef CONFIG_PPC64
814 	kregs->nip = *((unsigned long *)ret_from_fork);
815 #else
816 	kregs->nip = (unsigned long)ret_from_fork;
817 #endif
818 
819 	return 0;
820 }
821 
822 /*
823  * Set up a thread for executing a new program
824  */
start_thread(struct pt_regs * regs,unsigned long start,unsigned long sp)825 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
826 {
827 #ifdef CONFIG_PPC64
828 	unsigned long load_addr = regs->gpr[2];	/* saved by ELF_PLAT_INIT */
829 #endif
830 
831 	/*
832 	 * If we exec out of a kernel thread then thread.regs will not be
833 	 * set.  Do it now.
834 	 */
835 	if (!current->thread.regs) {
836 		struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
837 		current->thread.regs = regs - 1;
838 	}
839 
840 	memset(regs->gpr, 0, sizeof(regs->gpr));
841 	regs->ctr = 0;
842 	regs->link = 0;
843 	regs->xer = 0;
844 	regs->ccr = 0;
845 	regs->gpr[1] = sp;
846 
847 	/*
848 	 * We have just cleared all the nonvolatile GPRs, so make
849 	 * FULL_REGS(regs) return true.  This is necessary to allow
850 	 * ptrace to examine the thread immediately after exec.
851 	 */
852 	regs->trap &= ~1UL;
853 
854 #ifdef CONFIG_PPC32
855 	regs->mq = 0;
856 	regs->nip = start;
857 	regs->msr = MSR_USER;
858 #else
859 	if (!is_32bit_task()) {
860 		unsigned long entry, toc;
861 
862 		/* start is a relocated pointer to the function descriptor for
863 		 * the elf _start routine.  The first entry in the function
864 		 * descriptor is the entry address of _start and the second
865 		 * entry is the TOC value we need to use.
866 		 */
867 		__get_user(entry, (unsigned long __user *)start);
868 		__get_user(toc, (unsigned long __user *)start+1);
869 
870 		/* Check whether the e_entry function descriptor entries
871 		 * need to be relocated before we can use them.
872 		 */
873 		if (load_addr != 0) {
874 			entry += load_addr;
875 			toc   += load_addr;
876 		}
877 		regs->nip = entry;
878 		regs->gpr[2] = toc;
879 		regs->msr = MSR_USER64;
880 	} else {
881 		regs->nip = start;
882 		regs->gpr[2] = 0;
883 		regs->msr = MSR_USER32;
884 	}
885 #endif
886 
887 	discard_lazy_cpu_state();
888 #ifdef CONFIG_VSX
889 	current->thread.used_vsr = 0;
890 #endif
891 	memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
892 	current->thread.fpscr.val = 0;
893 #ifdef CONFIG_ALTIVEC
894 	memset(current->thread.vr, 0, sizeof(current->thread.vr));
895 	memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
896 	current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
897 	current->thread.vrsave = 0;
898 	current->thread.used_vr = 0;
899 #endif /* CONFIG_ALTIVEC */
900 #ifdef CONFIG_SPE
901 	memset(current->thread.evr, 0, sizeof(current->thread.evr));
902 	current->thread.acc = 0;
903 	current->thread.spefscr = 0;
904 	current->thread.used_spe = 0;
905 #endif /* CONFIG_SPE */
906 }
907 
908 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
909 		| PR_FP_EXC_RES | PR_FP_EXC_INV)
910 
set_fpexc_mode(struct task_struct * tsk,unsigned int val)911 int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
912 {
913 	struct pt_regs *regs = tsk->thread.regs;
914 
915 	/* This is a bit hairy.  If we are an SPE enabled  processor
916 	 * (have embedded fp) we store the IEEE exception enable flags in
917 	 * fpexc_mode.  fpexc_mode is also used for setting FP exception
918 	 * mode (asyn, precise, disabled) for 'Classic' FP. */
919 	if (val & PR_FP_EXC_SW_ENABLE) {
920 #ifdef CONFIG_SPE
921 		if (cpu_has_feature(CPU_FTR_SPE)) {
922 			tsk->thread.fpexc_mode = val &
923 				(PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
924 			return 0;
925 		} else {
926 			return -EINVAL;
927 		}
928 #else
929 		return -EINVAL;
930 #endif
931 	}
932 
933 	/* on a CONFIG_SPE this does not hurt us.  The bits that
934 	 * __pack_fe01 use do not overlap with bits used for
935 	 * PR_FP_EXC_SW_ENABLE.  Additionally, the MSR[FE0,FE1] bits
936 	 * on CONFIG_SPE implementations are reserved so writing to
937 	 * them does not change anything */
938 	if (val > PR_FP_EXC_PRECISE)
939 		return -EINVAL;
940 	tsk->thread.fpexc_mode = __pack_fe01(val);
941 	if (regs != NULL && (regs->msr & MSR_FP) != 0)
942 		regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
943 			| tsk->thread.fpexc_mode;
944 	return 0;
945 }
946 
get_fpexc_mode(struct task_struct * tsk,unsigned long adr)947 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
948 {
949 	unsigned int val;
950 
951 	if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
952 #ifdef CONFIG_SPE
953 		if (cpu_has_feature(CPU_FTR_SPE))
954 			val = tsk->thread.fpexc_mode;
955 		else
956 			return -EINVAL;
957 #else
958 		return -EINVAL;
959 #endif
960 	else
961 		val = __unpack_fe01(tsk->thread.fpexc_mode);
962 	return put_user(val, (unsigned int __user *) adr);
963 }
964 
set_endian(struct task_struct * tsk,unsigned int val)965 int set_endian(struct task_struct *tsk, unsigned int val)
966 {
967 	struct pt_regs *regs = tsk->thread.regs;
968 
969 	if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
970 	    (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
971 		return -EINVAL;
972 
973 	if (regs == NULL)
974 		return -EINVAL;
975 
976 	if (val == PR_ENDIAN_BIG)
977 		regs->msr &= ~MSR_LE;
978 	else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
979 		regs->msr |= MSR_LE;
980 	else
981 		return -EINVAL;
982 
983 	return 0;
984 }
985 
get_endian(struct task_struct * tsk,unsigned long adr)986 int get_endian(struct task_struct *tsk, unsigned long adr)
987 {
988 	struct pt_regs *regs = tsk->thread.regs;
989 	unsigned int val;
990 
991 	if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
992 	    !cpu_has_feature(CPU_FTR_REAL_LE))
993 		return -EINVAL;
994 
995 	if (regs == NULL)
996 		return -EINVAL;
997 
998 	if (regs->msr & MSR_LE) {
999 		if (cpu_has_feature(CPU_FTR_REAL_LE))
1000 			val = PR_ENDIAN_LITTLE;
1001 		else
1002 			val = PR_ENDIAN_PPC_LITTLE;
1003 	} else
1004 		val = PR_ENDIAN_BIG;
1005 
1006 	return put_user(val, (unsigned int __user *)adr);
1007 }
1008 
set_unalign_ctl(struct task_struct * tsk,unsigned int val)1009 int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
1010 {
1011 	tsk->thread.align_ctl = val;
1012 	return 0;
1013 }
1014 
get_unalign_ctl(struct task_struct * tsk,unsigned long adr)1015 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1016 {
1017 	return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1018 }
1019 
1020 #define TRUNC_PTR(x)	((typeof(x))(((unsigned long)(x)) & 0xffffffff))
1021 
sys_clone(unsigned long clone_flags,unsigned long usp,int __user * parent_tidp,void __user * child_threadptr,int __user * child_tidp,int p6,struct pt_regs * regs)1022 int sys_clone(unsigned long clone_flags, unsigned long usp,
1023 	      int __user *parent_tidp, void __user *child_threadptr,
1024 	      int __user *child_tidp, int p6,
1025 	      struct pt_regs *regs)
1026 {
1027 	CHECK_FULL_REGS(regs);
1028 	if (usp == 0)
1029 		usp = regs->gpr[1];	/* stack pointer for child */
1030 #ifdef CONFIG_PPC64
1031 	if (is_32bit_task()) {
1032 		parent_tidp = TRUNC_PTR(parent_tidp);
1033 		child_tidp = TRUNC_PTR(child_tidp);
1034 	}
1035 #endif
1036  	return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
1037 }
1038 
sys_fork(unsigned long p1,unsigned long p2,unsigned long p3,unsigned long p4,unsigned long p5,unsigned long p6,struct pt_regs * regs)1039 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
1040 	     unsigned long p4, unsigned long p5, unsigned long p6,
1041 	     struct pt_regs *regs)
1042 {
1043 	CHECK_FULL_REGS(regs);
1044 	return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
1045 }
1046 
sys_vfork(unsigned long p1,unsigned long p2,unsigned long p3,unsigned long p4,unsigned long p5,unsigned long p6,struct pt_regs * regs)1047 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
1048 	      unsigned long p4, unsigned long p5, unsigned long p6,
1049 	      struct pt_regs *regs)
1050 {
1051 	CHECK_FULL_REGS(regs);
1052 	return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
1053 			regs, 0, NULL, NULL);
1054 }
1055 
sys_execve(unsigned long a0,unsigned long a1,unsigned long a2,unsigned long a3,unsigned long a4,unsigned long a5,struct pt_regs * regs)1056 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
1057 	       unsigned long a3, unsigned long a4, unsigned long a5,
1058 	       struct pt_regs *regs)
1059 {
1060 	int error;
1061 	char *filename;
1062 
1063 	filename = getname((const char __user *) a0);
1064 	error = PTR_ERR(filename);
1065 	if (IS_ERR(filename))
1066 		goto out;
1067 	flush_fp_to_thread(current);
1068 	flush_altivec_to_thread(current);
1069 	flush_spe_to_thread(current);
1070 	error = do_execve(filename,
1071 			  (const char __user *const __user *) a1,
1072 			  (const char __user *const __user *) a2, regs);
1073 	putname(filename);
1074 out:
1075 	return error;
1076 }
1077 
valid_irq_stack(unsigned long sp,struct task_struct * p,unsigned long nbytes)1078 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1079 				  unsigned long nbytes)
1080 {
1081 	unsigned long stack_page;
1082 	unsigned long cpu = task_cpu(p);
1083 
1084 	/*
1085 	 * Avoid crashing if the stack has overflowed and corrupted
1086 	 * task_cpu(p), which is in the thread_info struct.
1087 	 */
1088 	if (cpu < NR_CPUS && cpu_possible(cpu)) {
1089 		stack_page = (unsigned long) hardirq_ctx[cpu];
1090 		if (sp >= stack_page + sizeof(struct thread_struct)
1091 		    && sp <= stack_page + THREAD_SIZE - nbytes)
1092 			return 1;
1093 
1094 		stack_page = (unsigned long) softirq_ctx[cpu];
1095 		if (sp >= stack_page + sizeof(struct thread_struct)
1096 		    && sp <= stack_page + THREAD_SIZE - nbytes)
1097 			return 1;
1098 	}
1099 	return 0;
1100 }
1101 
validate_sp(unsigned long sp,struct task_struct * p,unsigned long nbytes)1102 int validate_sp(unsigned long sp, struct task_struct *p,
1103 		       unsigned long nbytes)
1104 {
1105 	unsigned long stack_page = (unsigned long)task_stack_page(p);
1106 
1107 	if (sp >= stack_page + sizeof(struct thread_struct)
1108 	    && sp <= stack_page + THREAD_SIZE - nbytes)
1109 		return 1;
1110 
1111 	return valid_irq_stack(sp, p, nbytes);
1112 }
1113 
1114 EXPORT_SYMBOL(validate_sp);
1115 
get_wchan(struct task_struct * p)1116 unsigned long get_wchan(struct task_struct *p)
1117 {
1118 	unsigned long ip, sp;
1119 	int count = 0;
1120 
1121 	if (!p || p == current || p->state == TASK_RUNNING)
1122 		return 0;
1123 
1124 	sp = p->thread.ksp;
1125 	if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1126 		return 0;
1127 
1128 	do {
1129 		sp = *(unsigned long *)sp;
1130 		if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1131 			return 0;
1132 		if (count > 0) {
1133 			ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
1134 			if (!in_sched_functions(ip))
1135 				return ip;
1136 		}
1137 	} while (count++ < 16);
1138 	return 0;
1139 }
1140 
1141 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
1142 
show_stack(struct task_struct * tsk,unsigned long * stack)1143 void show_stack(struct task_struct *tsk, unsigned long *stack)
1144 {
1145 	unsigned long sp, ip, lr, newsp;
1146 	int count = 0;
1147 	int firstframe = 1;
1148 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1149 	int curr_frame = current->curr_ret_stack;
1150 	extern void return_to_handler(void);
1151 	unsigned long rth = (unsigned long)return_to_handler;
1152 	unsigned long mrth = -1;
1153 #ifdef CONFIG_PPC64
1154 	extern void mod_return_to_handler(void);
1155 	rth = *(unsigned long *)rth;
1156 	mrth = (unsigned long)mod_return_to_handler;
1157 	mrth = *(unsigned long *)mrth;
1158 #endif
1159 #endif
1160 
1161 	sp = (unsigned long) stack;
1162 	if (tsk == NULL)
1163 		tsk = current;
1164 	if (sp == 0) {
1165 		if (tsk == current)
1166 			asm("mr %0,1" : "=r" (sp));
1167 		else
1168 			sp = tsk->thread.ksp;
1169 	}
1170 
1171 	lr = 0;
1172 	printk("Call Trace:\n");
1173 	do {
1174 		if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
1175 			return;
1176 
1177 		stack = (unsigned long *) sp;
1178 		newsp = stack[0];
1179 		ip = stack[STACK_FRAME_LR_SAVE];
1180 		if (!firstframe || ip != lr) {
1181 			printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1182 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1183 			if ((ip == rth || ip == mrth) && curr_frame >= 0) {
1184 				printk(" (%pS)",
1185 				       (void *)current->ret_stack[curr_frame].ret);
1186 				curr_frame--;
1187 			}
1188 #endif
1189 			if (firstframe)
1190 				printk(" (unreliable)");
1191 			printk("\n");
1192 		}
1193 		firstframe = 0;
1194 
1195 		/*
1196 		 * See if this is an exception frame.
1197 		 * We look for the "regshere" marker in the current frame.
1198 		 */
1199 		if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1200 		    && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
1201 			struct pt_regs *regs = (struct pt_regs *)
1202 				(sp + STACK_FRAME_OVERHEAD);
1203 			lr = regs->link;
1204 			printk("--- Exception: %lx at %pS\n    LR = %pS\n",
1205 			       regs->trap, (void *)regs->nip, (void *)lr);
1206 			firstframe = 1;
1207 		}
1208 
1209 		sp = newsp;
1210 	} while (count++ < kstack_depth_to_print);
1211 }
1212 
dump_stack(void)1213 void dump_stack(void)
1214 {
1215 	show_stack(current, NULL);
1216 }
1217 EXPORT_SYMBOL(dump_stack);
1218 
1219 #ifdef CONFIG_PPC64
1220 /* Called with hard IRQs off */
__ppc64_runlatch_on(void)1221 void notrace __ppc64_runlatch_on(void)
1222 {
1223 	struct thread_info *ti = current_thread_info();
1224 	unsigned long ctrl;
1225 
1226 	ctrl = mfspr(SPRN_CTRLF);
1227 	ctrl |= CTRL_RUNLATCH;
1228 	mtspr(SPRN_CTRLT, ctrl);
1229 
1230 	ti->local_flags |= _TLF_RUNLATCH;
1231 }
1232 
1233 /* Called with hard IRQs off */
__ppc64_runlatch_off(void)1234 void notrace __ppc64_runlatch_off(void)
1235 {
1236 	struct thread_info *ti = current_thread_info();
1237 	unsigned long ctrl;
1238 
1239 	ti->local_flags &= ~_TLF_RUNLATCH;
1240 
1241 	ctrl = mfspr(SPRN_CTRLF);
1242 	ctrl &= ~CTRL_RUNLATCH;
1243 	mtspr(SPRN_CTRLT, ctrl);
1244 }
1245 #endif /* CONFIG_PPC64 */
1246 
1247 #if THREAD_SHIFT < PAGE_SHIFT
1248 
1249 static struct kmem_cache *thread_info_cache;
1250 
alloc_thread_info_node(struct task_struct * tsk,int node)1251 struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
1252 {
1253 	struct thread_info *ti;
1254 
1255 	ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
1256 	if (unlikely(ti == NULL))
1257 		return NULL;
1258 #ifdef CONFIG_DEBUG_STACK_USAGE
1259 	memset(ti, 0, THREAD_SIZE);
1260 #endif
1261 	return ti;
1262 }
1263 
free_thread_info(struct thread_info * ti)1264 void free_thread_info(struct thread_info *ti)
1265 {
1266 	kmem_cache_free(thread_info_cache, ti);
1267 }
1268 
thread_info_cache_init(void)1269 void thread_info_cache_init(void)
1270 {
1271 	thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1272 					      THREAD_SIZE, 0, NULL);
1273 	BUG_ON(thread_info_cache == NULL);
1274 }
1275 
1276 #endif /* THREAD_SHIFT < PAGE_SHIFT */
1277 
arch_align_stack(unsigned long sp)1278 unsigned long arch_align_stack(unsigned long sp)
1279 {
1280 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1281 		sp -= get_random_int() & ~PAGE_MASK;
1282 	return sp & ~0xf;
1283 }
1284 
brk_rnd(void)1285 static inline unsigned long brk_rnd(void)
1286 {
1287         unsigned long rnd = 0;
1288 
1289 	/* 8MB for 32bit, 1GB for 64bit */
1290 	if (is_32bit_task())
1291 		rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1292 	else
1293 		rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1294 
1295 	return rnd << PAGE_SHIFT;
1296 }
1297 
arch_randomize_brk(struct mm_struct * mm)1298 unsigned long arch_randomize_brk(struct mm_struct *mm)
1299 {
1300 	unsigned long base = mm->brk;
1301 	unsigned long ret;
1302 
1303 #ifdef CONFIG_PPC_STD_MMU_64
1304 	/*
1305 	 * If we are using 1TB segments and we are allowed to randomise
1306 	 * the heap, we can put it above 1TB so it is backed by a 1TB
1307 	 * segment. Otherwise the heap will be in the bottom 1TB
1308 	 * which always uses 256MB segments and this may result in a
1309 	 * performance penalty.
1310 	 */
1311 	if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1312 		base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1313 #endif
1314 
1315 	ret = PAGE_ALIGN(base + brk_rnd());
1316 
1317 	if (ret < mm->brk)
1318 		return mm->brk;
1319 
1320 	return ret;
1321 }
1322 
randomize_et_dyn(unsigned long base)1323 unsigned long randomize_et_dyn(unsigned long base)
1324 {
1325 	unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1326 
1327 	if (ret < base)
1328 		return base;
1329 
1330 	return ret;
1331 }
1332