1/* 2 * Device Tree Source for IBM Embedded PPC 476 Platform 3 * 4 * Copyright © 2011 Tony Breeds IBM Corporation 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/dts-v1/; 12 13/memreserve/ 0x01f00000 0x00100000; // spin table 14 15/ { 16 #address-cells = <2>; 17 #size-cells = <2>; 18 model = "ibm,currituck"; 19 compatible = "ibm,currituck"; 20 dcr-parent = <&{/cpus/cpu@0}>; 21 22 aliases { 23 serial0 = &UART0; 24 }; 25 26 cpus { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 cpu@0 { 31 device_type = "cpu"; 32 model = "PowerPC,476"; 33 reg = <0>; 34 clock-frequency = <1600000000>; // 1.6 GHz 35 timebase-frequency = <100000000>; // 100Mhz 36 i-cache-line-size = <32>; 37 d-cache-line-size = <32>; 38 i-cache-size = <32768>; 39 d-cache-size = <32768>; 40 dcr-controller; 41 dcr-access-method = "native"; 42 status = "ok"; 43 }; 44 cpu@1 { 45 device_type = "cpu"; 46 model = "PowerPC,476"; 47 reg = <1>; 48 clock-frequency = <1600000000>; // 1.6 GHz 49 timebase-frequency = <100000000>; // 100Mhz 50 i-cache-line-size = <32>; 51 d-cache-line-size = <32>; 52 i-cache-size = <32768>; 53 d-cache-size = <32768>; 54 dcr-controller; 55 dcr-access-method = "native"; 56 status = "disabled"; 57 enable-method = "spin-table"; 58 cpu-release-addr = <0x0 0x01f00000>; 59 }; 60 }; 61 62 memory { 63 device_type = "memory"; 64 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage 65 }; 66 67 MPIC: interrupt-controller { 68 compatible = "chrp,open-pic"; 69 interrupt-controller; 70 dcr-reg = <0xffc00000 0x00040000>; 71 #address-cells = <0>; 72 #size-cells = <0>; 73 #interrupt-cells = <2>; 74 75 }; 76 77 plb { 78 compatible = "ibm,plb6"; 79 #address-cells = <2>; 80 #size-cells = <2>; 81 ranges; 82 clock-frequency = <200000000>; // 200Mhz 83 84 POB0: opb { 85 compatible = "ibm,opb-4xx", "ibm,opb"; 86 #address-cells = <1>; 87 #size-cells = <1>; 88 /* Wish there was a nicer way of specifying a full 89 * 32-bit range 90 */ 91 ranges = <0x00000000 0x00000200 0x00000000 0x80000000 92 0x80000000 0x00000200 0x80000000 0x80000000>; 93 clock-frequency = <100000000>; 94 95 UART0: serial@10000000 { 96 device_type = "serial"; 97 compatible = "ns16750", "ns16550"; 98 reg = <0x10000000 0x00000008>; 99 virtual-reg = <0xe1000000>; 100 clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART] 101 current-speed = <115200>; 102 interrupt-parent = <&MPIC>; 103 interrupts = <34 2>; 104 }; 105 106 IIC0: i2c@00000000 { 107 compatible = "ibm,iic-currituck", "ibm,iic"; 108 reg = <0x0 0x00000014>; 109 interrupt-parent = <&MPIC>; 110 interrupts = <79 2>; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 rtc@68 { 114 compatible = "stm,m41t80", "m41st85"; 115 reg = <0x68>; 116 }; 117 }; 118 }; 119 120 PCIE0: pciex@10100000000 { // 4xGBIF1 121 device_type = "pci"; 122 #interrupt-cells = <1>; 123 #size-cells = <2>; 124 #address-cells = <3>; 125 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 126 primary; 127 port = <0x0>; /* port number */ 128 reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */ 129 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 130 dcr-reg = <0x80 0x20>; 131 132// pci_space < pci_addr > < cpu_addr > < size > 133 ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000 134 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>; 135 136 /* Inbound starting at 0 to memsize filled in by zImage */ 137 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 138 139 /* This drives busses 0 to 0xf */ 140 bus-range = <0x0 0xf>; 141 142 /* Legacy interrupts (note the weird polarity, the bridge seems 143 * to invert PCIe legacy interrupts). 144 * We are de-swizzling here because the numbers are actually for 145 * port of the root complex virtual P2P bridge. But I want 146 * to avoid putting a node for it in the tree, so the numbers 147 * below are basically de-swizzled numbers. 148 * The real slot is on idsel 0, so the swizzling is 1:1 149 */ 150 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 151 interrupt-map = < 152 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */ 153 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */ 154 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */ 155 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>; 156 }; 157 158 PCIE1: pciex@30100000000 { // 4xGBIF0 159 device_type = "pci"; 160 #interrupt-cells = <1>; 161 #size-cells = <2>; 162 #address-cells = <3>; 163 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 164 primary; 165 port = <0x1>; /* port number */ 166 reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */ 167 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 168 dcr-reg = <0x60 0x20>; 169 170 ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000 171 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>; 172 173 /* Inbound starting at 0 to memsize filled in by zImage */ 174 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 175 176 /* This drives busses 0 to 0xf */ 177 bus-range = <0x0 0xf>; 178 179 /* Legacy interrupts (note the weird polarity, the bridge seems 180 * to invert PCIe legacy interrupts). 181 * We are de-swizzling here because the numbers are actually for 182 * port of the root complex virtual P2P bridge. But I want 183 * to avoid putting a node for it in the tree, so the numbers 184 * below are basically de-swizzled numbers. 185 * The real slot is on idsel 0, so the swizzling is 1:1 186 */ 187 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 188 interrupt-map = < 189 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */ 190 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */ 191 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */ 192 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>; 193 }; 194 195 PCIE2: pciex@38100000000 { // 2xGBIF0 196 device_type = "pci"; 197 #interrupt-cells = <1>; 198 #size-cells = <2>; 199 #address-cells = <3>; 200 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 201 primary; 202 port = <0x2>; /* port number */ 203 reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */ 204 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 205 dcr-reg = <0xA0 0x20>; 206 207 ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000 208 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>; 209 210 /* Inbound starting at 0 to memsize filled in by zImage */ 211 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 212 213 /* This drives busses 0 to 0xf */ 214 bus-range = <0x0 0xf>; 215 216 /* Legacy interrupts (note the weird polarity, the bridge seems 217 * to invert PCIe legacy interrupts). 218 * We are de-swizzling here because the numbers are actually for 219 * port of the root complex virtual P2P bridge. But I want 220 * to avoid putting a node for it in the tree, so the numbers 221 * below are basically de-swizzled numbers. 222 * The real slot is on idsel 0, so the swizzling is 1:1 223 */ 224 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 225 interrupt-map = < 226 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */ 227 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */ 228 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */ 229 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>; 230 }; 231 232 }; 233 234 chosen { 235 linux,stdout-path = &UART0; 236 }; 237}; 238