1 /* MN10300 Hardware IRQ statistics and management
2  *
3  * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5  * Modified by David Howells (dhowells@redhat.com)
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public Licence
9  * as published by the Free Software Foundation; either version
10  * 2 of the Licence, or (at your option) any later version.
11  */
12 #ifndef _ASM_HARDIRQ_H
13 #define _ASM_HARDIRQ_H
14 
15 #include <linux/threads.h>
16 #include <linux/irq.h>
17 #include <asm/exceptions.h>
18 
19 /* assembly code in softirq.h is sensitive to the offsets of these fields */
20 typedef struct {
21 	unsigned int	__softirq_pending;
22 #ifdef CONFIG_MN10300_WD_TIMER
23 	unsigned int	__nmi_count;	/* arch dependent */
24 	unsigned int	__irq_count;	/* arch dependent */
25 #endif
26 } ____cacheline_aligned irq_cpustat_t;
27 
28 #include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
29 
30 extern void ack_bad_irq(int irq);
31 
32 /*
33  * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
34  * - these should jump to __common_exception in entry.S unless there's a good
35  *   reason to do otherwise (see trap_preinit() in traps.c)
36  */
37 typedef void (*intr_stub_fnx)(struct pt_regs *regs,
38 			      enum exception_code intcode);
39 
40 /*
41  * manipulate pointers in the Exception table (see entry.S)
42  * - these are indexed by decoding the lower 24 bits of the TBR register
43  * - note that the MN103E010 doesn't always trap through the correct vector,
44  *   but does always set the TBR correctly
45  */
46 extern asmlinkage void set_excp_vector(enum exception_code code,
47 				       intr_stub_fnx handler);
48 
49 #endif /* _ASM_HARDIRQ_H */
50