1 /*
2 *
3 * 2.6 port, Embedded Alley Solutions, Inc
4 *
5 * Based on Per Hallsmark, per.hallsmark@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20 #include <linux/init.h>
21 #include <linux/sched.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/mm.h>
25 #include <linux/delay.h>
26 #include <linux/interrupt.h>
27 #include <linux/serial_pnx8xxx.h>
28 #include <linux/pm.h>
29
30 #include <asm/cpu.h>
31 #include <asm/bootinfo.h>
32 #include <asm/irq.h>
33 #include <asm/mipsregs.h>
34 #include <asm/reboot.h>
35 #include <asm/pgtable.h>
36 #include <asm/time.h>
37
38 #include <glb.h>
39 #include <int.h>
40 #include <pci.h>
41 #include <uart.h>
42 #include <nand.h>
43
44 extern void __init board_setup(void);
45 extern void pnx8550_machine_restart(char *);
46 extern void pnx8550_machine_halt(void);
47 extern struct resource ioport_resource;
48 extern struct resource iomem_resource;
49 extern char *prom_getcmdline(void);
50
51 struct resource standard_io_resources[] = {
52 {
53 .start = 0x00,
54 .end = 0x1f,
55 .name = "dma1",
56 .flags = IORESOURCE_BUSY
57 }, {
58 .start = 0x40,
59 .end = 0x5f,
60 .name = "timer",
61 .flags = IORESOURCE_BUSY
62 }, {
63 .start = 0x80,
64 .end = 0x8f,
65 .name = "dma page reg",
66 .flags = IORESOURCE_BUSY
67 }, {
68 .start = 0xc0,
69 .end = 0xdf,
70 .name = "dma2",
71 .flags = IORESOURCE_BUSY
72 },
73 };
74
75 #define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)
76
77 extern struct resource pci_io_resource;
78 extern struct resource pci_mem_resource;
79
80 /* Return the total size of DRAM-memory, (RANK0 + RANK1) */
get_system_mem_size(void)81 unsigned long get_system_mem_size(void)
82 {
83 /* Read IP2031_RANK0_ADDR_LO */
84 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
85 /* Read IP2031_RANK1_ADDR_HI */
86 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
87
88 return dram_r1_hi - dram_r0_lo + 1;
89 }
90
91 int pnx8550_console_port = -1;
92
plat_mem_setup(void)93 void __init plat_mem_setup(void)
94 {
95 int i;
96 char* argptr;
97
98 board_setup(); /* board specific setup */
99
100 _machine_restart = pnx8550_machine_restart;
101 _machine_halt = pnx8550_machine_halt;
102 pm_power_off = pnx8550_machine_halt;
103
104 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
105 Bit 1:Enable DAC Powerdown
106 -> 0:DACs are enabled and are working normally
107 1:DACs are powerdown
108 Bit 0:Enable of PCI inta output
109 -> 0 = Disable PCI inta output
110 1 = Enable PCI inta output
111 */
112 PNX8550_GLB2_ENAB_INTA_O = 0;
113
114 /* IO/MEM resources. */
115 set_io_port_base(PNX8550_PORT_BASE);
116 ioport_resource.start = 0;
117 ioport_resource.end = ~0;
118 iomem_resource.start = 0;
119 iomem_resource.end = ~0;
120
121 /* Request I/O space for devices on this board */
122 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
123 request_resource(&ioport_resource, standard_io_resources + i);
124
125 /* Place the Mode Control bit for GPIO pin 16 in primary function */
126 /* Pin 16 is used by UART1, UA1_TX */
127 outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
128 (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
129 PNX8550_GPIO_MC1);
130
131 argptr = prom_getcmdline();
132 if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
133 argptr += strlen("console=ttyS");
134 pnx8550_console_port = *argptr == '0' ? 0 : 1;
135
136 /* We must initialize the UART (console) before early printk */
137 /* Set LCR to 8-bit and BAUD to 38400 (no 5) */
138 ip3106_lcr(UART_BASE, pnx8550_console_port) =
139 PNX8XXX_UART_LCR_8BIT;
140 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
141 }
142 }
143