1 /***************************************************************************/
2 
3 /*
4  *  linux/arch/m68knommu/platform/68328/timers.c
5  *
6  *  Copyright (C) 1993 Hamish Macdonald
7  *  Copyright (C) 1999 D. Jeff Dionne
8  *  Copyright (C) 2001 Georges Menie, Ken Desmet
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file COPYING in the main directory of this archive
12  * for more details.
13  */
14 
15 /***************************************************************************/
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/clocksource.h>
23 #include <linux/rtc.h>
24 #include <asm/setup.h>
25 #include <asm/pgtable.h>
26 #include <asm/machdep.h>
27 #include <asm/MC68VZ328.h>
28 
29 /***************************************************************************/
30 
31 #if defined(CONFIG_DRAGEN2)
32 /* with a 33.16 MHz clock, this will give usec resolution to the time functions */
33 #define CLOCK_SOURCE	TCTL_CLKSOURCE_SYSCLK
34 #define CLOCK_PRE	7
35 #define TICKS_PER_JIFFY	41450
36 
37 #elif defined(CONFIG_XCOPILOT_BUGS)
38 /*
39  * The only thing I know is that CLK32 is not available on Xcopilot
40  * I have little idea about what frequency SYSCLK has on Xcopilot.
41  * The values for prescaler and compare registers were simply
42  * taken from the original source
43  */
44 #define CLOCK_SOURCE	TCTL_CLKSOURCE_SYSCLK
45 #define CLOCK_PRE	2
46 #define TICKS_PER_JIFFY	0xd7e4
47 
48 #else
49 /* default to using the 32Khz clock */
50 #define CLOCK_SOURCE	TCTL_CLKSOURCE_32KHZ
51 #define CLOCK_PRE	31
52 #define TICKS_PER_JIFFY	10
53 #endif
54 
55 static u32 m68328_tick_cnt;
56 
57 /***************************************************************************/
58 
hw_tick(int irq,void * dummy)59 static irqreturn_t hw_tick(int irq, void *dummy)
60 {
61 	/* Reset Timer1 */
62 	TSTAT &= 0;
63 
64 	m68328_tick_cnt += TICKS_PER_JIFFY;
65 	return arch_timer_interrupt(irq, dummy);
66 }
67 
68 /***************************************************************************/
69 
70 static struct irqaction m68328_timer_irq = {
71 	.name	 = "timer",
72 	.flags	 = IRQF_DISABLED | IRQF_TIMER,
73 	.handler = hw_tick,
74 };
75 
76 /***************************************************************************/
77 
m68328_read_clk(struct clocksource * cs)78 static cycle_t m68328_read_clk(struct clocksource *cs)
79 {
80 	unsigned long flags;
81 	u32 cycles;
82 
83 	local_irq_save(flags);
84 	cycles = m68328_tick_cnt + TCN;
85 	local_irq_restore(flags);
86 
87 	return cycles;
88 }
89 
90 /***************************************************************************/
91 
92 static struct clocksource m68328_clk = {
93 	.name	= "timer",
94 	.rating	= 250,
95 	.read	= m68328_read_clk,
96 	.mask	= CLOCKSOURCE_MASK(32),
97 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
98 };
99 
100 /***************************************************************************/
101 
hw_timer_init(void)102 void hw_timer_init(void)
103 {
104 	/* disable timer 1 */
105 	TCTL = 0;
106 
107 	/* set ISR */
108 	setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
109 
110 	/* Restart mode, Enable int, Set clock source */
111 	TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
112 	TPRER = CLOCK_PRE;
113 	TCMP = TICKS_PER_JIFFY;
114 
115 	/* Enable timer 1 */
116 	TCTL |= TCTL_TEN;
117 	clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
118 }
119 
120 /***************************************************************************/
121 
m68328_hwclk(int set,struct rtc_time * t)122 int m68328_hwclk(int set, struct rtc_time *t)
123 {
124 	if (!set) {
125 		long now = RTCTIME;
126 		t->tm_year = t->tm_mon = t->tm_mday = 1;
127 		t->tm_hour = (now >> 24) % 24;
128 		t->tm_min = (now >> 16) % 60;
129 		t->tm_sec = now % 60;
130 	}
131 
132 	return 0;
133 }
134 
135 /***************************************************************************/
136