1 /*
2  *  linux/arch/h8300/kernel/cpu/timer/timer8.c
3  *
4  *  Yoshinori Sato <ysato@users.sourcefoge.jp>
5  *
6  *  8bit Timer Handler
7  *
8  */
9 
10 #include <linux/errno.h>
11 #include <linux/sched.h>
12 #include <linux/kernel.h>
13 #include <linux/param.h>
14 #include <linux/string.h>
15 #include <linux/mm.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/profile.h>
19 
20 #include <asm/io.h>
21 #include <asm/irq.h>
22 #include <asm/timer.h>
23 #if defined(CONFIG_CPU_H8300H)
24 #include <asm/regs306x.h>
25 #endif
26 #if defined(CONFIG_CPU_H8S)
27 #include <asm/regs267x.h>
28 #endif
29 
30 /* 8bit timer x2 */
31 #define CMFA	6
32 
33 #if defined(CONFIG_H8300_TIMER8_CH0)
34 #define _8BASE	_8TCR0
35 #ifdef CONFIG_CPU_H8300H
36 #define _8IRQ	36
37 #endif
38 #ifdef CONFIG_CPU_H8S
39 #define _8IRQ	72
40 #endif
41 #elif defined(CONFIG_H8300_TIMER8_CH2)
42 #ifdef CONFIG_CPU_H8300H
43 #define _8BASE	_8TCR2
44 #define _8IRQ	40
45 #endif
46 #endif
47 
48 #ifndef _8BASE
49 #error Unknown timer channel.
50 #endif
51 
52 #define _8TCR	0
53 #define _8TCSR	2
54 #define TCORA	4
55 #define TCORB	6
56 #define _8TCNT	8
57 
58 #define CMIEA	0x40
59 #define CCLR_CMA 0x08
60 #define CKS2	0x04
61 
62 /*
63  * timer_interrupt() needs to keep up the real-time clock,
64  * as well as call the "xtime_update()" routine every clocktick
65  */
66 
timer_interrupt(int irq,void * dev_id)67 static irqreturn_t timer_interrupt(int irq, void *dev_id)
68 {
69 	h8300_timer_tick();
70 	ctrl_bclr(CMFA, _8BASE + _8TCSR);
71 	return IRQ_HANDLED;
72 }
73 
74 static struct irqaction timer8_irq = {
75 	.name		= "timer-8",
76 	.handler	= timer_interrupt,
77 	.flags		= IRQF_DISABLED | IRQF_TIMER,
78 };
79 
80 static const int __initdata divide_rate[] = {8, 64, 8192};
81 
h8300_timer_setup(void)82 void __init h8300_timer_setup(void)
83 {
84 	unsigned int div;
85 	unsigned int cnt;
86 
87 	calc_param(cnt, div, divide_rate, 0x10000);
88 	div++;
89 
90 	setup_irq(_8IRQ, &timer8_irq);
91 
92 #if defined(CONFIG_CPU_H8S)
93 	/* Timer module enable */
94 	ctrl_bclr(0, MSTPCRL)
95 #endif
96 
97 	/* initialize timer */
98 	ctrl_outw(cnt, _8BASE + TCORA);
99 	ctrl_outw(0x0000, _8BASE + _8TCSR);
100 	ctrl_outw((CMIEA|CCLR_CMA|CKS2) << 8 | div,
101 		  _8BASE + _8TCR);
102 }
103