1 /*!***************************************************************************
2 *!
3 *! FILE NAME : ds1302.c
4 *!
5 *! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O
6 *!
7 *! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
8 *!
9 *! ---------------------------------------------------------------------------
10 *!
11 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
12 *!
13 *!***************************************************************************/
14
15
16 #include <linux/fs.h>
17 #include <linux/init.h>
18 #include <linux/mm.h>
19 #include <linux/module.h>
20 #include <linux/miscdevice.h>
21 #include <linux/delay.h>
22 #include <linux/mutex.h>
23 #include <linux/bcd.h>
24 #include <linux/capability.h>
25
26 #include <asm/uaccess.h>
27 #include <arch/svinto.h>
28 #include <asm/io.h>
29 #include <asm/rtc.h>
30 #include <arch/io_interface_mux.h>
31
32 #include "i2c.h"
33
34 #define RTC_MAJOR_NR 121 /* local major, change later */
35
36 static DEFINE_MUTEX(ds1302_mutex);
37 static const char ds1302_name[] = "ds1302";
38
39 /* The DS1302 might be connected to different bits on different products.
40 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
41 * but SDA can have a selected direction.
42 * For now, only PORT_PB is hardcoded.
43 */
44
45 /* The RST bit may be on either the Generic Port or Port PB. */
46 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
47 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
48 #define TK_RST_DIR(x)
49 #else
50 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
51 #define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
52 #endif
53
54
55 #define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
56 #define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
57
58 #define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1)
59 /* 1 is out, 0 is in */
60 #define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
61 #define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
62
63
64 /*
65 * The reason for tempudelay and not udelay is that loops_per_usec
66 * (used in udelay) is not set when functions here are called from time.c
67 */
68
tempudelay(int usecs)69 static void tempudelay(int usecs)
70 {
71 volatile int loops;
72
73 for(loops = usecs * 12; loops > 0; loops--)
74 /* nothing */;
75 }
76
77
78 /* Send 8 bits. */
79 static void
out_byte(unsigned char x)80 out_byte(unsigned char x)
81 {
82 int i;
83 TK_SDA_DIR(1);
84 for (i = 8; i--;) {
85 /* The chip latches incoming bits on the rising edge of SCL. */
86 TK_SCL_OUT(0);
87 TK_SDA_OUT(x & 1);
88 tempudelay(1);
89 TK_SCL_OUT(1);
90 tempudelay(1);
91 x >>= 1;
92 }
93 TK_SDA_DIR(0);
94 }
95
96 static unsigned char
in_byte(void)97 in_byte(void)
98 {
99 unsigned char x = 0;
100 int i;
101
102 /* Read byte. Bits come LSB first, on the falling edge of SCL.
103 * Assume SDA is in input direction already.
104 */
105 TK_SDA_DIR(0);
106
107 for (i = 8; i--;) {
108 TK_SCL_OUT(0);
109 tempudelay(1);
110 x >>= 1;
111 x |= (TK_SDA_IN() << 7);
112 TK_SCL_OUT(1);
113 tempudelay(1);
114 }
115
116 return x;
117 }
118
119 /* Prepares for a transaction by de-activating RST (active-low). */
120
121 static void
start(void)122 start(void)
123 {
124 TK_SCL_OUT(0);
125 tempudelay(1);
126 TK_RST_OUT(0);
127 tempudelay(5);
128 TK_RST_OUT(1);
129 }
130
131 /* Ends a transaction by taking RST active again. */
132
133 static void
stop(void)134 stop(void)
135 {
136 tempudelay(2);
137 TK_RST_OUT(0);
138 }
139
140 /* Enable writing. */
141
142 static void
ds1302_wenable(void)143 ds1302_wenable(void)
144 {
145 start();
146 out_byte(0x8e); /* Write control register */
147 out_byte(0x00); /* Disable write protect bit 7 = 0 */
148 stop();
149 }
150
151 /* Disable writing. */
152
153 static void
ds1302_wdisable(void)154 ds1302_wdisable(void)
155 {
156 start();
157 out_byte(0x8e); /* Write control register */
158 out_byte(0x80); /* Disable write protect bit 7 = 0 */
159 stop();
160 }
161
162
163
164 /* Read a byte from the selected register in the DS1302. */
165
166 unsigned char
ds1302_readreg(int reg)167 ds1302_readreg(int reg)
168 {
169 unsigned char x;
170
171 start();
172 out_byte(0x81 | (reg << 1)); /* read register */
173 x = in_byte();
174 stop();
175
176 return x;
177 }
178
179 /* Write a byte to the selected register. */
180
181 void
ds1302_writereg(int reg,unsigned char val)182 ds1302_writereg(int reg, unsigned char val)
183 {
184 #ifndef CONFIG_ETRAX_RTC_READONLY
185 int do_writereg = 1;
186 #else
187 int do_writereg = 0;
188
189 if (reg == RTC_TRICKLECHARGER)
190 do_writereg = 1;
191 #endif
192
193 if (do_writereg) {
194 ds1302_wenable();
195 start();
196 out_byte(0x80 | (reg << 1)); /* write register */
197 out_byte(val);
198 stop();
199 ds1302_wdisable();
200 }
201 }
202
203 void
get_rtc_time(struct rtc_time * rtc_tm)204 get_rtc_time(struct rtc_time *rtc_tm)
205 {
206 unsigned long flags;
207
208 local_irq_save(flags);
209
210 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
211 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
212 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
213 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
214 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
215 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
216
217 local_irq_restore(flags);
218
219 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
220 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
221 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
222 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
223 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
224 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
225
226 /*
227 * Account for differences between how the RTC uses the values
228 * and how they are defined in a struct rtc_time;
229 */
230
231 if (rtc_tm->tm_year <= 69)
232 rtc_tm->tm_year += 100;
233
234 rtc_tm->tm_mon--;
235 }
236
237 static unsigned char days_in_mo[] =
238 {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
239
240 /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */
241
rtc_ioctl(struct file * file,unsigned int cmd,unsigned long arg)242 static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
243 {
244 unsigned long flags;
245
246 switch(cmd) {
247 case RTC_RD_TIME: /* read the time/date from RTC */
248 {
249 struct rtc_time rtc_tm;
250
251 memset(&rtc_tm, 0, sizeof (struct rtc_time));
252 get_rtc_time(&rtc_tm);
253 if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time)))
254 return -EFAULT;
255 return 0;
256 }
257
258 case RTC_SET_TIME: /* set the RTC */
259 {
260 struct rtc_time rtc_tm;
261 unsigned char mon, day, hrs, min, sec, leap_yr;
262 unsigned int yrs;
263
264 if (!capable(CAP_SYS_TIME))
265 return -EPERM;
266
267 if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))
268 return -EFAULT;
269
270 yrs = rtc_tm.tm_year + 1900;
271 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
272 day = rtc_tm.tm_mday;
273 hrs = rtc_tm.tm_hour;
274 min = rtc_tm.tm_min;
275 sec = rtc_tm.tm_sec;
276
277
278 if ((yrs < 1970) || (yrs > 2069))
279 return -EINVAL;
280
281 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
282
283 if ((mon > 12) || (day == 0))
284 return -EINVAL;
285
286 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
287 return -EINVAL;
288
289 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
290 return -EINVAL;
291
292 if (yrs >= 2000)
293 yrs -= 2000; /* RTC (0, 1, ... 69) */
294 else
295 yrs -= 1900; /* RTC (70, 71, ... 99) */
296
297 sec = bin2bcd(sec);
298 min = bin2bcd(min);
299 hrs = bin2bcd(hrs);
300 day = bin2bcd(day);
301 mon = bin2bcd(mon);
302 yrs = bin2bcd(yrs);
303
304 local_irq_save(flags);
305 CMOS_WRITE(yrs, RTC_YEAR);
306 CMOS_WRITE(mon, RTC_MONTH);
307 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
308 CMOS_WRITE(hrs, RTC_HOURS);
309 CMOS_WRITE(min, RTC_MINUTES);
310 CMOS_WRITE(sec, RTC_SECONDS);
311 local_irq_restore(flags);
312
313 /* Notice that at this point, the RTC is updated but
314 * the kernel is still running with the old time.
315 * You need to set that separately with settimeofday
316 * or adjtimex.
317 */
318 return 0;
319 }
320
321 case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */
322 {
323 int tcs_val;
324
325 if (!capable(CAP_SYS_TIME))
326 return -EPERM;
327
328 if(copy_from_user(&tcs_val, (int*)arg, sizeof(int)))
329 return -EFAULT;
330
331 tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F);
332 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
333 return 0;
334 }
335 case RTC_VL_READ:
336 {
337 /* TODO:
338 * Implement voltage low detection support
339 */
340 printk(KERN_WARNING "DS1302: RTC Voltage Low detection"
341 " is not supported\n");
342 return 0;
343 }
344 case RTC_VL_CLR:
345 {
346 /* TODO:
347 * Nothing to do since Voltage Low detection is not supported
348 */
349 return 0;
350 }
351 default:
352 return -ENOIOCTLCMD;
353 }
354 }
355
rtc_unlocked_ioctl(struct file * file,unsigned int cmd,unsigned long arg)356 static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
357 {
358 int ret;
359
360 mutex_lock(&ds1302_mutex);
361 ret = rtc_ioctl(file, cmd, arg);
362 mutex_unlock(&ds1302_mutex);
363
364 return ret;
365 }
366
367 static void
print_rtc_status(void)368 print_rtc_status(void)
369 {
370 struct rtc_time tm;
371
372 get_rtc_time(&tm);
373
374 /*
375 * There is no way to tell if the luser has the RTC set for local
376 * time or for Universal Standard Time (GMT). Probably local though.
377 */
378
379 printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",
380 tm.tm_hour, tm.tm_min, tm.tm_sec);
381 printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",
382 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);
383 }
384
385 /* The various file operations we support. */
386
387 static const struct file_operations rtc_fops = {
388 .owner = THIS_MODULE,
389 .unlocked_ioctl = rtc_unlocked_ioctl,
390 .llseek = noop_llseek,
391 };
392
393 /* Probe for the chip by writing something to its RAM and try reading it back. */
394
395 #define MAGIC_PATTERN 0x42
396
397 static int __init
ds1302_probe(void)398 ds1302_probe(void)
399 {
400 int retval, res;
401
402 TK_RST_DIR(1);
403 TK_SCL_DIR(1);
404 TK_SDA_DIR(0);
405
406 /* Try to talk to timekeeper. */
407
408 ds1302_wenable();
409 start();
410 out_byte(0xc0); /* write RAM byte 0 */
411 out_byte(MAGIC_PATTERN); /* write something magic */
412 start();
413 out_byte(0xc1); /* read RAM byte 0 */
414
415 if((res = in_byte()) == MAGIC_PATTERN) {
416 stop();
417 ds1302_wdisable();
418 printk(KERN_INFO "%s: RTC found.\n", ds1302_name);
419 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",
420 ds1302_name,
421 CONFIG_ETRAX_DS1302_SDABIT,
422 CONFIG_ETRAX_DS1302_SCLBIT,
423 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
424 "GENIO",
425 #else
426 "PB",
427 #endif
428 CONFIG_ETRAX_DS1302_RSTBIT);
429 print_rtc_status();
430 retval = 1;
431 } else {
432 stop();
433 retval = 0;
434 }
435
436 return retval;
437 }
438
439
440 /* Just probe for the RTC and register the device to handle the ioctl needed. */
441
442 int __init
ds1302_init(void)443 ds1302_init(void)
444 {
445 #ifdef CONFIG_ETRAX_I2C
446 i2c_init();
447 #endif
448
449 if (!ds1302_probe()) {
450 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
451 #if CONFIG_ETRAX_DS1302_RSTBIT == 27
452 /*
453 * The only way to set g27 to output is to enable ATA.
454 *
455 * Make sure that R_GEN_CONFIG is setup correct.
456 */
457 /* Allocating the ATA interface will grab almost all
458 * pins in I/O groups a, b, c and d. A consequence of
459 * allocating the ATA interface is that the fixed
460 * interfaces shared RAM, parallel port 0, parallel
461 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port
462 * 1, SCSI-W, serial port 2, serial port 3,
463 * synchronous serial port 3 and USB port 2 and almost
464 * all GPIO pins on port g cannot be used.
465 */
466 if (cris_request_io_interface(if_ata, "ds1302/ATA")) {
467 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
468 return -1;
469 }
470
471 #elif CONFIG_ETRAX_DS1302_RSTBIT == 0
472 if (cris_io_interface_allocate_pins(if_gpio_grp_a,
473 'g',
474 CONFIG_ETRAX_DS1302_RSTBIT,
475 CONFIG_ETRAX_DS1302_RSTBIT)) {
476 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
477 return -1;
478 }
479
480 /* Set the direction of this bit to out. */
481 genconfig_shadow = ((genconfig_shadow &
482 ~IO_MASK(R_GEN_CONFIG, g0dir)) |
483 (IO_STATE(R_GEN_CONFIG, g0dir, out)));
484 *R_GEN_CONFIG = genconfig_shadow;
485 #endif
486 if (!ds1302_probe()) {
487 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
488 return -1;
489 }
490 #else
491 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
492 return -1;
493 #endif
494 }
495 /* Initialise trickle charger */
496 ds1302_writereg(RTC_TRICKLECHARGER,
497 RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F));
498 /* Start clock by resetting CLOCK_HALT */
499 ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F));
500 return 0;
501 }
502
ds1302_register(void)503 static int __init ds1302_register(void)
504 {
505 ds1302_init();
506 if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) {
507 printk(KERN_INFO "%s: unable to get major %d for rtc\n",
508 ds1302_name, RTC_MAJOR_NR);
509 return -1;
510 }
511 return 0;
512
513 }
514
515 module_init(ds1302_register);
516