1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <asm/dma.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
24 #include <asm/portmux.h>
25 #include <asm/dpmc.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/spi/ad7877.h>
28 #include <net/dsa.h>
29
30 /*
31 * Name the Board for the /proc/cpuinfo
32 */
33 const char bfin_board_name[] = "ADI BF518F-EZBRD";
34
35 /*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40 static struct mtd_partition ezbrd_partitions[] = {
41 {
42 .name = "bootloader(nor)",
43 .size = 0x40000,
44 .offset = 0,
45 }, {
46 .name = "linux kernel(nor)",
47 .size = 0x1C0000,
48 .offset = MTDPART_OFS_APPEND,
49 }, {
50 .name = "file system(nor)",
51 .size = MTDPART_SIZ_FULL,
52 .offset = MTDPART_OFS_APPEND,
53 }
54 };
55
56 static struct physmap_flash_data ezbrd_flash_data = {
57 .width = 2,
58 .parts = ezbrd_partitions,
59 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
60 };
61
62 static struct resource ezbrd_flash_resource = {
63 .start = 0x20000000,
64 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
65 .end = 0x202fffff,
66 #else
67 .end = 0x203fffff,
68 #endif
69 .flags = IORESOURCE_MEM,
70 };
71
72 static struct platform_device ezbrd_flash_device = {
73 .name = "physmap-flash",
74 .id = 0,
75 .dev = {
76 .platform_data = &ezbrd_flash_data,
77 },
78 .num_resources = 1,
79 .resource = &ezbrd_flash_resource,
80 };
81 #endif
82
83 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
84 static struct platform_device rtc_device = {
85 .name = "rtc-bfin",
86 .id = -1,
87 };
88 #endif
89
90 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
91 #include <linux/bfin_mac.h>
92 static const unsigned short bfin_mac_peripherals[] = {
93 P_MII0_ETxD0,
94 P_MII0_ETxD1,
95 P_MII0_ETxEN,
96 P_MII0_ERxD0,
97 P_MII0_ERxD1,
98 P_MII0_TxCLK,
99 P_MII0_PHYINT,
100 P_MII0_CRS,
101 P_MII0_MDC,
102 P_MII0_MDIO,
103 0
104 };
105
106 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
107 {
108 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
109 .addr = 3,
110 #else
111 .addr = 1,
112 #endif
113 .irq = IRQ_MAC_PHYINT,
114 },
115 };
116
117 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
118 .phydev_number = 1,
119 .phydev_data = bfin_phydev_data,
120 .phy_mode = PHY_INTERFACE_MODE_MII,
121 .mac_peripherals = bfin_mac_peripherals,
122 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
123 .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
124 #endif
125 .vlan1_mask = 1,
126 .vlan2_mask = 2,
127 };
128
129 static struct platform_device bfin_mii_bus = {
130 .name = "bfin_mii_bus",
131 .dev = {
132 .platform_data = &bfin_mii_bus_data,
133 }
134 };
135
136 static struct platform_device bfin_mac_device = {
137 .name = "bfin_mac",
138 .dev = {
139 .platform_data = &bfin_mii_bus,
140 }
141 };
142
143 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
144 static struct dsa_chip_data ksz8893m_switch_chip_data = {
145 .mii_bus = &bfin_mii_bus.dev,
146 .port_names = {
147 NULL,
148 "eth%d",
149 "eth%d",
150 "cpu",
151 },
152 };
153 static struct dsa_platform_data ksz8893m_switch_data = {
154 .nr_chips = 1,
155 .netdev = &bfin_mac_device.dev,
156 .chip = &ksz8893m_switch_chip_data,
157 };
158
159 static struct platform_device ksz8893m_switch_device = {
160 .name = "dsa",
161 .id = 0,
162 .num_resources = 0,
163 .dev.platform_data = &ksz8893m_switch_data,
164 };
165 #endif
166 #endif
167
168 #if defined(CONFIG_MTD_M25P80) \
169 || defined(CONFIG_MTD_M25P80_MODULE)
170 static struct mtd_partition bfin_spi_flash_partitions[] = {
171 {
172 .name = "bootloader(spi)",
173 .size = 0x00040000,
174 .offset = 0,
175 .mask_flags = MTD_CAP_ROM
176 }, {
177 .name = "linux kernel(spi)",
178 .size = MTDPART_SIZ_FULL,
179 .offset = MTDPART_OFS_APPEND,
180 }
181 };
182
183 static struct flash_platform_data bfin_spi_flash_data = {
184 .name = "m25p80",
185 .parts = bfin_spi_flash_partitions,
186 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
187 .type = "m25p16",
188 };
189
190 /* SPI flash chip (m25p64) */
191 static struct bfin5xx_spi_chip spi_flash_chip_info = {
192 .enable_dma = 0, /* use dma transfer with this chip*/
193 };
194 #endif
195
196 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
197 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
198 .enable_dma = 0,
199 };
200 #endif
201
202 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
203 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
204 .model = 7877,
205 .vref_delay_usecs = 50, /* internal, no capacitor */
206 .x_plate_ohms = 419,
207 .y_plate_ohms = 486,
208 .pressure_max = 1000,
209 .pressure_min = 0,
210 .stopacq_polarity = 1,
211 .first_conversion_delay = 3,
212 .acquisition_time = 1,
213 .averaging = 1,
214 .pen_down_acc_interval = 1,
215 };
216 #endif
217
218 static struct spi_board_info bfin_spi_board_info[] __initdata = {
219 #if defined(CONFIG_MTD_M25P80) \
220 || defined(CONFIG_MTD_M25P80_MODULE)
221 {
222 /* the modalias must be the same as spi device driver name */
223 .modalias = "m25p80", /* Name of spi_driver for this device */
224 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
225 .bus_num = 0, /* Framework bus number */
226 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
227 .platform_data = &bfin_spi_flash_data,
228 .controller_data = &spi_flash_chip_info,
229 .mode = SPI_MODE_3,
230 },
231 #endif
232
233 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
234 #if defined(CONFIG_NET_DSA_KSZ8893M) \
235 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
236 {
237 .modalias = "ksz8893m",
238 .max_speed_hz = 5000000,
239 .bus_num = 0,
240 .chip_select = 1,
241 .platform_data = NULL,
242 .mode = SPI_MODE_3,
243 },
244 #endif
245 #endif
246
247 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
248 {
249 .modalias = "mmc_spi",
250 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
251 .bus_num = 0,
252 .chip_select = 5,
253 .controller_data = &mmc_spi_chip_info,
254 .mode = SPI_MODE_3,
255 },
256 #endif
257 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
258 {
259 .modalias = "ad7877",
260 .platform_data = &bfin_ad7877_ts_info,
261 .irq = IRQ_PF8,
262 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
263 .bus_num = 0,
264 .chip_select = 2,
265 },
266 #endif
267 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
268 && defined(CONFIG_SND_SOC_WM8731_SPI)
269 {
270 .modalias = "wm8731",
271 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
272 .bus_num = 0,
273 .chip_select = 5,
274 .mode = SPI_MODE_0,
275 },
276 #endif
277 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
278 {
279 .modalias = "spidev",
280 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
281 .bus_num = 0,
282 .chip_select = 1,
283 },
284 #endif
285 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
286 {
287 .modalias = "bfin-lq035q1-spi",
288 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
289 .bus_num = 0,
290 .chip_select = 1,
291 .mode = SPI_CPHA | SPI_CPOL,
292 },
293 #endif
294 };
295
296 /* SPI controller data */
297 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
298 /* SPI (0) */
299 static struct bfin5xx_spi_master bfin_spi0_info = {
300 .num_chipselect = 6,
301 .enable_dma = 1, /* master has the ability to do dma transfer */
302 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
303 };
304
305 static struct resource bfin_spi0_resource[] = {
306 [0] = {
307 .start = SPI0_REGBASE,
308 .end = SPI0_REGBASE + 0xFF,
309 .flags = IORESOURCE_MEM,
310 },
311 [1] = {
312 .start = CH_SPI0,
313 .end = CH_SPI0,
314 .flags = IORESOURCE_DMA,
315 },
316 [2] = {
317 .start = IRQ_SPI0,
318 .end = IRQ_SPI0,
319 .flags = IORESOURCE_IRQ,
320 },
321 };
322
323 static struct platform_device bfin_spi0_device = {
324 .name = "bfin-spi",
325 .id = 0, /* Bus number */
326 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
327 .resource = bfin_spi0_resource,
328 .dev = {
329 .platform_data = &bfin_spi0_info, /* Passed to driver */
330 },
331 };
332
333 /* SPI (1) */
334 static struct bfin5xx_spi_master bfin_spi1_info = {
335 .num_chipselect = 6,
336 .enable_dma = 1, /* master has the ability to do dma transfer */
337 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
338 };
339
340 static struct resource bfin_spi1_resource[] = {
341 [0] = {
342 .start = SPI1_REGBASE,
343 .end = SPI1_REGBASE + 0xFF,
344 .flags = IORESOURCE_MEM,
345 },
346 [1] = {
347 .start = CH_SPI1,
348 .end = CH_SPI1,
349 .flags = IORESOURCE_DMA,
350 },
351 [2] = {
352 .start = IRQ_SPI1,
353 .end = IRQ_SPI1,
354 .flags = IORESOURCE_IRQ,
355 },
356 };
357
358 static struct platform_device bfin_spi1_device = {
359 .name = "bfin-spi",
360 .id = 1, /* Bus number */
361 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
362 .resource = bfin_spi1_resource,
363 .dev = {
364 .platform_data = &bfin_spi1_info, /* Passed to driver */
365 },
366 };
367 #endif /* spi master and devices */
368
369 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
370 #ifdef CONFIG_SERIAL_BFIN_UART0
371 static struct resource bfin_uart0_resources[] = {
372 {
373 .start = UART0_THR,
374 .end = UART0_GCTL+2,
375 .flags = IORESOURCE_MEM,
376 },
377 {
378 .start = IRQ_UART0_TX,
379 .end = IRQ_UART0_TX,
380 .flags = IORESOURCE_IRQ,
381 },
382 {
383 .start = IRQ_UART0_RX,
384 .end = IRQ_UART0_RX,
385 .flags = IORESOURCE_IRQ,
386 },
387 {
388 .start = IRQ_UART0_ERROR,
389 .end = IRQ_UART0_ERROR,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = CH_UART0_TX,
394 .end = CH_UART0_TX,
395 .flags = IORESOURCE_DMA,
396 },
397 {
398 .start = CH_UART0_RX,
399 .end = CH_UART0_RX,
400 .flags = IORESOURCE_DMA,
401 },
402 };
403
404 static unsigned short bfin_uart0_peripherals[] = {
405 P_UART0_TX, P_UART0_RX, 0
406 };
407
408 static struct platform_device bfin_uart0_device = {
409 .name = "bfin-uart",
410 .id = 0,
411 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
412 .resource = bfin_uart0_resources,
413 .dev = {
414 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
415 },
416 };
417 #endif
418 #ifdef CONFIG_SERIAL_BFIN_UART1
419 static struct resource bfin_uart1_resources[] = {
420 {
421 .start = UART1_THR,
422 .end = UART1_GCTL+2,
423 .flags = IORESOURCE_MEM,
424 },
425 {
426 .start = IRQ_UART1_TX,
427 .end = IRQ_UART1_TX,
428 .flags = IORESOURCE_IRQ,
429 },
430 {
431 .start = IRQ_UART1_RX,
432 .end = IRQ_UART1_RX,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .start = IRQ_UART1_ERROR,
437 .end = IRQ_UART1_ERROR,
438 .flags = IORESOURCE_IRQ,
439 },
440 {
441 .start = CH_UART1_TX,
442 .end = CH_UART1_TX,
443 .flags = IORESOURCE_DMA,
444 },
445 {
446 .start = CH_UART1_RX,
447 .end = CH_UART1_RX,
448 .flags = IORESOURCE_DMA,
449 },
450 };
451
452 static unsigned short bfin_uart1_peripherals[] = {
453 P_UART1_TX, P_UART1_RX, 0
454 };
455
456 static struct platform_device bfin_uart1_device = {
457 .name = "bfin-uart",
458 .id = 1,
459 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
460 .resource = bfin_uart1_resources,
461 .dev = {
462 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
463 },
464 };
465 #endif
466 #endif
467
468 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
469 #ifdef CONFIG_BFIN_SIR0
470 static struct resource bfin_sir0_resources[] = {
471 {
472 .start = 0xFFC00400,
473 .end = 0xFFC004FF,
474 .flags = IORESOURCE_MEM,
475 },
476 {
477 .start = IRQ_UART0_RX,
478 .end = IRQ_UART0_RX+1,
479 .flags = IORESOURCE_IRQ,
480 },
481 {
482 .start = CH_UART0_RX,
483 .end = CH_UART0_RX+1,
484 .flags = IORESOURCE_DMA,
485 },
486 };
487
488 static struct platform_device bfin_sir0_device = {
489 .name = "bfin_sir",
490 .id = 0,
491 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
492 .resource = bfin_sir0_resources,
493 };
494 #endif
495 #ifdef CONFIG_BFIN_SIR1
496 static struct resource bfin_sir1_resources[] = {
497 {
498 .start = 0xFFC02000,
499 .end = 0xFFC020FF,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = IRQ_UART1_RX,
504 .end = IRQ_UART1_RX+1,
505 .flags = IORESOURCE_IRQ,
506 },
507 {
508 .start = CH_UART1_RX,
509 .end = CH_UART1_RX+1,
510 .flags = IORESOURCE_DMA,
511 },
512 };
513
514 static struct platform_device bfin_sir1_device = {
515 .name = "bfin_sir",
516 .id = 1,
517 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
518 .resource = bfin_sir1_resources,
519 };
520 #endif
521 #endif
522
523 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
524 static struct platform_device bfin_i2s = {
525 .name = "bfin-i2s",
526 .id = CONFIG_SND_BF5XX_SPORT_NUM,
527 /* TODO: add platform data here */
528 };
529 #endif
530
531 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532 static struct resource bfin_twi0_resource[] = {
533 [0] = {
534 .start = TWI0_REGBASE,
535 .end = TWI0_REGBASE,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .start = IRQ_TWI,
540 .end = IRQ_TWI,
541 .flags = IORESOURCE_IRQ,
542 },
543 };
544
545 static struct platform_device i2c_bfin_twi_device = {
546 .name = "i2c-bfin-twi",
547 .id = 0,
548 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
549 .resource = bfin_twi0_resource,
550 };
551 #endif
552
553 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
554 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
555 {
556 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
557 },
558 #endif
559 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
560 {
561 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
562 .irq = IRQ_PF8,
563 },
564 #endif
565 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
566 {
567 I2C_BOARD_INFO("ssm2602", 0x1b),
568 },
569 #endif
570 };
571
572 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
573 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
574 static struct resource bfin_sport0_uart_resources[] = {
575 {
576 .start = SPORT0_TCR1,
577 .end = SPORT0_MRCS3+4,
578 .flags = IORESOURCE_MEM,
579 },
580 {
581 .start = IRQ_SPORT0_RX,
582 .end = IRQ_SPORT0_RX+1,
583 .flags = IORESOURCE_IRQ,
584 },
585 {
586 .start = IRQ_SPORT0_ERROR,
587 .end = IRQ_SPORT0_ERROR,
588 .flags = IORESOURCE_IRQ,
589 },
590 };
591
592 static unsigned short bfin_sport0_peripherals[] = {
593 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
594 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
595 };
596
597 static struct platform_device bfin_sport0_uart_device = {
598 .name = "bfin-sport-uart",
599 .id = 0,
600 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
601 .resource = bfin_sport0_uart_resources,
602 .dev = {
603 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
604 },
605 };
606 #endif
607 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
608 static struct resource bfin_sport1_uart_resources[] = {
609 {
610 .start = SPORT1_TCR1,
611 .end = SPORT1_MRCS3+4,
612 .flags = IORESOURCE_MEM,
613 },
614 {
615 .start = IRQ_SPORT1_RX,
616 .end = IRQ_SPORT1_RX+1,
617 .flags = IORESOURCE_IRQ,
618 },
619 {
620 .start = IRQ_SPORT1_ERROR,
621 .end = IRQ_SPORT1_ERROR,
622 .flags = IORESOURCE_IRQ,
623 },
624 };
625
626 static unsigned short bfin_sport1_peripherals[] = {
627 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
628 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
629 };
630
631 static struct platform_device bfin_sport1_uart_device = {
632 .name = "bfin-sport-uart",
633 .id = 1,
634 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
635 .resource = bfin_sport1_uart_resources,
636 .dev = {
637 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
638 },
639 };
640 #endif
641 #endif
642
643 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
644 #include <linux/input.h>
645 #include <linux/gpio_keys.h>
646
647 static struct gpio_keys_button bfin_gpio_keys_table[] = {
648 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
649 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
650 };
651
652 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
653 .buttons = bfin_gpio_keys_table,
654 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
655 };
656
657 static struct platform_device bfin_device_gpiokeys = {
658 .name = "gpio-keys",
659 .dev = {
660 .platform_data = &bfin_gpio_keys_data,
661 },
662 };
663 #endif
664
665 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
666
667 static struct bfin_sd_host bfin_sdh_data = {
668 .dma_chan = CH_RSI,
669 .irq_int0 = IRQ_RSI_INT0,
670 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
671 };
672
673 static struct platform_device bf51x_sdh_device = {
674 .name = "bfin-sdh",
675 .id = 0,
676 .dev = {
677 .platform_data = &bfin_sdh_data,
678 },
679 };
680 #endif
681
682 static const unsigned int cclk_vlev_datasheet[] =
683 {
684 VRPAIR(VLEV_100, 400000000),
685 VRPAIR(VLEV_105, 426000000),
686 VRPAIR(VLEV_110, 500000000),
687 VRPAIR(VLEV_115, 533000000),
688 VRPAIR(VLEV_120, 600000000),
689 };
690
691 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
692 .tuple_tab = cclk_vlev_datasheet,
693 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
694 .vr_settling_time = 25 /* us */,
695 };
696
697 static struct platform_device bfin_dpmc = {
698 .name = "bfin dpmc",
699 .dev = {
700 .platform_data = &bfin_dmpc_vreg_data,
701 },
702 };
703
704 static struct platform_device *stamp_devices[] __initdata = {
705
706 &bfin_dpmc,
707
708 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
709 &rtc_device,
710 #endif
711
712 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
713 &bfin_mii_bus,
714 &bfin_mac_device,
715 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
716 &ksz8893m_switch_device,
717 #endif
718 #endif
719
720 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
721 &bfin_spi0_device,
722 &bfin_spi1_device,
723 #endif
724
725 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
726 #ifdef CONFIG_SERIAL_BFIN_UART0
727 &bfin_uart0_device,
728 #endif
729 #ifdef CONFIG_SERIAL_BFIN_UART1
730 &bfin_uart1_device,
731 #endif
732 #endif
733
734 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
735 #ifdef CONFIG_BFIN_SIR0
736 &bfin_sir0_device,
737 #endif
738 #ifdef CONFIG_BFIN_SIR1
739 &bfin_sir1_device,
740 #endif
741 #endif
742
743 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
744 &i2c_bfin_twi_device,
745 #endif
746
747 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
748 &bfin_i2s,
749 #endif
750
751 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
752 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
753 &bfin_sport0_uart_device,
754 #endif
755 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
756 &bfin_sport1_uart_device,
757 #endif
758 #endif
759
760 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
761 &bfin_device_gpiokeys,
762 #endif
763
764 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
765 &bf51x_sdh_device,
766 #endif
767
768 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
769 &ezbrd_flash_device,
770 #endif
771 };
772
ezbrd_init(void)773 static int __init ezbrd_init(void)
774 {
775 printk(KERN_INFO "%s(): registering device resources\n", __func__);
776 i2c_register_board_info(0, bfin_i2c_board_info,
777 ARRAY_SIZE(bfin_i2c_board_info));
778 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
779 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
780 /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
781 peripheral_request(P_AMS2, "ParaFlash");
782 #if !defined(CONFIG_SPI_BFIN5XX) && !defined(CONFIG_SPI_BFIN5XX_MODULE)
783 peripheral_request(P_AMS3, "ParaFlash");
784 #endif
785 return 0;
786 }
787
788 arch_initcall(ezbrd_init);
789
790 static struct platform_device *ezbrd_early_devices[] __initdata = {
791 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
792 #ifdef CONFIG_SERIAL_BFIN_UART0
793 &bfin_uart0_device,
794 #endif
795 #ifdef CONFIG_SERIAL_BFIN_UART1
796 &bfin_uart1_device,
797 #endif
798 #endif
799
800 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
801 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
802 &bfin_sport0_uart_device,
803 #endif
804 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
805 &bfin_sport1_uart_device,
806 #endif
807 #endif
808 };
809
native_machine_early_platform_add_devices(void)810 void __init native_machine_early_platform_add_devices(void)
811 {
812 printk(KERN_INFO "register early platform devices\n");
813 early_platform_add_devices(ezbrd_early_devices,
814 ARRAY_SIZE(ezbrd_early_devices));
815 }
816
native_machine_restart(char * cmd)817 void native_machine_restart(char *cmd)
818 {
819 /* workaround reboot hang when booting from SPI */
820 if ((bfin_read_SYSCR() & 0x7) == 0x3)
821 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
822 }
823
bfin_get_ether_addr(char * addr)824 int bfin_get_ether_addr(char *addr)
825 {
826 /* the MAC is stored in OTP memory page 0xDF */
827 u32 ret;
828 u64 otp_mac;
829 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
830
831 ret = otp_read(0xDF, 0x00, &otp_mac);
832 if (!(ret & 0x1)) {
833 char *otp_mac_p = (char *)&otp_mac;
834 for (ret = 0; ret < 6; ++ret)
835 addr[ret] = otp_mac_p[5 - ret];
836 }
837 return 0;
838 }
839 EXPORT_SYMBOL(bfin_get_ether_addr);
840