1 /*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7 #include <linux/io.h>
8 #include <linux/of.h>
9
10 #include <asm/cacheflush.h>
11 #include <asm/hardware/cache-l2x0.h>
12 #include <mach/hardware.h>
13 #include <mach/id.h>
14
15 static void __iomem *l2x0_base;
16
ux500_l2x0_unlock(void)17 static int __init ux500_l2x0_unlock(void)
18 {
19 int i;
20
21 /*
22 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
23 * apparently locks both caches before jumping to the kernel. The
24 * l2x0 core will not touch the unlock registers if the l2x0 is
25 * already enabled, so we do it right here instead. The PL310 has
26 * 8 sets of registers, one per possible CPU.
27 */
28 for (i = 0; i < 8; i++) {
29 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
30 i * L2X0_LOCKDOWN_STRIDE);
31 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
32 i * L2X0_LOCKDOWN_STRIDE);
33 }
34 return 0;
35 }
36
ux500_l2x0_init(void)37 static int __init ux500_l2x0_init(void)
38 {
39 if (cpu_is_u5500())
40 l2x0_base = __io_address(U5500_L2CC_BASE);
41 else if (cpu_is_u8500())
42 l2x0_base = __io_address(U8500_L2CC_BASE);
43 else
44 ux500_unknown_soc();
45
46 /* Unlock before init */
47 ux500_l2x0_unlock();
48
49 /* 64KB way size, 8 way associativity, force WA */
50 if (of_have_populated_dt())
51 l2x0_of_init(0x3e060000, 0xc0000fff);
52 else
53 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
54
55 /*
56 * We can't disable l2 as we are in non secure mode, currently
57 * this seems be called only during kexec path. So let's
58 * override outer.disable with nasty assignment until we have
59 * some SMI service available.
60 */
61 outer_cache.disable = NULL;
62
63 return 0;
64 }
65
66 early_initcall(ux500_l2x0_init);
67