1 /*
2  * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Copyright (C) 2010,2011 Nvidia, Inc.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17 
18 #ifndef __MACH_TEGRA_PINMUX_TEGRA30_H
19 #define __MACH_TEGRA_PINMUX_TEGRA30_H
20 
21 enum tegra_pingroup {
22 	TEGRA_PINGROUP_ULPI_DATA0 = 0,
23 	TEGRA_PINGROUP_ULPI_DATA1,
24 	TEGRA_PINGROUP_ULPI_DATA2,
25 	TEGRA_PINGROUP_ULPI_DATA3,
26 	TEGRA_PINGROUP_ULPI_DATA4,
27 	TEGRA_PINGROUP_ULPI_DATA5,
28 	TEGRA_PINGROUP_ULPI_DATA6,
29 	TEGRA_PINGROUP_ULPI_DATA7,
30 	TEGRA_PINGROUP_ULPI_CLK,
31 	TEGRA_PINGROUP_ULPI_DIR,
32 	TEGRA_PINGROUP_ULPI_NXT,
33 	TEGRA_PINGROUP_ULPI_STP,
34 	TEGRA_PINGROUP_DAP3_FS,
35 	TEGRA_PINGROUP_DAP3_DIN,
36 	TEGRA_PINGROUP_DAP3_DOUT,
37 	TEGRA_PINGROUP_DAP3_SCLK,
38 	TEGRA_PINGROUP_GPIO_PV0,
39 	TEGRA_PINGROUP_GPIO_PV1,
40 	TEGRA_PINGROUP_SDMMC1_CLK,
41 	TEGRA_PINGROUP_SDMMC1_CMD,
42 	TEGRA_PINGROUP_SDMMC1_DAT3,
43 	TEGRA_PINGROUP_SDMMC1_DAT2,
44 	TEGRA_PINGROUP_SDMMC1_DAT1,
45 	TEGRA_PINGROUP_SDMMC1_DAT0,
46 	TEGRA_PINGROUP_GPIO_PV2,
47 	TEGRA_PINGROUP_GPIO_PV3,
48 	TEGRA_PINGROUP_CLK2_OUT,
49 	TEGRA_PINGROUP_CLK2_REQ,
50 	TEGRA_PINGROUP_LCD_PWR1,
51 	TEGRA_PINGROUP_LCD_PWR2,
52 	TEGRA_PINGROUP_LCD_SDIN,
53 	TEGRA_PINGROUP_LCD_SDOUT,
54 	TEGRA_PINGROUP_LCD_WR_N,
55 	TEGRA_PINGROUP_LCD_CS0_N,
56 	TEGRA_PINGROUP_LCD_DC0,
57 	TEGRA_PINGROUP_LCD_SCK,
58 	TEGRA_PINGROUP_LCD_PWR0,
59 	TEGRA_PINGROUP_LCD_PCLK,
60 	TEGRA_PINGROUP_LCD_DE,
61 	TEGRA_PINGROUP_LCD_HSYNC,
62 	TEGRA_PINGROUP_LCD_VSYNC,
63 	TEGRA_PINGROUP_LCD_D0,
64 	TEGRA_PINGROUP_LCD_D1,
65 	TEGRA_PINGROUP_LCD_D2,
66 	TEGRA_PINGROUP_LCD_D3,
67 	TEGRA_PINGROUP_LCD_D4,
68 	TEGRA_PINGROUP_LCD_D5,
69 	TEGRA_PINGROUP_LCD_D6,
70 	TEGRA_PINGROUP_LCD_D7,
71 	TEGRA_PINGROUP_LCD_D8,
72 	TEGRA_PINGROUP_LCD_D9,
73 	TEGRA_PINGROUP_LCD_D10,
74 	TEGRA_PINGROUP_LCD_D11,
75 	TEGRA_PINGROUP_LCD_D12,
76 	TEGRA_PINGROUP_LCD_D13,
77 	TEGRA_PINGROUP_LCD_D14,
78 	TEGRA_PINGROUP_LCD_D15,
79 	TEGRA_PINGROUP_LCD_D16,
80 	TEGRA_PINGROUP_LCD_D17,
81 	TEGRA_PINGROUP_LCD_D18,
82 	TEGRA_PINGROUP_LCD_D19,
83 	TEGRA_PINGROUP_LCD_D20,
84 	TEGRA_PINGROUP_LCD_D21,
85 	TEGRA_PINGROUP_LCD_D22,
86 	TEGRA_PINGROUP_LCD_D23,
87 	TEGRA_PINGROUP_LCD_CS1_N,
88 	TEGRA_PINGROUP_LCD_M1,
89 	TEGRA_PINGROUP_LCD_DC1,
90 	TEGRA_PINGROUP_HDMI_INT,
91 	TEGRA_PINGROUP_DDC_SCL,
92 	TEGRA_PINGROUP_DDC_SDA,
93 	TEGRA_PINGROUP_CRT_HSYNC,
94 	TEGRA_PINGROUP_CRT_VSYNC,
95 	TEGRA_PINGROUP_VI_D0,
96 	TEGRA_PINGROUP_VI_D1,
97 	TEGRA_PINGROUP_VI_D2,
98 	TEGRA_PINGROUP_VI_D3,
99 	TEGRA_PINGROUP_VI_D4,
100 	TEGRA_PINGROUP_VI_D5,
101 	TEGRA_PINGROUP_VI_D6,
102 	TEGRA_PINGROUP_VI_D7,
103 	TEGRA_PINGROUP_VI_D8,
104 	TEGRA_PINGROUP_VI_D9,
105 	TEGRA_PINGROUP_VI_D10,
106 	TEGRA_PINGROUP_VI_D11,
107 	TEGRA_PINGROUP_VI_PCLK,
108 	TEGRA_PINGROUP_VI_MCLK,
109 	TEGRA_PINGROUP_VI_VSYNC,
110 	TEGRA_PINGROUP_VI_HSYNC,
111 	TEGRA_PINGROUP_UART2_RXD,
112 	TEGRA_PINGROUP_UART2_TXD,
113 	TEGRA_PINGROUP_UART2_RTS_N,
114 	TEGRA_PINGROUP_UART2_CTS_N,
115 	TEGRA_PINGROUP_UART3_TXD,
116 	TEGRA_PINGROUP_UART3_RXD,
117 	TEGRA_PINGROUP_UART3_CTS_N,
118 	TEGRA_PINGROUP_UART3_RTS_N,
119 	TEGRA_PINGROUP_GPIO_PU0,
120 	TEGRA_PINGROUP_GPIO_PU1,
121 	TEGRA_PINGROUP_GPIO_PU2,
122 	TEGRA_PINGROUP_GPIO_PU3,
123 	TEGRA_PINGROUP_GPIO_PU4,
124 	TEGRA_PINGROUP_GPIO_PU5,
125 	TEGRA_PINGROUP_GPIO_PU6,
126 	TEGRA_PINGROUP_GEN1_I2C_SDA,
127 	TEGRA_PINGROUP_GEN1_I2C_SCL,
128 	TEGRA_PINGROUP_DAP4_FS,
129 	TEGRA_PINGROUP_DAP4_DIN,
130 	TEGRA_PINGROUP_DAP4_DOUT,
131 	TEGRA_PINGROUP_DAP4_SCLK,
132 	TEGRA_PINGROUP_CLK3_OUT,
133 	TEGRA_PINGROUP_CLK3_REQ,
134 	TEGRA_PINGROUP_GMI_WP_N,
135 	TEGRA_PINGROUP_GMI_IORDY,
136 	TEGRA_PINGROUP_GMI_WAIT,
137 	TEGRA_PINGROUP_GMI_ADV_N,
138 	TEGRA_PINGROUP_GMI_CLK,
139 	TEGRA_PINGROUP_GMI_CS0_N,
140 	TEGRA_PINGROUP_GMI_CS1_N,
141 	TEGRA_PINGROUP_GMI_CS2_N,
142 	TEGRA_PINGROUP_GMI_CS3_N,
143 	TEGRA_PINGROUP_GMI_CS4_N,
144 	TEGRA_PINGROUP_GMI_CS6_N,
145 	TEGRA_PINGROUP_GMI_CS7_N,
146 	TEGRA_PINGROUP_GMI_AD0,
147 	TEGRA_PINGROUP_GMI_AD1,
148 	TEGRA_PINGROUP_GMI_AD2,
149 	TEGRA_PINGROUP_GMI_AD3,
150 	TEGRA_PINGROUP_GMI_AD4,
151 	TEGRA_PINGROUP_GMI_AD5,
152 	TEGRA_PINGROUP_GMI_AD6,
153 	TEGRA_PINGROUP_GMI_AD7,
154 	TEGRA_PINGROUP_GMI_AD8,
155 	TEGRA_PINGROUP_GMI_AD9,
156 	TEGRA_PINGROUP_GMI_AD10,
157 	TEGRA_PINGROUP_GMI_AD11,
158 	TEGRA_PINGROUP_GMI_AD12,
159 	TEGRA_PINGROUP_GMI_AD13,
160 	TEGRA_PINGROUP_GMI_AD14,
161 	TEGRA_PINGROUP_GMI_AD15,
162 	TEGRA_PINGROUP_GMI_A16,
163 	TEGRA_PINGROUP_GMI_A17,
164 	TEGRA_PINGROUP_GMI_A18,
165 	TEGRA_PINGROUP_GMI_A19,
166 	TEGRA_PINGROUP_GMI_WR_N,
167 	TEGRA_PINGROUP_GMI_OE_N,
168 	TEGRA_PINGROUP_GMI_DQS,
169 	TEGRA_PINGROUP_GMI_RST_N,
170 	TEGRA_PINGROUP_GEN2_I2C_SCL,
171 	TEGRA_PINGROUP_GEN2_I2C_SDA,
172 	TEGRA_PINGROUP_SDMMC4_CLK,
173 	TEGRA_PINGROUP_SDMMC4_CMD,
174 	TEGRA_PINGROUP_SDMMC4_DAT0,
175 	TEGRA_PINGROUP_SDMMC4_DAT1,
176 	TEGRA_PINGROUP_SDMMC4_DAT2,
177 	TEGRA_PINGROUP_SDMMC4_DAT3,
178 	TEGRA_PINGROUP_SDMMC4_DAT4,
179 	TEGRA_PINGROUP_SDMMC4_DAT5,
180 	TEGRA_PINGROUP_SDMMC4_DAT6,
181 	TEGRA_PINGROUP_SDMMC4_DAT7,
182 	TEGRA_PINGROUP_SDMMC4_RST_N,
183 	TEGRA_PINGROUP_CAM_MCLK,
184 	TEGRA_PINGROUP_GPIO_PCC1,
185 	TEGRA_PINGROUP_GPIO_PBB0,
186 	TEGRA_PINGROUP_CAM_I2C_SCL,
187 	TEGRA_PINGROUP_CAM_I2C_SDA,
188 	TEGRA_PINGROUP_GPIO_PBB3,
189 	TEGRA_PINGROUP_GPIO_PBB4,
190 	TEGRA_PINGROUP_GPIO_PBB5,
191 	TEGRA_PINGROUP_GPIO_PBB6,
192 	TEGRA_PINGROUP_GPIO_PBB7,
193 	TEGRA_PINGROUP_GPIO_PCC2,
194 	TEGRA_PINGROUP_JTAG_RTCK,
195 	TEGRA_PINGROUP_PWR_I2C_SCL,
196 	TEGRA_PINGROUP_PWR_I2C_SDA,
197 	TEGRA_PINGROUP_KB_ROW0,
198 	TEGRA_PINGROUP_KB_ROW1,
199 	TEGRA_PINGROUP_KB_ROW2,
200 	TEGRA_PINGROUP_KB_ROW3,
201 	TEGRA_PINGROUP_KB_ROW4,
202 	TEGRA_PINGROUP_KB_ROW5,
203 	TEGRA_PINGROUP_KB_ROW6,
204 	TEGRA_PINGROUP_KB_ROW7,
205 	TEGRA_PINGROUP_KB_ROW8,
206 	TEGRA_PINGROUP_KB_ROW9,
207 	TEGRA_PINGROUP_KB_ROW10,
208 	TEGRA_PINGROUP_KB_ROW11,
209 	TEGRA_PINGROUP_KB_ROW12,
210 	TEGRA_PINGROUP_KB_ROW13,
211 	TEGRA_PINGROUP_KB_ROW14,
212 	TEGRA_PINGROUP_KB_ROW15,
213 	TEGRA_PINGROUP_KB_COL0,
214 	TEGRA_PINGROUP_KB_COL1,
215 	TEGRA_PINGROUP_KB_COL2,
216 	TEGRA_PINGROUP_KB_COL3,
217 	TEGRA_PINGROUP_KB_COL4,
218 	TEGRA_PINGROUP_KB_COL5,
219 	TEGRA_PINGROUP_KB_COL6,
220 	TEGRA_PINGROUP_KB_COL7,
221 	TEGRA_PINGROUP_CLK_32K_OUT,
222 	TEGRA_PINGROUP_SYS_CLK_REQ,
223 	TEGRA_PINGROUP_CORE_PWR_REQ,
224 	TEGRA_PINGROUP_CPU_PWR_REQ,
225 	TEGRA_PINGROUP_PWR_INT_N,
226 	TEGRA_PINGROUP_CLK_32K_IN,
227 	TEGRA_PINGROUP_OWR,
228 	TEGRA_PINGROUP_DAP1_FS,
229 	TEGRA_PINGROUP_DAP1_DIN,
230 	TEGRA_PINGROUP_DAP1_DOUT,
231 	TEGRA_PINGROUP_DAP1_SCLK,
232 	TEGRA_PINGROUP_CLK1_REQ,
233 	TEGRA_PINGROUP_CLK1_OUT,
234 	TEGRA_PINGROUP_SPDIF_IN,
235 	TEGRA_PINGROUP_SPDIF_OUT,
236 	TEGRA_PINGROUP_DAP2_FS,
237 	TEGRA_PINGROUP_DAP2_DIN,
238 	TEGRA_PINGROUP_DAP2_DOUT,
239 	TEGRA_PINGROUP_DAP2_SCLK,
240 	TEGRA_PINGROUP_SPI2_MOSI,
241 	TEGRA_PINGROUP_SPI2_MISO,
242 	TEGRA_PINGROUP_SPI2_CS0_N,
243 	TEGRA_PINGROUP_SPI2_SCK,
244 	TEGRA_PINGROUP_SPI1_MOSI,
245 	TEGRA_PINGROUP_SPI1_SCK,
246 	TEGRA_PINGROUP_SPI1_CS0_N,
247 	TEGRA_PINGROUP_SPI1_MISO,
248 	TEGRA_PINGROUP_SPI2_CS1_N,
249 	TEGRA_PINGROUP_SPI2_CS2_N,
250 	TEGRA_PINGROUP_SDMMC3_CLK,
251 	TEGRA_PINGROUP_SDMMC3_CMD,
252 	TEGRA_PINGROUP_SDMMC3_DAT0,
253 	TEGRA_PINGROUP_SDMMC3_DAT1,
254 	TEGRA_PINGROUP_SDMMC3_DAT2,
255 	TEGRA_PINGROUP_SDMMC3_DAT3,
256 	TEGRA_PINGROUP_SDMMC3_DAT4,
257 	TEGRA_PINGROUP_SDMMC3_DAT5,
258 	TEGRA_PINGROUP_SDMMC3_DAT6,
259 	TEGRA_PINGROUP_SDMMC3_DAT7,
260 	TEGRA_PINGROUP_PEX_L0_PRSNT_N,
261 	TEGRA_PINGROUP_PEX_L0_RST_N,
262 	TEGRA_PINGROUP_PEX_L0_CLKREQ_N,
263 	TEGRA_PINGROUP_PEX_WAKE_N,
264 	TEGRA_PINGROUP_PEX_L1_PRSNT_N,
265 	TEGRA_PINGROUP_PEX_L1_RST_N,
266 	TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
267 	TEGRA_PINGROUP_PEX_L2_PRSNT_N,
268 	TEGRA_PINGROUP_PEX_L2_RST_N,
269 	TEGRA_PINGROUP_PEX_L2_CLKREQ_N,
270 	TEGRA_PINGROUP_HDMI_CEC,
271 	TEGRA_MAX_PINGROUP,
272 };
273 
274 enum tegra_drive_pingroup {
275 	TEGRA_DRIVE_PINGROUP_AO1 = 0,
276 	TEGRA_DRIVE_PINGROUP_AO2,
277 	TEGRA_DRIVE_PINGROUP_AT1,
278 	TEGRA_DRIVE_PINGROUP_AT2,
279 	TEGRA_DRIVE_PINGROUP_AT3,
280 	TEGRA_DRIVE_PINGROUP_AT4,
281 	TEGRA_DRIVE_PINGROUP_AT5,
282 	TEGRA_DRIVE_PINGROUP_CDEV1,
283 	TEGRA_DRIVE_PINGROUP_CDEV2,
284 	TEGRA_DRIVE_PINGROUP_CSUS,
285 	TEGRA_DRIVE_PINGROUP_DAP1,
286 	TEGRA_DRIVE_PINGROUP_DAP2,
287 	TEGRA_DRIVE_PINGROUP_DAP3,
288 	TEGRA_DRIVE_PINGROUP_DAP4,
289 	TEGRA_DRIVE_PINGROUP_DBG,
290 	TEGRA_DRIVE_PINGROUP_LCD1,
291 	TEGRA_DRIVE_PINGROUP_LCD2,
292 	TEGRA_DRIVE_PINGROUP_SDIO2,
293 	TEGRA_DRIVE_PINGROUP_SDIO3,
294 	TEGRA_DRIVE_PINGROUP_SPI,
295 	TEGRA_DRIVE_PINGROUP_UAA,
296 	TEGRA_DRIVE_PINGROUP_UAB,
297 	TEGRA_DRIVE_PINGROUP_UART2,
298 	TEGRA_DRIVE_PINGROUP_UART3,
299 	TEGRA_DRIVE_PINGROUP_VI1,
300 	TEGRA_DRIVE_PINGROUP_SDIO1,
301 	TEGRA_DRIVE_PINGROUP_CRT,
302 	TEGRA_DRIVE_PINGROUP_DDC,
303 	TEGRA_DRIVE_PINGROUP_GMA,
304 	TEGRA_DRIVE_PINGROUP_GMB,
305 	TEGRA_DRIVE_PINGROUP_GMC,
306 	TEGRA_DRIVE_PINGROUP_GMD,
307 	TEGRA_DRIVE_PINGROUP_GME,
308 	TEGRA_DRIVE_PINGROUP_GMF,
309 	TEGRA_DRIVE_PINGROUP_GMG,
310 	TEGRA_DRIVE_PINGROUP_GMH,
311 	TEGRA_DRIVE_PINGROUP_OWR,
312 	TEGRA_DRIVE_PINGROUP_UAD,
313 	TEGRA_DRIVE_PINGROUP_GPV,
314 	TEGRA_DRIVE_PINGROUP_DEV3,
315 	TEGRA_DRIVE_PINGROUP_CEC,
316 	TEGRA_MAX_DRIVE_PINGROUP,
317 };
318 
319 #endif
320 
321