1 /*
2  * Copyright (c) 2010, 2011 NVIDIA Corporation.
3  * Copyright (C) 2010, 2011 Google, Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  */
16 
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/i2c.h>
22 #include <linux/delay.h>
23 #include <linux/input.h>
24 #include <linux/io.h>
25 #include <linux/gpio.h>
26 #include <linux/gpio_keys.h>
27 
28 #include <sound/wm8903.h>
29 
30 #include <mach/iomap.h>
31 #include <mach/irqs.h>
32 #include <mach/sdhci.h>
33 #include <mach/tegra_wm8903_pdata.h>
34 
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/hardware/gic.h>
38 
39 #include "board.h"
40 #include "board-seaboard.h"
41 #include "clock.h"
42 #include "devices.h"
43 #include "gpio-names.h"
44 
45 static struct plat_serial8250_port debug_uart_platform_data[] = {
46 	{
47 		/* Memory and IRQ filled in before registration */
48 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
49 		.type		= PORT_TEGRA,
50 		.iotype		= UPIO_MEM,
51 		.regshift	= 2,
52 		.uartclk	= 216000000,
53 	}, {
54 		.flags		= 0,
55 	}
56 };
57 
58 static struct platform_device debug_uart = {
59 	.name = "serial8250",
60 	.id = PLAT8250_DEV_PLATFORM,
61 	.dev = {
62 		.platform_data = debug_uart_platform_data,
63 	},
64 };
65 
66 static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
67 	/* name		parent		rate		enabled */
68 	{ "uartb",	"pll_p",	216000000,	true},
69 	{ "uartd",	"pll_p",	216000000,	true},
70 	{ "pll_a",	"pll_p_out1",	56448000,	true },
71 	{ "pll_a_out0",	"pll_a",	11289600,	true },
72 	{ "cdev1",	NULL,		0,		true },
73 	{ "i2s1",	"pll_a_out0",	11289600,	false},
74 	{ "usbd",	"clk_m",	12000000,	true},
75 	{ "usb3",	"clk_m",	12000000,	true},
76 	{ NULL,		NULL,		0,		0},
77 };
78 
79 static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
80 	{
81 		.code		= SW_LID,
82 		.gpio		= TEGRA_GPIO_LIDSWITCH,
83 		.active_low	= 0,
84 		.desc		= "Lid",
85 		.type		= EV_SW,
86 		.wakeup		= 1,
87 		.debounce_interval = 1,
88 	},
89 	{
90 		.code		= KEY_POWER,
91 		.gpio		= TEGRA_GPIO_POWERKEY,
92 		.active_low	= 1,
93 		.desc		= "Power",
94 		.type		= EV_KEY,
95 		.wakeup		= 1,
96 	},
97 };
98 
99 static struct gpio_keys_platform_data seaboard_gpio_keys = {
100 	.buttons	= seaboard_gpio_keys_buttons,
101 	.nbuttons	= ARRAY_SIZE(seaboard_gpio_keys_buttons),
102 };
103 
104 static struct platform_device seaboard_gpio_keys_device = {
105 	.name		= "gpio-keys",
106 	.id		= -1,
107 	.dev		= {
108 		.platform_data = &seaboard_gpio_keys,
109 	}
110 };
111 
112 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
113 	.cd_gpio	= -1,
114 	.wp_gpio	= -1,
115 	.power_gpio	= -1,
116 };
117 
118 static struct tegra_sdhci_platform_data sdhci_pdata3 = {
119 	.cd_gpio	= TEGRA_GPIO_SD2_CD,
120 	.wp_gpio	= TEGRA_GPIO_SD2_WP,
121 	.power_gpio	= TEGRA_GPIO_SD2_POWER,
122 };
123 
124 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
125 	.cd_gpio	= -1,
126 	.wp_gpio	= -1,
127 	.power_gpio	= -1,
128 	.is_8bit	= 1,
129 };
130 
131 static struct tegra_wm8903_platform_data seaboard_audio_pdata = {
132 	.gpio_spkr_en		= TEGRA_GPIO_SPKR_EN,
133 	.gpio_hp_det		= TEGRA_GPIO_HP_DET,
134 	.gpio_hp_mute		= -1,
135 	.gpio_int_mic_en	= -1,
136 	.gpio_ext_mic_en	= -1,
137 };
138 
139 static struct platform_device seaboard_audio_device = {
140 	.name	= "tegra-snd-wm8903",
141 	.id	= 0,
142 	.dev	= {
143 		.platform_data  = &seaboard_audio_pdata,
144 	},
145 };
146 
147 static struct platform_device *seaboard_devices[] __initdata = {
148 	&debug_uart,
149 	&tegra_pmu_device,
150 	&tegra_sdhci_device4,
151 	&tegra_sdhci_device3,
152 	&tegra_sdhci_device1,
153 	&seaboard_gpio_keys_device,
154 	&tegra_i2s_device1,
155 	&tegra_das_device,
156 	&tegra_pcm_device,
157 	&seaboard_audio_device,
158 };
159 
160 static struct i2c_board_info __initdata isl29018_device = {
161 	I2C_BOARD_INFO("isl29018", 0x44),
162 };
163 
164 static struct i2c_board_info __initdata adt7461_device = {
165 	I2C_BOARD_INFO("adt7461", 0x4c),
166 };
167 
168 static struct wm8903_platform_data wm8903_pdata = {
169 	.irq_active_low = 0,
170 	.micdet_cfg = 0,
171 	.micdet_delay = 100,
172 	.gpio_base = SEABOARD_GPIO_WM8903(0),
173 	.gpio_cfg = {
174 		0,
175 		0,
176 		WM8903_GPIO_CONFIG_ZERO,
177 		0,
178 		0,
179 	},
180 };
181 
182 static struct i2c_board_info __initdata wm8903_device = {
183 	I2C_BOARD_INFO("wm8903", 0x1a),
184 	.platform_data = &wm8903_pdata,
185 };
186 
seaboard_ehci_init(void)187 static int seaboard_ehci_init(void)
188 {
189 	int gpio_status;
190 
191 	gpio_status = gpio_request(TEGRA_GPIO_USB1, "VBUS_USB1");
192 	if (gpio_status < 0) {
193 		pr_err("VBUS_USB1 request GPIO FAILED\n");
194 		WARN_ON(1);
195 	}
196 
197 	gpio_status = gpio_direction_output(TEGRA_GPIO_USB1, 1);
198 	if (gpio_status < 0) {
199 		pr_err("VBUS_USB1 request GPIO DIRECTION FAILED\n");
200 		WARN_ON(1);
201 	}
202 	gpio_set_value(TEGRA_GPIO_USB1, 1);
203 
204 	platform_device_register(&tegra_ehci1_device);
205 	platform_device_register(&tegra_ehci3_device);
206 
207 	return 0;
208 }
209 
seaboard_i2c_init(void)210 static void __init seaboard_i2c_init(void)
211 {
212 	gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
213 	gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
214 
215 	isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);
216 	i2c_register_board_info(0, &isl29018_device, 1);
217 
218 	wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
219 	i2c_register_board_info(0, &wm8903_device, 1);
220 
221 	i2c_register_board_info(3, &adt7461_device, 1);
222 
223 	platform_device_register(&tegra_i2c_device1);
224 	platform_device_register(&tegra_i2c_device2);
225 	platform_device_register(&tegra_i2c_device3);
226 	platform_device_register(&tegra_i2c_device4);
227 }
228 
seaboard_common_init(void)229 static void __init seaboard_common_init(void)
230 {
231 	seaboard_pinmux_init();
232 
233 	tegra_clk_init_from_table(seaboard_clk_init_table);
234 
235 	tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
236 	tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
237 	tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
238 
239 	platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
240 
241 	seaboard_ehci_init();
242 }
243 
tegra_seaboard_init(void)244 static void __init tegra_seaboard_init(void)
245 {
246 	/* Seaboard uses UARTD for the debug port. */
247 	debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
248 	debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
249 	debug_uart_platform_data[0].irq = INT_UARTD;
250 
251 	seaboard_common_init();
252 
253 	seaboard_i2c_init();
254 }
255 
tegra_kaen_init(void)256 static void __init tegra_kaen_init(void)
257 {
258 	/* Kaen uses UARTB for the debug port. */
259 	debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
260 	debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
261 	debug_uart_platform_data[0].irq = INT_UARTB;
262 
263 	seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;
264 	tegra_gpio_enable(TEGRA_GPIO_KAEN_HP_MUTE);
265 
266 	seaboard_common_init();
267 
268 	seaboard_i2c_init();
269 }
270 
tegra_wario_init(void)271 static void __init tegra_wario_init(void)
272 {
273 	/* Wario uses UARTB for the debug port. */
274 	debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
275 	debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
276 	debug_uart_platform_data[0].irq = INT_UARTB;
277 
278 	seaboard_common_init();
279 
280 	seaboard_i2c_init();
281 }
282 
283 
284 MACHINE_START(SEABOARD, "seaboard")
285 	.atag_offset    = 0x100,
286 	.map_io         = tegra_map_common_io,
287 	.init_early     = tegra20_init_early,
288 	.init_irq       = tegra_init_irq,
289 	.handle_irq	= gic_handle_irq,
290 	.timer          = &tegra_timer,
291 	.init_machine   = tegra_seaboard_init,
292 	.restart	= tegra_assert_system_reset,
293 MACHINE_END
294 
295 MACHINE_START(KAEN, "kaen")
296 	.atag_offset    = 0x100,
297 	.map_io         = tegra_map_common_io,
298 	.init_early     = tegra20_init_early,
299 	.init_irq       = tegra_init_irq,
300 	.handle_irq	= gic_handle_irq,
301 	.timer          = &tegra_timer,
302 	.init_machine   = tegra_kaen_init,
303 	.restart	= tegra_assert_system_reset,
304 MACHINE_END
305 
306 MACHINE_START(WARIO, "wario")
307 	.atag_offset    = 0x100,
308 	.map_io         = tegra_map_common_io,
309 	.init_early     = tegra20_init_early,
310 	.init_irq       = tegra_init_irq,
311 	.handle_irq	= gic_handle_irq,
312 	.timer          = &tegra_timer,
313 	.init_machine   = tegra_wario_init,
314 	.restart	= tegra_assert_system_reset,
315 MACHINE_END
316