1 /*
2 * arch/arm/mach-tegra/board-dt-tegra30.c
3 *
4 * NVIDIA Tegra30 device tree board support
5 *
6 * Copyright (C) 2011 NVIDIA Corporation
7 *
8 * Derived from:
9 *
10 * arch/arm/mach-tegra/board-dt-tegra20.c
11 *
12 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
13 * Copyright (C) 2010 Google, Inc.
14 *
15 * This software is licensed under the terms of the GNU General Public
16 * License version 2, as published by the Free Software Foundation, and
17 * may be copied, distributed, and modified under those terms.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/of.h>
28 #include <linux/of_address.h>
29 #include <linux/of_fdt.h>
30 #include <linux/of_irq.h>
31 #include <linux/of_platform.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/hardware/gic.h>
35
36 #include "board.h"
37 #include "clock.h"
38
39 static struct of_device_id tegra_dt_match_table[] __initdata = {
40 { .compatible = "simple-bus", },
41 {}
42 };
43
44 struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
45 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
46 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
47 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL),
48 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000600, "sdhci-tegra.3", NULL),
49 OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C000, "tegra-i2c.0", NULL),
50 OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C400, "tegra-i2c.1", NULL),
51 OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL),
52 OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),
53 OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),
54 {}
55 };
56
57 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
58 /* name parent rate enabled */
59 { "uarta", "pll_p", 408000000, true },
60 { NULL, NULL, 0, 0},
61 };
62
tegra30_dt_init(void)63 static void __init tegra30_dt_init(void)
64 {
65 tegra_clk_init_from_table(tegra_dt_clk_init_table);
66
67 of_platform_populate(NULL, tegra_dt_match_table,
68 tegra30_auxdata_lookup, NULL);
69 }
70
71 static const char *tegra30_dt_board_compat[] = {
72 "nvidia,tegra30",
73 NULL
74 };
75
76 DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
77 .map_io = tegra_map_common_io,
78 .init_early = tegra30_init_early,
79 .init_irq = tegra_dt_init_irq,
80 .handle_irq = gic_handle_irq,
81 .timer = &tegra_timer,
82 .init_machine = tegra30_dt_init,
83 .restart = tegra_assert_system_reset,
84 .dt_compat = tegra30_dt_board_compat,
85 MACHINE_END
86