1 /*
2 * linux/arch/arm/mach-omap1/board-h3.c
3 *
4 * This file contains OMAP1710 H3 specific code.
5 *
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16 #include <linux/gpio.h>
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/i2c.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/nand.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/mtd/physmap.h>
29 #include <linux/input.h>
30 #include <linux/spi/spi.h>
31 #include <linux/i2c/tps65010.h>
32 #include <linux/smc91x.h>
33 #include <linux/omapfb.h>
34
35 #include <asm/setup.h>
36 #include <asm/page.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40
41 #include <plat/mux.h>
42 #include <plat/tc.h>
43 #include <plat/usb.h>
44 #include <plat/keypad.h>
45 #include <plat/dma.h>
46 #include <plat/flash.h>
47
48 #include <mach/hardware.h>
49 #include <mach/irqs.h>
50
51 #include "common.h"
52 #include "board-h3.h"
53
54 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
55 #define OMAP1710_ETHR_START 0x04000300
56
57 #define H3_TS_GPIO 48
58
59 static const unsigned int h3_keymap[] = {
60 KEY(0, 0, KEY_LEFT),
61 KEY(1, 0, KEY_RIGHT),
62 KEY(2, 0, KEY_3),
63 KEY(3, 0, KEY_F10),
64 KEY(4, 0, KEY_F5),
65 KEY(5, 0, KEY_9),
66 KEY(0, 1, KEY_DOWN),
67 KEY(1, 1, KEY_UP),
68 KEY(2, 1, KEY_2),
69 KEY(3, 1, KEY_F9),
70 KEY(4, 1, KEY_F7),
71 KEY(5, 1, KEY_0),
72 KEY(0, 2, KEY_ENTER),
73 KEY(1, 2, KEY_6),
74 KEY(2, 2, KEY_1),
75 KEY(3, 2, KEY_F2),
76 KEY(4, 2, KEY_F6),
77 KEY(5, 2, KEY_HOME),
78 KEY(0, 3, KEY_8),
79 KEY(1, 3, KEY_5),
80 KEY(2, 3, KEY_F12),
81 KEY(3, 3, KEY_F3),
82 KEY(4, 3, KEY_F8),
83 KEY(5, 3, KEY_END),
84 KEY(0, 4, KEY_7),
85 KEY(1, 4, KEY_4),
86 KEY(2, 4, KEY_F11),
87 KEY(3, 4, KEY_F1),
88 KEY(4, 4, KEY_F4),
89 KEY(5, 4, KEY_ESC),
90 KEY(0, 5, KEY_F13),
91 KEY(1, 5, KEY_F14),
92 KEY(2, 5, KEY_F15),
93 KEY(3, 5, KEY_F16),
94 KEY(4, 5, KEY_SLEEP),
95 };
96
97
98 static struct mtd_partition nor_partitions[] = {
99 /* bootloader (U-Boot, etc) in first sector */
100 {
101 .name = "bootloader",
102 .offset = 0,
103 .size = SZ_128K,
104 .mask_flags = MTD_WRITEABLE, /* force read-only */
105 },
106 /* bootloader params in the next sector */
107 {
108 .name = "params",
109 .offset = MTDPART_OFS_APPEND,
110 .size = SZ_128K,
111 .mask_flags = 0,
112 },
113 /* kernel */
114 {
115 .name = "kernel",
116 .offset = MTDPART_OFS_APPEND,
117 .size = SZ_2M,
118 .mask_flags = 0
119 },
120 /* file system */
121 {
122 .name = "filesystem",
123 .offset = MTDPART_OFS_APPEND,
124 .size = MTDPART_SIZ_FULL,
125 .mask_flags = 0
126 }
127 };
128
129 static struct physmap_flash_data nor_data = {
130 .width = 2,
131 .set_vpp = omap1_set_vpp,
132 .parts = nor_partitions,
133 .nr_parts = ARRAY_SIZE(nor_partitions),
134 };
135
136 static struct resource nor_resource = {
137 /* This is on CS3, wherever it's mapped */
138 .flags = IORESOURCE_MEM,
139 };
140
141 static struct platform_device nor_device = {
142 .name = "physmap-flash",
143 .id = 0,
144 .dev = {
145 .platform_data = &nor_data,
146 },
147 .num_resources = 1,
148 .resource = &nor_resource,
149 };
150
151 static struct mtd_partition nand_partitions[] = {
152 #if 0
153 /* REVISIT: enable these partitions if you make NAND BOOT work */
154 {
155 .name = "xloader",
156 .offset = 0,
157 .size = 64 * 1024,
158 .mask_flags = MTD_WRITEABLE, /* force read-only */
159 },
160 {
161 .name = "bootloader",
162 .offset = MTDPART_OFS_APPEND,
163 .size = 256 * 1024,
164 .mask_flags = MTD_WRITEABLE, /* force read-only */
165 },
166 {
167 .name = "params",
168 .offset = MTDPART_OFS_APPEND,
169 .size = 192 * 1024,
170 },
171 {
172 .name = "kernel",
173 .offset = MTDPART_OFS_APPEND,
174 .size = 2 * SZ_1M,
175 },
176 #endif
177 {
178 .name = "filesystem",
179 .size = MTDPART_SIZ_FULL,
180 .offset = MTDPART_OFS_APPEND,
181 },
182 };
183
nand_cmd_ctl(struct mtd_info * mtd,int cmd,unsigned int ctrl)184 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
185 {
186 struct nand_chip *this = mtd->priv;
187 unsigned long mask;
188
189 if (cmd == NAND_CMD_NONE)
190 return;
191
192 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
193 if (ctrl & NAND_ALE)
194 mask |= 0x04;
195 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
196 }
197
198 #define H3_NAND_RB_GPIO_PIN 10
199
nand_dev_ready(struct mtd_info * mtd)200 static int nand_dev_ready(struct mtd_info *mtd)
201 {
202 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
203 }
204
205 static const char *part_probes[] = { "cmdlinepart", NULL };
206
207 static struct platform_nand_data nand_platdata = {
208 .chip = {
209 .nr_chips = 1,
210 .chip_offset = 0,
211 .nr_partitions = ARRAY_SIZE(nand_partitions),
212 .partitions = nand_partitions,
213 .options = NAND_SAMSUNG_LP_OPTIONS,
214 .part_probe_types = part_probes,
215 },
216 .ctrl = {
217 .cmd_ctrl = nand_cmd_ctl,
218 .dev_ready = nand_dev_ready,
219
220 },
221 };
222
223 static struct resource nand_resource = {
224 .flags = IORESOURCE_MEM,
225 };
226
227 static struct platform_device nand_device = {
228 .name = "gen_nand",
229 .id = 0,
230 .dev = {
231 .platform_data = &nand_platdata,
232 },
233 .num_resources = 1,
234 .resource = &nand_resource,
235 };
236
237 static struct smc91x_platdata smc91x_info = {
238 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
239 .leda = RPC_LED_100_10,
240 .ledb = RPC_LED_TX_RX,
241 };
242
243 static struct resource smc91x_resources[] = {
244 [0] = {
245 .start = OMAP1710_ETHR_START, /* Physical */
246 .end = OMAP1710_ETHR_START + 0xf,
247 .flags = IORESOURCE_MEM,
248 },
249 [1] = {
250 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
251 },
252 };
253
254 static struct platform_device smc91x_device = {
255 .name = "smc91x",
256 .id = 0,
257 .dev = {
258 .platform_data = &smc91x_info,
259 },
260 .num_resources = ARRAY_SIZE(smc91x_resources),
261 .resource = smc91x_resources,
262 };
263
h3_init_smc91x(void)264 static void __init h3_init_smc91x(void)
265 {
266 omap_cfg_reg(W15_1710_GPIO40);
267 if (gpio_request(40, "SMC91x irq") < 0) {
268 printk("Error requesting gpio 40 for smc91x irq\n");
269 return;
270 }
271 }
272
273 #define GPTIMER_BASE 0xFFFB1400
274 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
275 #define GPTIMER_REGS_SIZE 0x46
276
277 static struct resource intlat_resources[] = {
278 [0] = {
279 .start = GPTIMER_REGS(0), /* Physical */
280 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
281 .flags = IORESOURCE_MEM,
282 },
283 [1] = {
284 .start = INT_1610_GPTIMER1,
285 .end = INT_1610_GPTIMER1,
286 .flags = IORESOURCE_IRQ,
287 },
288 };
289
290 static struct platform_device intlat_device = {
291 .name = "omap_intlat",
292 .id = 0,
293 .num_resources = ARRAY_SIZE(intlat_resources),
294 .resource = intlat_resources,
295 };
296
297 static struct resource h3_kp_resources[] = {
298 [0] = {
299 .start = INT_KEYBOARD,
300 .end = INT_KEYBOARD,
301 .flags = IORESOURCE_IRQ,
302 },
303 };
304
305 static const struct matrix_keymap_data h3_keymap_data = {
306 .keymap = h3_keymap,
307 .keymap_size = ARRAY_SIZE(h3_keymap),
308 };
309
310 static struct omap_kp_platform_data h3_kp_data = {
311 .rows = 8,
312 .cols = 8,
313 .keymap_data = &h3_keymap_data,
314 .rep = true,
315 .delay = 9,
316 .dbounce = true,
317 };
318
319 static struct platform_device h3_kp_device = {
320 .name = "omap-keypad",
321 .id = -1,
322 .dev = {
323 .platform_data = &h3_kp_data,
324 },
325 .num_resources = ARRAY_SIZE(h3_kp_resources),
326 .resource = h3_kp_resources,
327 };
328
329 static struct platform_device h3_lcd_device = {
330 .name = "lcd_h3",
331 .id = -1,
332 };
333
334 static struct spi_board_info h3_spi_board_info[] __initdata = {
335 [0] = {
336 .modalias = "tsc2101",
337 .bus_num = 2,
338 .chip_select = 0,
339 .max_speed_hz = 16000000,
340 /* .platform_data = &tsc_platform_data, */
341 },
342 };
343
344 static struct platform_device *devices[] __initdata = {
345 &nor_device,
346 &nand_device,
347 &smc91x_device,
348 &intlat_device,
349 &h3_kp_device,
350 &h3_lcd_device,
351 };
352
353 static struct omap_usb_config h3_usb_config __initdata = {
354 /* usb1 has a Mini-AB port and external isp1301 transceiver */
355 .otg = 2,
356
357 #ifdef CONFIG_USB_GADGET_OMAP
358 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
359 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
360 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
361 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
362 #endif
363
364 .pins[1] = 3,
365 };
366
367 static struct omap_lcd_config h3_lcd_config __initdata = {
368 .ctrl_name = "internal",
369 };
370
371 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
372 {
373 I2C_BOARD_INFO("tps65013", 0x48),
374 },
375 {
376 I2C_BOARD_INFO("isp1301_omap", 0x2d),
377 },
378 };
379
h3_init(void)380 static void __init h3_init(void)
381 {
382 h3_init_smc91x();
383
384 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
385 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
386 * notice whether a NAND chip is enabled at probe time.
387 *
388 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
389 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
390 * to avoid probing every possible flash configuration...
391 */
392 nor_resource.end = nor_resource.start = omap_cs3_phys();
393 nor_resource.end += SZ_32M - 1;
394
395 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
396 nand_resource.end += SZ_4K - 1;
397 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
398 BUG();
399 gpio_direction_input(H3_NAND_RB_GPIO_PIN);
400
401 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
402 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
403 omap_cfg_reg(V2_1710_GPIO10);
404
405 /* Mux pins for keypad */
406 omap_cfg_reg(F18_1610_KBC0);
407 omap_cfg_reg(D20_1610_KBC1);
408 omap_cfg_reg(D19_1610_KBC2);
409 omap_cfg_reg(E18_1610_KBC3);
410 omap_cfg_reg(C21_1610_KBC4);
411 omap_cfg_reg(G18_1610_KBR0);
412 omap_cfg_reg(F19_1610_KBR1);
413 omap_cfg_reg(H14_1610_KBR2);
414 omap_cfg_reg(E20_1610_KBR3);
415 omap_cfg_reg(E19_1610_KBR4);
416 omap_cfg_reg(N19_1610_KBR5);
417
418 smc91x_resources[1].start = gpio_to_irq(40);
419 smc91x_resources[1].end = gpio_to_irq(40);
420 platform_add_devices(devices, ARRAY_SIZE(devices));
421 h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
422 spi_register_board_info(h3_spi_board_info,
423 ARRAY_SIZE(h3_spi_board_info));
424 omap_serial_init();
425 h3_i2c_board_info[1].irq = gpio_to_irq(14);
426 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
427 ARRAY_SIZE(h3_i2c_board_info));
428 omap1_usb_init(&h3_usb_config);
429 h3_mmc_init();
430
431 omapfb_set_lcd_config(&h3_lcd_config);
432 }
433
434 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
435 /* Maintainer: Texas Instruments, Inc. */
436 .atag_offset = 0x100,
437 .map_io = omap16xx_map_io,
438 .init_early = omap1_init_early,
439 .reserve = omap_reserve,
440 .init_irq = omap1_init_irq,
441 .init_machine = h3_init,
442 .timer = &omap1_timer,
443 .restart = omap1_restart,
444 MACHINE_END
445