1 /*
2 * linux/arch/arm/mach-omap1/board-h2.c
3 *
4 * Board specific inits for OMAP-1610 H2
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * H2 specific changes and cleanup
15 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21 #include <linux/gpio.h>
22 #include <linux/kernel.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/i2c.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/nand.h>
28 #include <linux/mtd/partitions.h>
29 #include <linux/mtd/physmap.h>
30 #include <linux/input.h>
31 #include <linux/i2c/tps65010.h>
32 #include <linux/smc91x.h>
33 #include <linux/omapfb.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38
39 #include <plat/mux.h>
40 #include <plat/dma.h>
41 #include <plat/tc.h>
42 #include <plat/irda.h>
43 #include <plat/usb.h>
44 #include <plat/keypad.h>
45 #include <plat/flash.h>
46
47 #include <mach/hardware.h>
48
49 #include "common.h"
50 #include "board-h2.h"
51
52 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
53 #define OMAP1610_ETHR_START 0x04000300
54
55 static const unsigned int h2_keymap[] = {
56 KEY(0, 0, KEY_LEFT),
57 KEY(1, 0, KEY_RIGHT),
58 KEY(2, 0, KEY_3),
59 KEY(3, 0, KEY_F10),
60 KEY(4, 0, KEY_F5),
61 KEY(5, 0, KEY_9),
62 KEY(0, 1, KEY_DOWN),
63 KEY(1, 1, KEY_UP),
64 KEY(2, 1, KEY_2),
65 KEY(3, 1, KEY_F9),
66 KEY(4, 1, KEY_F7),
67 KEY(5, 1, KEY_0),
68 KEY(0, 2, KEY_ENTER),
69 KEY(1, 2, KEY_6),
70 KEY(2, 2, KEY_1),
71 KEY(3, 2, KEY_F2),
72 KEY(4, 2, KEY_F6),
73 KEY(5, 2, KEY_HOME),
74 KEY(0, 3, KEY_8),
75 KEY(1, 3, KEY_5),
76 KEY(2, 3, KEY_F12),
77 KEY(3, 3, KEY_F3),
78 KEY(4, 3, KEY_F8),
79 KEY(5, 3, KEY_END),
80 KEY(0, 4, KEY_7),
81 KEY(1, 4, KEY_4),
82 KEY(2, 4, KEY_F11),
83 KEY(3, 4, KEY_F1),
84 KEY(4, 4, KEY_F4),
85 KEY(5, 4, KEY_ESC),
86 KEY(0, 5, KEY_F13),
87 KEY(1, 5, KEY_F14),
88 KEY(2, 5, KEY_F15),
89 KEY(3, 5, KEY_F16),
90 KEY(4, 5, KEY_SLEEP),
91 };
92
93 static struct mtd_partition h2_nor_partitions[] = {
94 /* bootloader (U-Boot, etc) in first sector */
95 {
96 .name = "bootloader",
97 .offset = 0,
98 .size = SZ_128K,
99 .mask_flags = MTD_WRITEABLE, /* force read-only */
100 },
101 /* bootloader params in the next sector */
102 {
103 .name = "params",
104 .offset = MTDPART_OFS_APPEND,
105 .size = SZ_128K,
106 .mask_flags = 0,
107 },
108 /* kernel */
109 {
110 .name = "kernel",
111 .offset = MTDPART_OFS_APPEND,
112 .size = SZ_2M,
113 .mask_flags = 0
114 },
115 /* file system */
116 {
117 .name = "filesystem",
118 .offset = MTDPART_OFS_APPEND,
119 .size = MTDPART_SIZ_FULL,
120 .mask_flags = 0
121 }
122 };
123
124 static struct physmap_flash_data h2_nor_data = {
125 .width = 2,
126 .set_vpp = omap1_set_vpp,
127 .parts = h2_nor_partitions,
128 .nr_parts = ARRAY_SIZE(h2_nor_partitions),
129 };
130
131 static struct resource h2_nor_resource = {
132 /* This is on CS3, wherever it's mapped */
133 .flags = IORESOURCE_MEM,
134 };
135
136 static struct platform_device h2_nor_device = {
137 .name = "physmap-flash",
138 .id = 0,
139 .dev = {
140 .platform_data = &h2_nor_data,
141 },
142 .num_resources = 1,
143 .resource = &h2_nor_resource,
144 };
145
146 static struct mtd_partition h2_nand_partitions[] = {
147 #if 0
148 /* REVISIT: enable these partitions if you make NAND BOOT
149 * work on your H2 (rev C or newer); published versions of
150 * x-load only support P2 and H3.
151 */
152 {
153 .name = "xloader",
154 .offset = 0,
155 .size = 64 * 1024,
156 .mask_flags = MTD_WRITEABLE, /* force read-only */
157 },
158 {
159 .name = "bootloader",
160 .offset = MTDPART_OFS_APPEND,
161 .size = 256 * 1024,
162 .mask_flags = MTD_WRITEABLE, /* force read-only */
163 },
164 {
165 .name = "params",
166 .offset = MTDPART_OFS_APPEND,
167 .size = 192 * 1024,
168 },
169 {
170 .name = "kernel",
171 .offset = MTDPART_OFS_APPEND,
172 .size = 2 * SZ_1M,
173 },
174 #endif
175 {
176 .name = "filesystem",
177 .size = MTDPART_SIZ_FULL,
178 .offset = MTDPART_OFS_APPEND,
179 },
180 };
181
h2_nand_cmd_ctl(struct mtd_info * mtd,int cmd,unsigned int ctrl)182 static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
183 {
184 struct nand_chip *this = mtd->priv;
185 unsigned long mask;
186
187 if (cmd == NAND_CMD_NONE)
188 return;
189
190 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
191 if (ctrl & NAND_ALE)
192 mask |= 0x04;
193 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
194 }
195
196 #define H2_NAND_RB_GPIO_PIN 62
197
h2_nand_dev_ready(struct mtd_info * mtd)198 static int h2_nand_dev_ready(struct mtd_info *mtd)
199 {
200 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
201 }
202
203 static const char *h2_part_probes[] = { "cmdlinepart", NULL };
204
205 static struct platform_nand_data h2_nand_platdata = {
206 .chip = {
207 .nr_chips = 1,
208 .chip_offset = 0,
209 .nr_partitions = ARRAY_SIZE(h2_nand_partitions),
210 .partitions = h2_nand_partitions,
211 .options = NAND_SAMSUNG_LP_OPTIONS,
212 .part_probe_types = h2_part_probes,
213 },
214 .ctrl = {
215 .cmd_ctrl = h2_nand_cmd_ctl,
216 .dev_ready = h2_nand_dev_ready,
217
218 },
219 };
220
221 static struct resource h2_nand_resource = {
222 .flags = IORESOURCE_MEM,
223 };
224
225 static struct platform_device h2_nand_device = {
226 .name = "gen_nand",
227 .id = 0,
228 .dev = {
229 .platform_data = &h2_nand_platdata,
230 },
231 .num_resources = 1,
232 .resource = &h2_nand_resource,
233 };
234
235 static struct smc91x_platdata h2_smc91x_info = {
236 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
237 .leda = RPC_LED_100_10,
238 .ledb = RPC_LED_TX_RX,
239 };
240
241 static struct resource h2_smc91x_resources[] = {
242 [0] = {
243 .start = OMAP1610_ETHR_START, /* Physical */
244 .end = OMAP1610_ETHR_START + 0xf,
245 .flags = IORESOURCE_MEM,
246 },
247 [1] = {
248 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
249 },
250 };
251
252 static struct platform_device h2_smc91x_device = {
253 .name = "smc91x",
254 .id = 0,
255 .dev = {
256 .platform_data = &h2_smc91x_info,
257 },
258 .num_resources = ARRAY_SIZE(h2_smc91x_resources),
259 .resource = h2_smc91x_resources,
260 };
261
262 static struct resource h2_kp_resources[] = {
263 [0] = {
264 .start = INT_KEYBOARD,
265 .end = INT_KEYBOARD,
266 .flags = IORESOURCE_IRQ,
267 },
268 };
269
270 static const struct matrix_keymap_data h2_keymap_data = {
271 .keymap = h2_keymap,
272 .keymap_size = ARRAY_SIZE(h2_keymap),
273 };
274
275 static struct omap_kp_platform_data h2_kp_data = {
276 .rows = 8,
277 .cols = 8,
278 .keymap_data = &h2_keymap_data,
279 .rep = true,
280 .delay = 9,
281 .dbounce = true,
282 };
283
284 static struct platform_device h2_kp_device = {
285 .name = "omap-keypad",
286 .id = -1,
287 .dev = {
288 .platform_data = &h2_kp_data,
289 },
290 .num_resources = ARRAY_SIZE(h2_kp_resources),
291 .resource = h2_kp_resources,
292 };
293
294 #define H2_IRDA_FIRSEL_GPIO_PIN 17
295
296 static struct omap_irda_config h2_irda_data = {
297 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
298 .rx_channel = OMAP_DMA_UART3_RX,
299 .tx_channel = OMAP_DMA_UART3_TX,
300 .dest_start = UART3_THR,
301 .src_start = UART3_RHR,
302 .tx_trigger = 0,
303 .rx_trigger = 0,
304 };
305
306 static struct resource h2_irda_resources[] = {
307 [0] = {
308 .start = INT_UART3,
309 .end = INT_UART3,
310 .flags = IORESOURCE_IRQ,
311 },
312 };
313
314 static u64 irda_dmamask = 0xffffffff;
315
316 static struct platform_device h2_irda_device = {
317 .name = "omapirda",
318 .id = 0,
319 .dev = {
320 .platform_data = &h2_irda_data,
321 .dma_mask = &irda_dmamask,
322 },
323 .num_resources = ARRAY_SIZE(h2_irda_resources),
324 .resource = h2_irda_resources,
325 };
326
327 static struct platform_device *h2_devices[] __initdata = {
328 &h2_nor_device,
329 &h2_nand_device,
330 &h2_smc91x_device,
331 &h2_irda_device,
332 &h2_kp_device,
333 };
334
h2_init_smc91x(void)335 static void __init h2_init_smc91x(void)
336 {
337 if (gpio_request(0, "SMC91x irq") < 0) {
338 printk("Error requesting gpio 0 for smc91x irq\n");
339 return;
340 }
341 }
342
tps_setup(struct i2c_client * client,void * context)343 static int tps_setup(struct i2c_client *client, void *context)
344 {
345 tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
346 TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
347
348 return 0;
349 }
350
351 static struct tps65010_board tps_board = {
352 .base = H2_TPS_GPIO_BASE,
353 .outmask = 0x0f,
354 .setup = tps_setup,
355 };
356
357 static struct i2c_board_info __initdata h2_i2c_board_info[] = {
358 {
359 I2C_BOARD_INFO("tps65010", 0x48),
360 .platform_data = &tps_board,
361 }, {
362 I2C_BOARD_INFO("isp1301_omap", 0x2d),
363 },
364 };
365
366 static struct omap_usb_config h2_usb_config __initdata = {
367 /* usb1 has a Mini-AB port and external isp1301 transceiver */
368 .otg = 2,
369
370 #ifdef CONFIG_USB_GADGET_OMAP
371 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
372 /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
373 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
374 /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
375 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
376 #endif
377
378 .pins[1] = 3,
379 };
380
381 static struct omap_lcd_config h2_lcd_config __initdata = {
382 .ctrl_name = "internal",
383 };
384
h2_init(void)385 static void __init h2_init(void)
386 {
387 h2_init_smc91x();
388
389 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
390 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
391 * notice whether a NAND chip is enabled at probe time.
392 *
393 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
394 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
395 * detecting that in code here, to avoid probing every possible flash
396 * configuration...
397 */
398 h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
399 h2_nor_resource.end += SZ_32M - 1;
400
401 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
402 h2_nand_resource.end += SZ_4K - 1;
403 if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
404 BUG();
405 gpio_direction_input(H2_NAND_RB_GPIO_PIN);
406
407 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
408 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
409
410 /* MMC: card detect and WP */
411 /* omap_cfg_reg(U19_ARMIO1); */ /* CD */
412 omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
413
414 /* Mux pins for keypad */
415 omap_cfg_reg(F18_1610_KBC0);
416 omap_cfg_reg(D20_1610_KBC1);
417 omap_cfg_reg(D19_1610_KBC2);
418 omap_cfg_reg(E18_1610_KBC3);
419 omap_cfg_reg(C21_1610_KBC4);
420 omap_cfg_reg(G18_1610_KBR0);
421 omap_cfg_reg(F19_1610_KBR1);
422 omap_cfg_reg(H14_1610_KBR2);
423 omap_cfg_reg(E20_1610_KBR3);
424 omap_cfg_reg(E19_1610_KBR4);
425 omap_cfg_reg(N19_1610_KBR5);
426
427 h2_smc91x_resources[1].start = gpio_to_irq(0);
428 h2_smc91x_resources[1].end = gpio_to_irq(0);
429 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
430 omap_serial_init();
431 h2_i2c_board_info[0].irq = gpio_to_irq(58);
432 h2_i2c_board_info[1].irq = gpio_to_irq(2);
433 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
434 ARRAY_SIZE(h2_i2c_board_info));
435 omap1_usb_init(&h2_usb_config);
436 h2_mmc_init();
437
438 omapfb_set_lcd_config(&h2_lcd_config);
439 }
440
441 MACHINE_START(OMAP_H2, "TI-H2")
442 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
443 .atag_offset = 0x100,
444 .map_io = omap16xx_map_io,
445 .init_early = omap1_init_early,
446 .reserve = omap_reserve,
447 .init_irq = omap1_init_irq,
448 .init_machine = h2_init,
449 .timer = &omap1_timer,
450 .restart = omap1_restart,
451 MACHINE_END
452